From d949932c08db8e52f117f799280b5dc0b60bac85 Mon Sep 17 00:00:00 2001 From: Ryan Date: Thu, 27 Aug 2020 04:15:43 +1000 Subject: Fix ChibiOS backlight not turning off on suspend (#10114) * Fix ChibiOS backlight not turning off on suspend * Add missing code for backlight as caps lock too --- tmk_core/common/chibios/suspend.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'tmk_core') diff --git a/tmk_core/common/chibios/suspend.c b/tmk_core/common/chibios/suspend.c index 8c071e7a0..64dfc05ab 100644 --- a/tmk_core/common/chibios/suspend.c +++ b/tmk_core/common/chibios/suspend.c @@ -9,6 +9,7 @@ #include "mousekey.h" #include "host.h" #include "suspend.h" +#include "led.h" #include "wait.h" #ifdef BACKLIGHT_ENABLE @@ -47,6 +48,20 @@ __attribute__((weak)) void suspend_power_down_kb(void) { suspend_power_down_user * FIXME: needs doc */ void suspend_power_down(void) { +#ifdef BACKLIGHT_ENABLE + backlight_set(0); +#endif + + // Turn off LED indicators + uint8_t leds_off = 0; +#if defined(BACKLIGHT_CAPS_LOCK) && defined(BACKLIGHT_ENABLE) + if (is_backlight_enabled()) { + // Don't try to turn off Caps Lock indicator as it is backlight and backlight is already off + leds_off |= (1 << USB_LED_CAPS_LOCK); + } +#endif + led_set(leds_off); + // TODO: figure out what to power down and how // shouldn't power down TPM/FTM if we want a breathing LED // also shouldn't power down USB @@ -119,6 +134,7 @@ void suspend_wakeup_init(void) { #ifdef BACKLIGHT_ENABLE backlight_init(); #endif /* BACKLIGHT_ENABLE */ + led_set(host_keyboard_leds()); #if defined(RGBLIGHT_SLEEP) && defined(RGBLIGHT_ENABLE) is_suspended = false; if (rgblight_enabled) { -- cgit v1.3.1 From 5cc3ab38c9148cd6bc7ccdba176a88fbb95653b1 Mon Sep 17 00:00:00 2001 From: Ryan Date: Fri, 5 Jun 2020 20:56:03 +1000 Subject: Remove iWRAP protocol (#9284) --- doxygen-todo | 1 - tmk_core/protocol/iwrap.mk | 32 --- tmk_core/protocol/iwrap/iWRAP4.txt | 376 -------------------------------- tmk_core/protocol/iwrap/iWRAP5.txt | 356 ------------------------------ tmk_core/protocol/iwrap/iwrap.c | 420 ------------------------------------ tmk_core/protocol/iwrap/iwrap.h | 47 ---- tmk_core/protocol/iwrap/main.c | 412 ----------------------------------- tmk_core/protocol/iwrap/mux_exit.rb | 7 - tmk_core/protocol/iwrap/suart.S | 156 -------------- tmk_core/protocol/iwrap/suart.h | 8 - tmk_core/protocol/iwrap/wd.h | 161 -------------- tmk_core/readme.md | 5 +- 12 files changed, 2 insertions(+), 1979 deletions(-) delete mode 100644 tmk_core/protocol/iwrap.mk delete mode 100644 tmk_core/protocol/iwrap/iWRAP4.txt delete mode 100644 tmk_core/protocol/iwrap/iWRAP5.txt delete mode 100644 tmk_core/protocol/iwrap/iwrap.c delete mode 100644 tmk_core/protocol/iwrap/iwrap.h delete mode 100644 tmk_core/protocol/iwrap/main.c delete mode 100644 tmk_core/protocol/iwrap/mux_exit.rb delete mode 100644 tmk_core/protocol/iwrap/suart.S delete mode 100644 tmk_core/protocol/iwrap/suart.h delete mode 100644 tmk_core/protocol/iwrap/wd.h (limited to 'tmk_core') diff --git a/doxygen-todo b/doxygen-todo index 39fb498d9..d8892e48d 100644 --- a/doxygen-todo +++ b/doxygen-todo @@ -1,6 +1,5 @@ tmk_core/protocol tmk_core/protocol/chibios -tmk_core/protocol/iwrap tmk_core/protocol/lufa tmk_core/protocol/midi tmk_core/protocol/midi/bytequeue diff --git a/tmk_core/protocol/iwrap.mk b/tmk_core/protocol/iwrap.mk deleted file mode 100644 index 934235bd8..000000000 --- a/tmk_core/protocol/iwrap.mk +++ /dev/null @@ -1,32 +0,0 @@ -IWRAP_DIR = protocol/iwrap - -OPT_DEFS += -DPROTOCOL_IWRAP - -SRC += $(IWRAP_DIR)/main.c \ - $(IWRAP_DIR)/iwrap.c \ - $(IWRAP_DIR)/suart.S \ - $(COMMON_DIR)/sendchar_uart.c \ - $(COMMON_DIR)/uart.c - -# Search Path -VPATH += $(TMK_DIR)/protocol/iwrap - - -# TODO: compatible with LUFA and PJRC -# V-USB -# -VUSB_DIR = protocol/vusb - -# Path to the V-USB library -VUSB_PATH = $(LIB_PATH)/vusb - -SRC += $(VUSB_DIR)/vusb.c \ - $(VUSB_PATH)/usbdrv/usbdrv.c \ - $(VUSB_PATH)/usbdrv/usbdrvasm.S \ - $(VUSB_PATH)/usbdrv/oddebug.c - -# Search Path -VPATH += $(TMK_PATH)/$(VUSB_DIR) -VPATH += $(VUSB_PATH) - -OPT_DEFS += -DPROTOCOL_VUSB diff --git a/tmk_core/protocol/iwrap/iWRAP4.txt b/tmk_core/protocol/iwrap/iWRAP4.txt deleted file mode 100644 index 2a062d9d9..000000000 --- a/tmk_core/protocol/iwrap/iWRAP4.txt +++ /dev/null @@ -1,376 +0,0 @@ -Bulegiga WT12 -============= -WT12 is a bluetooth module from Bluegiga. http://www.bluegiga.com/ - -iWRAP - higher layer interface for bluetooth firmware - communicate with UART - -iWRAP HID -default setting - 115200 8bit/n/1/n - - -TODO ----- -KiCAD circuit/PCB design -power saving - AVR sleep(15ms by watch dog timer) - WT12 sleep - measuring current consumption - measuring battery life of normal usage/idle/intensive usage -software reset/bootloarder -LED indicator(chaging/paring/connecting) -license confirmation of suart.c -consumer page is not working -authenticate method/SSP -SPP keyboard support -SPP debug console support -mouse wheel feature request to Bluegiga - - -Problems --------- -power consumption -no consumer page support(bug?) -no mouse wheel support -no paring management -no interactive auth method - - -UART hardware flow control --------------------------- -(iWRAP4 User Guide 9.5) -Hardware flow control is enabled by default and it should not be disabled unless mandatory, because without the hardware flow control the data transmission may not be reliable. -If the hardware flow control is enabled from PS-keys, but no flow control is used, the following steps should be implemented in the hardware design: -- CTS pin must be grounded -- RTS pin must be left floating - - -Power Saving ------------- -power consume - without opimization: 4hr to shutdown(310mAh) - 2011/08/25: 9hr(310mAh) SNIFF MASTER sleep/WDTO_120MS - -measure current consumption - HHKB keyswitch matrix board - idle - scanning - Bluegiga WT12 module - SLEEP command - deep sleep on/off in config bits - -HHKB keyswich - how to power off - I/O pin configuration when sleeping - FET switch for 5V regulator - -Bluetooth module - power off when in USB mode - power off by FET switch - -AVR configuration - unused pins - ADC - - - -SET CONTROL CONFIG ------------------- - SET CONTROL CONFIG 4810 - SET CONTROL CONFIG LIST - SET CONTROL CONFIG 0000 0000 4910 DEEP_SLEEP KLUDGE INTERACTIVE_PIN UART_LATENCY - - Bit14 UART low latency - Bit11 Interactive pairing mode - Bit04 Deep sleep - - -Reconnection ------------- -SET CONTROL AUTOCALL 1124 5000 HID - 1124 HID service class - 5000 interval ms - -HID profile ------------ -This is needed to configure only once. - SET PROFILE HID ON - RESET - -HID class ---------- - SET BT CLASS 005C0 // keyboard/mouse combined devie - -Pairing Security ----------------- -Secure Simple Pairing(SSP) - SET BT SSP 2 0 // Enables SSP for keyboard and Man-in-the-middle protection - SET BT SSP 3 0 // Enables SSP just works mode - -for keyboard with SSP - SET BT AUTH * 0000 - SET BT SSP 2 0 - SET CONTROL CONFIG 800 - RESET - -for keyboard without SSP - SET BT AUTH * 0000 - SET CONTROL CONFIG 800 - RESET - -AUTH - AUTH xx:xx:xx:xx:xx:xx? // Pairing request event - AUTH xx:xx:xx:xx:xx:xx 0000 - - SSP PASSKEY 78:dd:08:b7:e4:a2 ? - SSP PASSKEY 78:dd:08:b7:e4:a2 xxxxx - (SSP COMPLETE 78:dd:08:b7:e4:a2 HCI_ERROR_AUTH_FAIL // failed) - RING 0 78:dd:08:b7:e4:a2 11 HID - -Connecton - RING xx:xx:xx:xx:xx:xx xx HID // connection event - - KILL xx:xx:xx:xx:xx:xx - -Mode ----- -Command mode -Data mode - Raw mode - (Simple mode not for a real keyboard) - -Raw mode - Keyboard: - 0x9f, length(10), 0xa1, 0x01, mods, 0x00, key1, key2, key3, key4, key5, key6 - - Mouse: - 0x9f, length(5), 0xa1, 0x02, buttons, X, Y - - Consumer page: - 0x9f, length(5), 0xa1, 0x03, bitfield1, bitfield2, bitfield3 - - consumer page suage - Bitfield 1: - 0x01 Volume Increment - 0x02 Volume Decrement - 0x04 Mute - 0x08 Play/Pause - 0x10 Scan Next Track - 0x20 Scan Previous Track - 0x40 Stop - 0x80 Eject - Bitfield 2: - 0x01 Email Reader - 0x02 Application Control Search - 0x04 AC Bookmarks - 0x08 AC Home - 0x10 AC Back - 0x20 AC Forward - 0x40 AC Stop - 0x80 AC Refresh - Bitfield 3: - 0x01 Application Launch Generic Consumer Control - 0x02 AL Internet Browser - 0x04 AL Calculator - 0x08 AL Terminal Lock / Screensaver - 0x10 AL Local Machine Browser - 0x20 AC Minimize - 0x40 Record - 0x80 Rewind - - - - - -2011/07/13 -set -SET BT BDADDR 00:07:80:47:22:14 -SET BT NAME HHKB pro BT -SET BT CLASS 0005c0 -SET BT AUTH * 0000 -SET BT IDENT BT:47 f000 4.1.0 Bluegiga iWRAP -SET BT LAP 9e8b33 -SET BT PAGEMODE 4 2000 1 -SET BT PAIR 78:dd:08:b7:e4:a2 a191189cd7e51030ad6a07848ce879bb -SET BT POWER 3 3 3 -SET BT ROLE 0 f 7d00 -SET BT SNIFF 0 20 1 8 -SET BT SSP 2 1 -SET BT MTU 667 -SET CONTROL AUTOCALL 1124 3000 HID -SET CONTROL BAUD 38400,8n1 -SET CONTROL CD 00 0 -SET CONTROL ECHO 7 -SET CONTROL ESCAPE 43 00 1 -SET CONTROL GAIN 0 5 -SET CONTROL INIT SET CONTROL MUX 0 -SET CONTROL MSC DTE 00 00 00 00 00 00 -SET CONTROL MUX 1 -SET CONTROL PIO 00 00 -SET CONTROL READY 00 -SET PROFILE HID f HID -SET - -info config - -!!! THIS IS BETA RELEASE AND MAY BE USED FOR EVALUATION PURPOSES ONLY !!! - -WRAP THOR AI (4.1.0 build 435) -Copyright (c) 2003-2011 Bluegiga Technologies Inc. -Compiled on Jun 28 2011 17:19:51, running on WT12-A module, psr v31 - AVRCP BGIO FTP HFP HFP_AG HID HID_CONSUMER_PAGE HSP LEDS MAP OTA PBAP PIO=0x00fc SSP SUBRATE TEST VOLUME - - BOCK3 version 435 (Jun 28 2011 17:19:37) (max acl/sco 7/1) - - Bluetooth version 2.1, Power class 2 - - Loader 4279, firmware 6297 (56-bit encryption), native execution mode - - up 0 days, 06:23, 2 connections (pool 2) - - User configuration: -&028a = 0001 0000 0000 0011 0024 0000 0000 0010 0000 0080 0000 0000 0080 005f 009b 0034 00fb 0006 -&028b = 0000 0bb8 -&028d = 0001 -&0295 = 0000 0005 000b 0000 0003 0000 0000 0000 0000 0000 0000 -&0298 = a006 -&0299 = 0000 0000 -&02a3 = 0030 0030 0030 0030 -&02a4 = 009d 0000 -&02a5 = 0053 0045 0054 0020 0043 004f 004e 0054 0052 004f 004c 0020 004d 0055 0058 0020 0030 -&02a7 = 0000 05c0 -&02a8 = 4910 0000 0000 -&02aa = 0004 2000 0001 0033 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 -&02ac = 0000 0000 002b 0000 0000 0000 0000 0000 0000 0000 0002 0000 0000 0000 0010 0000 0000 0000 0000 029b 0000 0000 0000 0000 -&02ad = 4848 424b 7020 6f72 4220 0054 -&02b3 = 0005 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 -&02b7 = 000f 4948 0044 -&02bb = 8000 -READY. - - - - -2011/07/07 settings: -set -SET BT BDADDR 00:07:80:47:22:14 -SET BT NAME HHKB Pro BT -SET BT CLASS 0005c0 -SET BT AUTH * 000 -SET BT IDENT BT:47 f000 4.0.0 Bluegiga iWRAP -SET BT LAP 9e8b33 -SET BT PAGEMODE 4 2000 1 -SET BT PAIR 78:dd:08:b7:e4:a2 9e54d0aabb1b4d73cfccddb1ea4ef2d6 -SET BT POWER 3 3 3 -SET BT ROLE 0 f 7d00 -SET BT SNIFF 0 20 1 8 -SET BT SSP 3 0 -SET BT MTU 667 -SET CONTROL BAUD 38400,8n1 -SET CONTROL CD 00 0 -SET CONTROL ECHO 7 -SET CONTROL ESCAPE 255 00 1 -SET CONTROL GAIN 0 5 -SET CONTROL INIT set control mux 0 -SET CONTROL MSC DTE 00 00 00 00 00 00 -SET CONTROL PREAMP 1 1 -SET CONTROL READY 00 -SET PROFILE HID HID -SET PROFILE SPP Bluetooth Serial Port -SET - -info config -WRAP THOR AI (4.0.0 build 317) -Copyright (c) 2003-2010 Bluegiga Technologies Inc. -Compiled on Apr 20 2010 16:44:28, running on WT12-A module, psr v31 - AVRCP FTP PBAP PIO=0x00fc SSP SUBRATE VOLUME - - BOCK3 version 317 (Apr 20 2010 16:44:21) (max acl/sco 7/1) - - Bluetooth version 2.1, Power class 2 - - Loader 4279, firmware 6297 (56-bit encryption), native execution mode - - up 0 days, 00:00, 0 connections (pool 1) - - User configuration: -&028c = 0001 0020 0000 0001 0008 0000 -&028d = 0000 -&0296 = 0047 0001 f000 0400 6c42 6575 6967 6167 6920 5257 5041 -&0298 = c006 -&02a3 = 0030 0030 0030 -&02a4 = 009d 0000 -&02a5 = 0073 0065 0074 0020 0063 006f 006e 0074 0072 006f 006c 0020 006d 0075 0078 0020 0030 -&02a7 = 0000 05c0 -&02a8 = 0800 0000 0000 -&02ac = 0000 0000 00ff 0000 0000 0000 0000 0000 0000 0000 0002 0000 0000 0000 0010 0000 0000 0000 0000 029b 0000 0000 0000 0000 -&02ad = 4848 424b 5020 6f72 4220 0054 -&02b3 = 0004 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 -&02b7 = 0000 -&02bb = 6c42 6575 6f74 746f 2068 6553 6972 6c61 5020 726f 0074 -READY. - - - -2011/08/23: -SET BT BDADDR 00:07:80:47:22:14 -SET BT NAME HHKB pro BT -SET BT CLASS 0005c0 -SET BT AUTH * 0000 -SET BT IDENT BT:47 f000 4.1.0 Bluegiga iWRAP -SET BT LAP 9e8b33 -SET BT PAGEMODE 4 2000 1 -SET BT PAIRCOUNT 4 -SET BT POWER 3 3 3 -SET BT ROLE 1 f 12c0 -SET BT SNIFF 10 2 1 8 -SET BT SSP 3 0 -SET BT MTU 667 -SET CONTROL BAUD 38400,8n1 -SET CONTROL CD 00 0 -SET CONTROL ECHO 7 -SET CONTROL ESCAPE 43 00 1 -SET CONTROL GAIN 0 5 -SET CONTROL INIT SET CONTROL MUX 0 -SET CONTROL MSC DTE 00 00 00 00 00 00 -SET CONTROL MUX 1 -SET CONTROL PIO 00 00 -SET CONTROL READY 00 -SET PROFILE HID 7 HIDKeyboardMouse -SET - -SET CONTROL CONFIG 0000 0004 481e CLOCK_CACHE INTERLACED_INQ INTERLACED_PAGE DEEP_SLEEP INTERACTIVE_PIN UART_LATENCY 23D_NOKLUDGE - - - -2011/08/25: -SET BT BDADDR 00:07:80:47:22:14 -SET BT NAME HHKB pro BT -SET BT CLASS 0005c0 - -SET BT IDENT BT:47 f000 4.1.0 Bluegiga iWRAP -SET BT LAP 9e8b33 -SET BT PAGEMODE 4 2000 1 -SET BT PAIRCOUNT 4 -SET BT PAIR 78:dd:08:b7:e4:a2 0be83335a03fed8ededae42e99554e28 -SET BT POWER 3 3 3 -SET BT ROLE 1 f 12c0 -SET BT SNIFF 100 20 1 8 -SET BT SSP 3 0 -SET BT MTU 667 -SET CONTROL BAUD 38400,8n1 -SET CONTROL CD 00 0 -SET CONTROL ECHO 7 -SET CONTROL ESCAPE - 20 1 -SET CONTROL GAIN 0 5 -SET CONTROL INIT SET CONTROL MUX 0 -SET CONTROL MSC DTE 00 00 00 00 00 00 -SET CONTROL MUX 1 -SET CONTROL PIO 00 00 -SET CONTROL READY 00 -SET PROFILE HID f HIDKeyboardMouse -SET - - -SET CONTROL CONFIG 0000 0000 490e CLOCK_CACHE INTERLACED_INQ INTERLACED_PAGE KLUDGE INTERACTIVE_PIN UART_LATENCY - - -2011/09/08: -SET CONTROL CONFIG 0000 0000 410e CLOCK_CACHE INTERLACED_INQ INTERLACED_PAGE KLUDGE UART_LATENCY - - Removed INTERACTIVE_PIN to avoid interactive auth and use SET BT AUTH pin(0000). - - -EOF diff --git a/tmk_core/protocol/iwrap/iWRAP5.txt b/tmk_core/protocol/iwrap/iWRAP5.txt deleted file mode 100644 index ce3310f1b..000000000 --- a/tmk_core/protocol/iwrap/iWRAP5.txt +++ /dev/null @@ -1,356 +0,0 @@ -Terminology -=========== -PSM -HIDP HID Protocol -L2CAP Logical Link Control Adaptation Protocol -MTU Maximum Transmission Unit - - - -HID Protocol -============ -3 of HID_SPEC_V11.pdf - -Channel -------- -Control channel PSM=0x0011 -Interrupt channel PSM=0x0013 - -Message -------- -HANDSHAKE(0) -HID_CONTROL(1) - -GET_REPORT(4) - Host requests report(DATA payload on Control channel) from Device - Size Desc - ------------------------------------------------------------------------------ - HIDP-Hdr 1 7..4: HIDP Message TYpe(4: GET_REPORT) - 3: Size(1:2-octed buffer size, 0:size of the report) - 2: 0 - 1..0: Report Type(1:input, 2:output, 3: feature) - ReportID 1 Optional - BufferSize 2 Optional(specified when Size=1) - -SET_REPORT(5) -GET_PROTOCOL(6) -SET_PROTOCOL(7) - -DATA(A) - Input/Output Report: All DATA payloads flow on Interrupt channel. - Other: flows on Control channel. - Size Desc - ------------------------------------------------------------------------------ - HIDP-Hdr 1 7..4 0xA - 3..2 Reserved(0) - 1..0 Report Type(0:Other, 1:Input, 2:Output, 3:Feature) - Payload N Data - - - - -Boot Protocol -============= -3.3.2 -No report descriptor, fixed report descriptors defined. - -Device ReportID Size ---------------------------------- -Reserved 0 -Keyboard 1 9octets -Mouse 2 4octets -Reserved 3-255 - -Report descriptor ------------------ -Report ID is added to USB HID boot protocol descriptor. -Boot Protocol device doesn't need to supply descriptors. and can send extra data on end of boot report this data will be ignored unless host supports report descriptor. - -Report Protocol devices can have specific descriptors. Using Boot protocol descriptor followed by extra data may be useful for compatibility to Boot protocol only supported host. - -NOTE: -Bluegiga HID sample say report ID of mouse is 1 but 2? -Bluegiga HID sample say report ID of consumer page is 2 but 3? -** mouse.desc and consumer.desc were fixed. - size -keyboard.desc 67 0x43 -mouse.desc 60 0x3c -consumer.desc 82 0x52 -combo.desc 209 0xd1 - - - -SDP -=== -attributes(3.3.2) ----------- -HIDDeviceSubclass - which type is supported in Boot Protocol Mode - 7 6 - --- - 0 1 Keyboard - 1 0 Pointing device - 1 1 Combo keyboard/pointing device - -HIDBootDevice - TRUE -HIDReconnectInitiate - TRUE - - -Class of Device/Service -======================= -http://phys.sci.hokudai.ac.jp/LABS/yts/pic/GB002/Bluetooth_assigned_numbers_baseband.pdf - -0x0005C0 Keyboard and Pointing deivce(combo) - - - 23 16 15 8 7 0 - --------------------------------- - Service |Major |Minor |Format - - Format type - 1 0 - --- - 0 0 - - Minor Device Class of Peripheral Major - 7 6 - --- - 0 1 Keyboard - 1 0 Pointing device - 1 1 Combo keyboard/pointing device - - - Major device classes - 12 11 10 9 8 - -------------- - 0 0 0 0 0 Miscellaneous - 0 0 0 0 1 Computer - 0 0 0 1 0 Phone - 0 0 0 1 1 LAN /Network Access point - 0 0 1 0 0 Audio/Video (headset,speaker,stereo, video display, vcr..... - 0 0 1 0 1 *Peripheral (mouse, joystick, keyboards, ..... ) - 0 0 1 1 0 Imaging (printing, scanner, camera, display, ...) - 1 1 1 1 1 Uncategorized, specific device code not specified - X X X X X All other values reserved - - - Major service classes - bit - -------------------------------------- - 13 Limited Discoverable Mode [Ref #1] - 14 (reserved) - 15 (reserved) - 16 Positioning (Location identification) - 17 Networking (LAN, Ad hoc, ...) - 18 Rendering (Printing, Speaker, ...) - 19 Capturing (Scanner, Microphone, ...) - 20 Object Transfer (v-Inbox, v-Folder, ...) - 21 Audio (Speaker, Microphone, Headset service, ...) - 22 Telephony (Cordless telephony, Modem, Headset service, ...) - 23 Information (WEB-server, WAP-server, ...) - - - - -Authentication SSP -------------------- -SET BT SSP 2 0 PASS KEY entering -SET BT SSP 3 0 NO PASS KEY entering -SET BT SSP - : 0:display only 1:display+yes/no button 2:keyboard only 3:none -SET BT SSP 2 1 # 2:keyboard only 1:Man-in-the-middle protection is needed -SET BT SSP 2 0 # 2:keyboard only 0:Man-in-the-middle protection is not needed - - -SET BT SSP 2 1 - bond only if MITM protection is supported by host -SET BT SSP 2 0 - bond even if MITM protection is not supported by host - -On Windows 'Add device' causes SSP PASSKEY event on iWRAP - SSP PASSKEY 78:dd:08:b7:e4:a2 ? - -If device has display(0 or 1) this event occurs. User should be shown this code on the device. - SSP CONFIRM 78:dd:08:b7:e4:a2 517572 - - -SET BT SSP 3 0 - No input/output, No MITM protection. - Without procedure of authentication the divice is bond to host. - - -Connect -======= -CALL 78:dd:08:b7:e4:a2 11 HID - - -Setting -======== -Following settings need to be done before wiring into keyboard. -- UART speed: 38400bps(115200bps didn't work with software serial) -- No SSP procedure(without MITM protection) -- No Power Saving - -# clear pairing record and set default -SET BT PAIR * -SET RESET - -SET CONTROL INIT SET CONTROL MUX 0 -SET CONTROL BAUD 38400,8n1 -SET BT NAME TMK Blootooth WT12 -SET BT CLASS 0005c0 -SET BT AUTH * 0000 -SET BT SSP 3 0 -SET CONTROL CONFIG 4800 -SET PROFILE HID 0f c0 0100 00 en 0409 TMK Bluetooth keyboard(WT12) -SET PROFILE SPP - -# power saving? -SET BT SNIFF 100 20 1 8 - - -# Report Descriptor -# combo keyboard + mouse + consumer -HID SET d2 05010906a1010507850119e029e715002501750195088102950175088101950575010508850119012905910295017503910395067508150025650507190029658100c005010902a1010901a1008502050919012908150025017501950881020501093009311581257f750895028106093895018106050c0a380295018106c0c0050c0901a1018503050c1500250109e909ea09e209cd19b529b87501950881020a8a010a21020a2a021a23022a27027501950881020a83010a96010a92010a9e010a94010a060209b209b4750195088102c0 - - - -SET PROFILE HID ---------------- - SET PROFILE HID 0d c0 100 0 en 0409 HHKB pro Bluetooth keyboard - {function bit} uint8 - {subclass} uint8 - {version} uint16 - {country} uint8 - {BTlang} char[2] - {USBlang} uint16 - {name} string - - -SET BT CLASS ------------- - See Class of Device - composite device: keyboard and mouse - SET BT CLASS 005c0 - - - - - - ----------- -after setting ----------- -set -SET BT BDADDR 00:07:80:47:22:14 -SET BT NAME TMK Blootooth WT12 -SET BT CLASS 0005c0 -SET BT AUTH * 0000 -SET BT IDENT BT:47 f000 5.0.1 Bluegiga iWRAP -SET BT LAP 9e8b33 -SET BT PAGEMODE 4 2000 1 -SET BT PAIR 78:dd:08:b7:e4:a2 9e3d85c91bcae73fef8cc10bec18b42f -SET BT POWER 3 3 3 -SET BT ROLE 0 f 7d00 -SET BT SNIFF 0 20 1 8 -SET BT SSP 3 0 -SET BT MTU 667 -SET CONTROL BAUD 38400,8n1 -SET CONTROL CD 00 0 -SET CONTROL ECHO 7 -SET CONTROL ESCAPE 43 00 1 -SET CONTROL GAIN 0 5 -SET CONTROL INIT SET CONTROL MUX 0 -SET CONTROL MSC DTE 00 00 00 00 00 00 -SET CONTROL MUX 1 -SET CONTROL PIO 00 00 -SET CONTROL READY 00 -SET PROFILE HID 0f c0 0100 00 en 0409 TMK Bluetooth keyboard(WT12) -SET - -set control config list -SET CONTROL CONFIG 0000 0000 0000 4900 KLUDGE INTERACTIVE_PIN UART_LATENCY - - -info config -WRAP THOR AI (5.0.1 build 620) -Copyright (c) 2003-2012 Bluegiga Technologies Inc. -Compiled on Oct 1 2012 10:56:21, running on WT12-A module, psr v31 - BGIO FTP HFP HFP_AG HID HID_CONSUMER_PAGE HSP MAP MDP OTA PBAP PIO=0x00fc SSP SUBRATE TEST VOLUME - - BOCK4 version 620 (Oct 1 2012 10:56:03) (max acl/sco 7/1) - - Bluetooth version 3.0, Power class 2 - - Loader 8615, firmware 8825 (56-bit encryption), native execution mode - - up 0 days, 01:50, 2 connections (pool 2) - - User configuration: -&028d = 0001 -&0295 = 0000 0005 000b 0000 0003 0000 0000 0000 0000 0000 0000 -&0298 = c053 -&0299 = 0000 0000 -&02a3 = 0030 0030 0030 0030 -&02a4 = 009d 0000 -&02a5 = 0053 0045 0054 0020 0043 004f 004e 0054 0052 004f 004c 0020 004d 0055 0058 0020 0030 -&02a7 = 0000 05c0 -&02a8 = 0800 0000 0000 0000 -&02aa = 0004 2000 0001 0033 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 -&02ac = 0000 0000 002b 0000 0000 0000 0000 0000 0000 0000 0002 0000 0000 0000 0010 0000 0000 0000 0000 029b 0000 0000 0000 0000 -&02ad = 4d54 204b 6c42 6f6f 6f74 746f 2068 5457 3231 -&02b0 = fa65 b0aa 934a 077b a600 d1cc fe58 8dd5 -&02b3 = 0004 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 0003 0005 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0005 -&02b7 = 000f 00c0 0100 0000 0065 006e 0409 4d54 204b 6c42 6575 6f74 746f &02bb = 8000 -READY. ----------- - - - ------ -After 5.0.1 Firmware update -Firmware: ai-5.0.1-620-25b.bc4.dfu -PSR: wt12-a.ai-5.0.1-620-25b.psrf ------ -info config -WRAP THOR AI (5.0.1 build 620) -Copyright (c) 2003-2012 Bluegiga Technologies Inc. -Compiled on Oct 1 2012 10:56:21, running on WT12-A module, psr v31 - BGIO FTP HFP HFP_AG HID HID_CONSUMER_PAGE HSP MAP MDP OTA PBAP PIO=0x00fc SSP SUBRATE TEST VOLUME - - BOCK4 version 620 (Oct 1 2012 10:56:03) (max acl/sco 7/1) - - Bluetooth version 3.0, Power class 2 - - Loader 8615, firmware 8825 (56-bit encryption), native execution mode - - up 0 days, 00:03, 0 connections (pool 1) - - User configuration: -&0295 = 0000 0005 000b 0000 0003 0000 0000 0000 0000 0000 0000 -&0299 = 0000 0000 -&02aa = 0004 2000 0001 0033 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 -&02ac = 0000 0000 002b 0000 0000 0000 0000 0000 0000 0000 0002 0000 0000 0000 0010 0000 0000 0000 0000 029b 0000 0000 0000 0000 -&02ad = 5457 3231 412d -&02b0 = fa65 b0aa 934a 077b a600 d1cc fe58 8dd5 -READY. - -set -SET BT BDADDR 00:07:80:47:22:14 -SET BT NAME WT12-A -SET BT CLASS 001f00 -SET BT IDENT BT:47 f000 5.0.1 Bluegiga iWRAP -SET BT LAP 9e8b33 -SET BT PAGEMODE 4 2000 1 -SET BT PAIR 78:dd:08:b7:e4:a2 af18f81faa107e6dd068762ef921f48b -SET BT POWER 3 3 3 -SET BT ROLE 0 f 7d00 -SET BT SNIFF 0 20 1 8 -SET BT SSP 3 0 -SET BT MTU 667 -SET CONTROL BAUD 115200,8n1 -SET CONTROL CD 00 0 -SET CONTROL ECHO 7 -SET CONTROL ESCAPE 43 00 1 -SET CONTROL GAIN 0 5 -SET CONTROL MSC DTE 00 00 00 00 00 00 -SET CONTROL PIO 00 00 -SET CONTROL READY 00 -SET PROFILE SPP Bluetooth Serial Port -SET - -set control config list -SET CONTROL CONFIG 0000 0000 0000 0100 KLUDGE ---------- diff --git a/tmk_core/protocol/iwrap/iwrap.c b/tmk_core/protocol/iwrap/iwrap.c deleted file mode 100644 index 4d0ca5756..000000000 --- a/tmk_core/protocol/iwrap/iwrap.c +++ /dev/null @@ -1,420 +0,0 @@ -/* -Copyright 2011 Jun Wako - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see . -*/ - -/* host driver for Bulegiga iWRAP */ -/* Bluegiga BT12 - * Connections - * Hardware UART Software UART BlueTooth - * PC=====UART=======AVR=====SUART====iWRAP(BT12)-----------PC - * - * - Hardware UART for Debug Console to communicate iWRAP - * - Software UART for iWRAP control to send keyboard/mouse data - */ - -#include -#include -#include -#include -#include "keycode.h" -#include "suart.h" -#include "uart.h" -#include "report.h" -#include "host_driver.h" -#include "iwrap.h" -#include "print.h" - -/* iWRAP MUX mode utils. 3.10 HID raw mode(iWRAP_HID_Application_Note.pdf) */ -#define MUX_HEADER(LINK, LENGTH) \ - do { \ - xmit(0xbf); /* SOF */ \ - xmit(LINK); /* Link */ \ - xmit(0x00); /* Flags */ \ - xmit(LENGTH); /* Length */ \ - } while (0) -#define MUX_FOOTER(LINK) xmit(LINK ^ 0xff) - -static uint8_t connected = 0; -// static uint8_t channel = 1; - -/* iWRAP buffer */ -#define MUX_BUF_SIZE 64 -static char buf[MUX_BUF_SIZE]; -static uint8_t snd_pos = 0; - -#define MUX_RCV_BUF_SIZE 256 -static char rcv_buf[MUX_RCV_BUF_SIZE]; -static uint8_t rcv_head = 0; -static uint8_t rcv_tail = 0; - -/* receive buffer */ -static void rcv_enq(char c) { - uint8_t next = (rcv_head + 1) % MUX_RCV_BUF_SIZE; - if (next != rcv_tail) { - rcv_buf[rcv_head] = c; - rcv_head = next; - } -} - -static char rcv_deq(void) { - char c = 0; - if (rcv_head != rcv_tail) { - c = rcv_buf[rcv_tail++]; - rcv_tail %= MUX_RCV_BUF_SIZE; - } - return c; -} - -/* -static char rcv_peek(void) -{ - if (rcv_head == rcv_tail) - return 0; - return rcv_buf[rcv_tail]; -} -*/ - -static void rcv_clear(void) { rcv_tail = rcv_head = 0; } - -/* iWRAP response */ -ISR(PCINT1_vect, ISR_BLOCK) // recv() runs away in case of ISR_NOBLOCK -{ - if ((SUART_IN_PIN & (1 << SUART_IN_BIT))) return; - - static volatile uint8_t mux_state = 0xff; - static volatile uint8_t mux_link = 0xff; - uint8_t c = recv(); - switch (mux_state) { - case 0xff: // SOF - if (c == 0xbf) mux_state--; - break; - case 0xfe: // Link - mux_state--; - mux_link = c; - break; - case 0xfd: // Flags - mux_state--; - break; - case 0xfc: // Length - mux_state = c; - break; - case 0x00: - mux_state = 0xff; - mux_link = 0xff; - break; - default: - if (mux_state--) { - uart_putchar(c); - rcv_enq(c); - } - } -} - -/*------------------------------------------------------------------* - * iWRAP communication - *------------------------------------------------------------------*/ -void iwrap_init(void) { - // reset iWRAP if in already MUX mode after AVR software-reset - iwrap_send("RESET"); - iwrap_mux_send("RESET"); - _delay_ms(3000); - iwrap_send("\r\nSET CONTROL MUX 1\r\n"); - _delay_ms(500); - iwrap_check_connection(); -} - -void iwrap_mux_send(const char *s) { - rcv_clear(); - MUX_HEADER(0xff, strlen((char *)s)); - iwrap_send(s); - MUX_FOOTER(0xff); -} - -void iwrap_send(const char *s) { - while (*s) xmit(*s++); -} - -/* send buffer */ -void iwrap_buf_add(uint8_t c) { - // need space for '\0' - if (snd_pos < MUX_BUF_SIZE - 1) buf[snd_pos++] = c; -} - -void iwrap_buf_del(void) { - if (snd_pos) snd_pos--; -} - -void iwrap_buf_send(void) { - buf[snd_pos] = '\0'; - snd_pos = 0; - iwrap_mux_send(buf); -} - -void iwrap_call(void) { - char *p; - - iwrap_mux_send("SET BT PAIR"); - _delay_ms(500); - - p = rcv_buf + rcv_tail; - while (!strncmp(p, "SET BT PAIR", 11)) { - p += 7; - strncpy(p, "CALL", 4); - strncpy(p + 22, " 11 HID\n\0", 9); - print_S(p); - iwrap_mux_send(p); - // TODO: skip to next line - p += 57; - - DEBUG_LED_CONFIG; - DEBUG_LED_ON; - _delay_ms(500); - DEBUG_LED_OFF; - _delay_ms(500); - DEBUG_LED_ON; - _delay_ms(500); - DEBUG_LED_OFF; - _delay_ms(500); - DEBUG_LED_ON; - _delay_ms(500); - DEBUG_LED_OFF; - _delay_ms(500); - DEBUG_LED_ON; - _delay_ms(500); - DEBUG_LED_OFF; - _delay_ms(500); - DEBUG_LED_ON; - _delay_ms(500); - DEBUG_LED_OFF; - _delay_ms(500); - } - iwrap_check_connection(); -} - -void iwrap_kill(void) { - char c; - iwrap_mux_send("LIST"); - _delay_ms(500); - - while ((c = rcv_deq()) && c != '\n') - ; - if (strncmp(rcv_buf + rcv_tail, "LIST ", 5)) { - print("no connection to kill.\n"); - return; - } - // skip 10 'space' chars - for (uint8_t i = 10; i; i--) - while ((c = rcv_deq()) && c != ' ') - ; - - char *p = rcv_buf + rcv_tail - 5; - strncpy(p, "KILL ", 5); - strncpy(p + 22, "\n\0", 2); - print_S(p); - iwrap_mux_send(p); - _delay_ms(500); - - iwrap_check_connection(); -} - -void iwrap_unpair(void) { - iwrap_mux_send("SET BT PAIR"); - _delay_ms(500); - - char *p = rcv_buf + rcv_tail; - if (!strncmp(p, "SET BT PAIR", 11)) { - strncpy(p + 29, "\n\0", 2); - print_S(p); - iwrap_mux_send(p); - } -} - -void iwrap_sleep(void) { iwrap_mux_send("SLEEP"); } - -void iwrap_sniff(void) {} - -void iwrap_subrate(void) {} - -bool iwrap_failed(void) { - if (strncmp(rcv_buf, "SYNTAX ERROR", 12)) - return true; - else - return false; -} - -uint8_t iwrap_connected(void) { return connected; } - -uint8_t iwrap_check_connection(void) { - iwrap_mux_send("LIST"); - _delay_ms(100); - - if (strncmp(rcv_buf, "LIST ", 5) || !strncmp(rcv_buf, "LIST 0", 6)) - connected = 0; - else - connected = 1; - return connected; -} - -/*------------------------------------------------------------------* - * Host driver - *------------------------------------------------------------------*/ -static uint8_t keyboard_leds(void); -static void send_keyboard(report_keyboard_t *report); -static void send_mouse(report_mouse_t *report); -static void send_system(uint16_t data); -static void send_consumer(uint16_t data); - -static host_driver_t driver = {keyboard_leds, send_keyboard, send_mouse, send_system, send_consumer}; - -host_driver_t *iwrap_driver(void) { return &driver; } - -static uint8_t keyboard_leds(void) { return 0; } - -static void send_keyboard(report_keyboard_t *report) { - if (!iwrap_connected() && !iwrap_check_connection()) return; - MUX_HEADER(0x01, 0x0c); - // HID raw mode header - xmit(0x9f); - xmit(0x0a); // Length - xmit(0xa1); // DATA(Input) - xmit(0x01); // Report ID - xmit(report->mods); - xmit(0x00); // reserved byte(always 0) - xmit(report->keys[0]); - xmit(report->keys[1]); - xmit(report->keys[2]); - xmit(report->keys[3]); - xmit(report->keys[4]); - xmit(report->keys[5]); - MUX_FOOTER(0x01); -} - -static void send_mouse(report_mouse_t *report) { -#if defined(MOUSEKEY_ENABLE) || defined(PS2_MOUSE_ENABLE) || defined(POINTING_DEVICE_ENABLE) - if (!iwrap_connected() && !iwrap_check_connection()) return; - MUX_HEADER(0x01, 0x09); - // HID raw mode header - xmit(0x9f); - xmit(0x07); // Length - xmit(0xa1); // DATA(Input) - xmit(0x02); // Report ID - xmit(report->buttons); - xmit(report->x); - xmit(report->y); - xmit(report->v); - xmit(report->h); - MUX_FOOTER(0x01); -#endif -} - -static void send_system(uint16_t data) { /* not supported */ -} - -static void send_consumer(uint16_t data) { -#ifdef EXTRAKEY_ENABLE - static uint16_t last_data = 0; - uint8_t bits1 = 0; - uint8_t bits2 = 0; - uint8_t bits3 = 0; - - if (!iwrap_connected() && !iwrap_check_connection()) return; - if (data == last_data) return; - last_data = data; - - // 3.10 HID raw mode(iWRAP_HID_Application_Note.pdf) - switch (data) { - case AUDIO_VOL_UP: - bits1 = 0x01; - break; - case AUDIO_VOL_DOWN: - bits1 = 0x02; - break; - case AUDIO_MUTE: - bits1 = 0x04; - break; - case TRANSPORT_PLAY_PAUSE: - bits1 = 0x08; - break; - case TRANSPORT_NEXT_TRACK: - bits1 = 0x10; - break; - case TRANSPORT_PREV_TRACK: - bits1 = 0x20; - break; - case TRANSPORT_STOP: - bits1 = 0x40; - break; - case TRANSPORT_EJECT: - bits1 = 0x80; - break; - case AL_EMAIL: - bits2 = 0x01; - break; - case AC_SEARCH: - bits2 = 0x02; - break; - case AC_BOOKMARKS: - bits2 = 0x04; - break; - case AC_HOME: - bits2 = 0x08; - break; - case AC_BACK: - bits2 = 0x10; - break; - case AC_FORWARD: - bits2 = 0x20; - break; - case AC_STOP: - bits2 = 0x40; - break; - case AC_REFRESH: - bits2 = 0x80; - break; - case AL_CC_CONFIG: - bits3 = 0x01; - break; - case AL_CALCULATOR: - bits3 = 0x04; - break; - case AL_LOCK: - bits3 = 0x08; - break; - case AL_LOCAL_BROWSER: - bits3 = 0x10; - break; - case AC_MINIMIZE: - bits3 = 0x20; - break; - case TRANSPORT_RECORD: - bits3 = 0x40; - break; - case TRANSPORT_REWIND: - bits3 = 0x80; - break; - } - - MUX_HEADER(0x01, 0x07); - xmit(0x9f); - xmit(0x05); // Length - xmit(0xa1); // DATA(Input) - xmit(0x03); // Report ID - xmit(bits1); - xmit(bits2); - xmit(bits3); - MUX_FOOTER(0x01); -#endif -} diff --git a/tmk_core/protocol/iwrap/iwrap.h b/tmk_core/protocol/iwrap/iwrap.h deleted file mode 100644 index 51f2b5670..000000000 --- a/tmk_core/protocol/iwrap/iwrap.h +++ /dev/null @@ -1,47 +0,0 @@ -/* -Copyright 2011 Jun Wako - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see . -*/ - -#ifndef IWRAP_H -#define IWRAP_H - -#include -#include -#include "host_driver.h" - -/* enable iWRAP MUX mode */ -#define MUX_MODE - -host_driver_t *iwrap_driver(void); - -void iwrap_init(void); -void iwrap_send(const char *s); -void iwrap_mux_send(const char *s); -void iwrap_buf_send(void); -void iwrap_buf_add(uint8_t c); -void iwrap_buf_del(void); - -void iwrap_call(void); -void iwrap_kill(void); -void iwrap_unpair(void); -void iwrap_sleep(void); -void iwrap_sniff(void); -void iwrap_subrate(void); -bool iwrap_failed(void); -uint8_t iwrap_connected(void); -uint8_t iwrap_check_connection(void); - -#endif diff --git a/tmk_core/protocol/iwrap/main.c b/tmk_core/protocol/iwrap/main.c deleted file mode 100644 index 4048a9791..000000000 --- a/tmk_core/protocol/iwrap/main.c +++ /dev/null @@ -1,412 +0,0 @@ -/* -Copyright 2011 Jun Wako - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see . -*/ -#include -#include -#include -//#include -#include "wd.h" // in order to use watchdog in interrupt mode -#include -#include -#include -#include "keyboard.h" -#include "matrix.h" -#include "host.h" -#include "action.h" -#include "iwrap.h" -#ifdef PROTOCOL_VUSB -# include "vusb.h" -# include -#endif -#include "uart.h" -#include "suart.h" -#include "timer.h" -#include "debug.h" -#include "keycode.h" -#include "command.h" - -static void sleep(uint8_t term); -static bool console(void); -static bool console_command(uint8_t c); -static uint8_t key2asc(uint8_t key); - -/* -static void set_prr(void) -{ - power_adc_disable(); - power_spi_disable(); - power_twi_disable(); -#ifndef TIMER_H - //power_timer0_disable(); // used in timer.c -#endif - power_timer1_disable(); - power_timer2_disable(); -} -*/ - -/* -static void pullup_pins(void) -{ - // DDRs are set to 0(input) by default. -#ifdef PORTA - PORTA = 0xFF; -#endif - PORTB = 0xFF; - PORTC = 0xFF; - PORTD = 0xFF; -#ifdef PORTE - PORTE = 0xFF; -#endif -#ifdef PORTE - PORTF = 0xFF; -#endif -} -*/ - -#ifdef PROTOCOL_VUSB -static void disable_vusb(void) { - // disable interrupt & disconnect to prevent host from enumerating - USB_INTR_ENABLE &= ~(1 << USB_INTR_ENABLE_BIT); - usbDeviceDisconnect(); -} - -static void enable_vusb(void) { - USB_INTR_ENABLE |= (1 << USB_INTR_ENABLE_BIT); - usbDeviceConnect(); -} - -static void init_vusb(void) { - uint8_t i = 0; - - usbInit(); - disable_vusb(); - /* fake USB disconnect for > 250 ms */ - while (--i) { - _delay_ms(1); - } - enable_vusb(); -} -#endif - -void change_driver(host_driver_t *driver) { - /* - host_clear_keyboard_report(); - host_swap_keyboard_report(); - host_clear_keyboard_report(); - host_send_keyboard_report(); - */ - clear_keyboard(); - _delay_ms(1000); - host_set_driver(driver); -} - -static bool sleeping = false; -static bool insomniac = false; // TODO: should be false for power saving -static uint16_t last_timer = 0; - -int main(void) { - MCUSR = 0; - clock_prescale_set(clock_div_1); - WD_SET(WD_OFF); - - // power saving: the result is worse than nothing... why? - // pullup_pins(); - // set_prr(); - -#ifdef PROTOCOL_VUSB - disable_vusb(); -#endif - uart_init(115200); - keyboard_init(); - print("\nSend BREAK for UART Console Commands.\n"); - - // TODO: move to iWRAP/suart file - print("suart init\n"); - // suart init - // PC4: Tx Output IDLE(Hi) - PORTC |= (1 << 4); - DDRC |= (1 << 4); - // PC5: Rx Input(pull-up) - PORTC |= (1 << 5); - DDRC &= ~(1 << 5); - // suart receive interrut(PC5/PCINT13) - PCMSK1 = 0b00100000; - PCICR = 0b00000010; - - host_set_driver(iwrap_driver()); - - print("iwrap_init()\n"); - iwrap_init(); - iwrap_call(); - - last_timer = timer_read(); - while (true) { -#ifdef PROTOCOL_VUSB - if (host_get_driver() == vusb_driver()) usbPoll(); -#endif - keyboard_task(); -#ifdef PROTOCOL_VUSB - if (host_get_driver() == vusb_driver()) vusb_transfer_keyboard(); -#endif - // TODO: depricated - if (matrix_is_modified() || console()) { - last_timer = timer_read(); - sleeping = false; - } else if (!sleeping && timer_elapsed(last_timer) > 4000) { - sleeping = true; - iwrap_check_connection(); - } - - // TODO: suspend.h - if (host_get_driver() == iwrap_driver()) { - if (sleeping && !insomniac) { - _delay_ms(1); // wait for UART to send - iwrap_sleep(); - sleep(WDTO_60MS); - } - } - } -} - -static void sleep(uint8_t term) { - WD_SET(WD_IRQ, term); - - cli(); - set_sleep_mode(SLEEP_MODE_PWR_DOWN); - sleep_enable(); - sleep_bod_disable(); - sei(); - sleep_cpu(); - sleep_disable(); - - WD_SET(WD_OFF); -} - -static bool console(void) { - // Send to Bluetoot module WT12 - static bool breaked = false; - if (!uart_available()) - return false; - else { - uint8_t c; - c = uart_getchar(); - uart_putchar(c); - switch (c) { - case 0x00: // BREAK signal - if (!breaked) { - print("break(? for help): "); - breaked = true; - } - break; - case '\r': - uart_putchar('\n'); - iwrap_buf_send(); - break; - case '\b': - iwrap_buf_del(); - break; - default: - if (breaked) { - print("\n"); - console_command(c); - breaked = false; - } else { - iwrap_buf_add(c); - } - break; - } - return true; - } -} - -bool command_extra(uint8_t code) { return console_command(key2asc(code)); } - -static bool console_command(uint8_t c) { - switch (c) { - case 'h': - case '?': - print("\nCommands for Bluetooth(WT12/iWRAP):\n"); - print("r: reset. software reset by watchdog\n"); - print("i: insomniac. prevent KB from sleeping\n"); - print("c: iwrap_call. CALL for BT connection.\n"); -#ifdef PROTOCOL_VUSB - print("u: USB mode. switch to USB.\n"); - print("w: BT mode. switch to Bluetooth.\n"); -#endif - print("k: kill first connection.\n"); - print("Del: unpair first pairing.\n"); - print("\n"); - return 0; - case 'r': - print("reset\n"); - WD_AVR_RESET(); - return 1; - case 'i': - insomniac = !insomniac; - if (insomniac) - print("insomniac\n"); - else - print("not insomniac\n"); - return 1; - case 'c': - print("iwrap_call()\n"); - iwrap_call(); - return 1; -#ifdef PROTOCOL_VUSB - case 'u': - print("USB mode\n"); - init_vusb(); - change_driver(vusb_driver()); - // iwrap_kill(); - // iwrap_sleep(); - // disable suart receive interrut(PC5/PCINT13) - PCMSK1 &= ~(0b00100000); - PCICR &= ~(0b00000010); - return 1; - case 'w': - print("iWRAP mode\n"); - change_driver(iwrap_driver()); - disable_vusb(); - // enable suart receive interrut(PC5/PCINT13) - PCMSK1 |= 0b00100000; - PCICR |= 0b00000010; - return 1; -#endif - case 'k': - print("kill\n"); - iwrap_kill(); - return 1; - case 0x7F: // DELETE - print("unpair\n"); - iwrap_unpair(); - return 1; - } - return 0; -} - -// convert keycode into ascii charactor -static uint8_t key2asc(uint8_t key) { - switch (key) { - case KC_A: - return 'a'; - case KC_B: - return 'b'; - case KC_C: - return 'c'; - case KC_D: - return 'd'; - case KC_E: - return 'e'; - case KC_F: - return 'f'; - case KC_G: - return 'g'; - case KC_H: - return 'h'; - case KC_I: - return 'i'; - case KC_J: - return 'j'; - case KC_K: - return 'k'; - case KC_L: - return 'l'; - case KC_M: - return 'm'; - case KC_N: - return 'n'; - case KC_O: - return 'o'; - case KC_P: - return 'p'; - case KC_Q: - return 'q'; - case KC_R: - return 'r'; - case KC_S: - return 's'; - case KC_T: - return 't'; - case KC_U: - return 'u'; - case KC_V: - return 'v'; - case KC_W: - return 'w'; - case KC_X: - return 'x'; - case KC_Y: - return 'y'; - case KC_Z: - return 'z'; - case KC_1: - return '1'; - case KC_2: - return '2'; - case KC_3: - return '3'; - case KC_4: - return '4'; - case KC_5: - return '5'; - case KC_6: - return '6'; - case KC_7: - return '7'; - case KC_8: - return '8'; - case KC_9: - return '9'; - case KC_0: - return '0'; - case KC_ENTER: - return '\n'; - case KC_ESCAPE: - return 0x1B; - case KC_BSPACE: - return '\b'; - case KC_TAB: - return '\t'; - case KC_SPACE: - return ' '; - case KC_MINUS: - return '-'; - case KC_EQUAL: - return '='; - case KC_LBRACKET: - return '['; - case KC_RBRACKET: - return ']'; - case KC_BSLASH: - return '\\'; - case KC_NONUS_HASH: - return '#'; - case KC_SCOLON: - return ';'; - case KC_QUOTE: - return '\''; - case KC_GRAVE: - return '`'; - case KC_COMMA: - return ','; - case KC_DOT: - return '.'; - case KC_SLASH: - return '/'; - default: - return 0x00; - } -} diff --git a/tmk_core/protocol/iwrap/mux_exit.rb b/tmk_core/protocol/iwrap/mux_exit.rb deleted file mode 100644 index 1f6be48af..000000000 --- a/tmk_core/protocol/iwrap/mux_exit.rb +++ /dev/null @@ -1,7 +0,0 @@ -# -# Rescue from Bluegiga iWRAP MUX mode -# 6.75 of iWRAP5_User_Guid.pdf -# -[0xBF, 0xFF, 0x00, 0x11, 0x53, 0x45, 0x54, 0x20, 0x43, 0x4f, 0x4e, 0x54, 0x52, 0x4f, 0x4c, 0x20, 0x4d, 0x55, 0x58, 0x20, 0x30, 0x00].each do |x| - print x.chr -end diff --git a/tmk_core/protocol/iwrap/suart.S b/tmk_core/protocol/iwrap/suart.S deleted file mode 100644 index a873515e1..000000000 --- a/tmk_core/protocol/iwrap/suart.S +++ /dev/null @@ -1,156 +0,0 @@ -;---------------------------------------------------------------------------; -; Software implemented UART module ; -; (C)ChaN, 2005 (http://elm-chan.org/) ; -;---------------------------------------------------------------------------; -; Bit rate settings: -; -; 1MHz 2MHz 4MHz 6MHz 8MHz 10MHz 12MHz 16MHz 20MHz -; 2.4kbps 138 - - - - - - - - -; 4.8kbps 68 138 - - - - - - - -; 9.6kbps 33 68 138 208 - - - - - -; 19.2kbps - 33 68 102 138 173 208 - - -; 38.4kbps - - 33 50 68 85 102 138 172 -; 57.6kbps - - 21 33 44 56 68 91 114 -; 115.2kbps - - - - 21 27 33 44 56 - -.nolist -#include -.list - -#define BPS 102 /* Bit delay. (see above table) */ -#define BIDIR 0 /* 0:Separated Tx/Rx, 1:Shared Tx/Rx */ - -#define OUT_1 sbi _SFR_IO_ADDR(SUART_OUT_PORT), SUART_OUT_BIT /* Output 1 */ -#define OUT_0 cbi _SFR_IO_ADDR(SUART_OUT_PORT), SUART_OUT_BIT /* Output 0 */ -#define SKIP_IN_1 sbis _SFR_IO_ADDR(SUART_IN_PIN), SUART_IN_BIT /* Skip if 1 */ -#define SKIP_IN_0 sbic _SFR_IO_ADDR(SUART_IN_PIN), SUART_IN_BIT /* Skip if 0 */ - - - -#ifdef SPM_PAGESIZE -.macro _LPMI reg - lpm \reg, Z+ -.endm -.macro _MOVW dh,dl, sh,sl - movw \dl, \sl -.endm -#else -.macro _LPMI reg - lpm - mov \reg, r0 - adiw ZL, 1 -.endm -.macro _MOVW dh,dl, sh,sl - mov \dl, \sl - mov \dh, \sh -.endm -#endif - - - -;---------------------------------------------------------------------------; -; Transmit a byte in serial format of N81 -; -;Prototype: void xmit (uint8_t data); -;Size: 16 words - -.global xmit -.func xmit -xmit: -#if BIDIR - ldi r23, BPS-1 ;Pre-idle time for bidirectional data line -5: dec r23 ; - brne 5b ;/ -#endif - in r0, _SFR_IO_ADDR(SREG) ;Save flags - - com r24 ;C = start bit - ldi r25, 10 ;Bit counter - cli ;Start critical section - -1: ldi r23, BPS-1 ;----- Bit transferring loop -2: dec r23 ;Wait for a bit time - brne 2b ;/ - brcs 3f ;MISO = bit to be sent - OUT_1 ; -3: brcc 4f ; - OUT_0 ;/ -4: lsr r24 ;Get next bit into C - dec r25 ;All bits sent? - brne 1b ; no, coutinue - - out _SFR_IO_ADDR(SREG), r0 ;End of critical section - ret -.endfunc - - - -;---------------------------------------------------------------------------; -; Receive a byte -; -;Prototype: uint8_t rcvr (void); -;Size: 19 words - -.global rcvr -.func rcvr -rcvr: - in r0, _SFR_IO_ADDR(SREG) ;Save flags - - ldi r24, 0x80 ;Receiving shift reg - cli ;Start critical section - -1: SKIP_IN_1 ;Wait for idle - rjmp 1b -2: SKIP_IN_0 ;Wait for start bit - rjmp 2b - ldi r25, BPS/2 ;Wait for half bit time -3: dec r25 - brne 3b - -4: ldi r25, BPS ;----- Bit receiving loop -5: dec r25 ;Wait for a bit time - brne 5b ;/ - lsr r24 ;Next bit - SKIP_IN_0 ;Get a data bit into r24.7 - ori r24, 0x80 - brcc 4b ;All bits received? no, continue - - out _SFR_IO_ADDR(SREG), r0 ;End of critical section - ret -.endfunc - - -; Not wait for start bit. This should be called after detecting start bit. -.global recv -.func recv -recv: - in r0, _SFR_IO_ADDR(SREG) ;Save flags - - ldi r24, 0x80 ;Receiving shift reg - cli ;Start critical section - -;1: SKIP_IN_1 ;Wait for idle -; rjmp 1b -;2: SKIP_IN_0 ;Wait for start bit -; rjmp 2b - ldi r25, BPS/2 ;Wait for half bit time -3: dec r25 - brne 3b - -4: ldi r25, BPS ;----- Bit receiving loop -5: dec r25 ;Wait for a bit time - brne 5b ;/ - lsr r24 ;Next bit - SKIP_IN_0 ;Get a data bit into r24.7 - ori r24, 0x80 - brcc 4b ;All bits received? no, continue - - ldi r25, BPS/2 ;Wait for half bit time -6: dec r25 - brne 6b -7: SKIP_IN_1 ;Wait for stop bit - rjmp 7b - - out _SFR_IO_ADDR(SREG), r0 ;End of critical section - ret -.endfunc diff --git a/tmk_core/protocol/iwrap/suart.h b/tmk_core/protocol/iwrap/suart.h deleted file mode 100644 index c634bbc2f..000000000 --- a/tmk_core/protocol/iwrap/suart.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef SUART -#define SUART - -void xmit(uint8_t); -uint8_t rcvr(void); -uint8_t recv(void); - -#endif /* SUART */ diff --git a/tmk_core/protocol/iwrap/wd.h b/tmk_core/protocol/iwrap/wd.h deleted file mode 100644 index 083d6d44d..000000000 --- a/tmk_core/protocol/iwrap/wd.h +++ /dev/null @@ -1,161 +0,0 @@ -/* This is from http://www.mtcnet.net/~henryvm/wdt/ */ -#ifndef _AVR_WD_H_ -#define _AVR_WD_H_ - -#include - -/* -Copyright (c) 2009, Curt Van Maanen - -Permission to use, copy, modify, and/or distribute this software for any -purpose with or without fee is hereby granted, provided that the above -copyright notice and this permission notice appear in all copies. - -THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - - -include usage- - #include "wd.h" //if in same directory as project - #include //if wd.h is in avr directory - -set watchdog modes and prescale - -usage- - WD_SET(mode,[timeout]); //prescale always set - -modes- - WD_OFF disabled - WD_RST normal reset mode - WD_IRQ interrupt only mode (if supported) - WD_RST_IRQ interrupt+reset mode (if supported) - -timeout- - WDTO_15MS default if no timeout provided - WDTO_30MS - WDTO_60MS - WDTO_120MS - WDTO_250MS - WDTO_500MS - WDTO_1S - WDTO_2S - WDTO_4S (if supported) - WDTO_8S (if supported) - -examples- - WD_SET(WD_RST,WDTO_1S); //reset mode, 1s timeout - WD_SET(WD_OFF); //watchdog disabled (if not fused on) - WD_SET(WD_RST); //reset mode, 15ms (default timeout) - WD_SET(WD_IRQ,WDTO_120MS); //interrupt only mode, 120ms timeout - WD_SET(WD_RST_IRQ,WDTO_2S); //interrupt+reset mode, 2S timeout - - -for enhanced watchdogs, if the watchdog is not being used WDRF should be -cleared on every power up or reset, along with disabling the watchdog- - WD_DISABLE(); //clear WDRF, then turn off watchdog - -*/ - -// reset registers to the same name (MCUCSR) -#if !defined(MCUCSR) -# define MCUCSR MCUSR -#endif - -// watchdog registers to the same name (WDTCSR) -#if !defined(WDTCSR) -# define WDTCSR WDTCR -#endif - -// if enhanced watchdog, define irq values, create disable macro -#if defined(WDIF) -# define WD_IRQ 0xC0 -# define WD_RST_IRQ 0xC8 -# define WD_DISABLE() \ - do { \ - MCUCSR &= ~(1 << WDRF); \ - WD_SET(WD_OFF); \ - } while (0) -#endif - -// all watchdogs -#define WD_RST 8 -#define WD_OFF 0 - -// prescale values -#define WDTO_15MS 0 -#define WDTO_30MS 1 -#define WDTO_60MS 2 -#define WDTO_120MS 3 -#define WDTO_250MS 4 -#define WDTO_500MS 5 -#define WDTO_1S 6 -#define WDTO_2S 7 - -// prescale values for avrs with WDP3 -#if defined(WDP3) -# define WDTO_4S 0x20 -# define WDTO_8S 0x21 -#endif - -// watchdog reset -#define WDR() __asm__ __volatile__("wdr") - -// avr reset using watchdog -#define WD_AVR_RESET() \ - do { \ - __asm__ __volatile__("cli"); \ - WD_SET_UNSAFE(WD_RST); \ - while (1) \ - ; \ - } while (0) - -/*set the watchdog- -1. save SREG -2. turn off irq's -3. reset watchdog timer -4. enable watchdog change -5. write watchdog value -6. restore SREG (restoring irq status) -*/ -#define WD_SET(val, ...) \ - __asm__ __volatile__("in __tmp_reg__,__SREG__" \ - "\n\t" \ - "cli" \ - "\n\t" \ - "wdr" \ - "\n\t" \ - "sts %[wdreg],%[wden]" \ - "\n\t" \ - "sts %[wdreg],%[wdval]" \ - "\n\t" \ - "out __SREG__,__tmp_reg__" \ - "\n\t" \ - : \ - : [ wdreg ] "M"(&WDTCSR), [ wden ] "r"((uint8_t)(0x18)), [ wdval ] "r"((uint8_t)(val | (__VA_ARGS__ + 0))) \ - : "r0") - -/*set the watchdog when I bit in SREG known to be clear- -1. reset watchdog timer -2. enable watchdog change -5. write watchdog value -*/ -#define WD_SET_UNSAFE(val, ...) \ - __asm__ __volatile__("wdr" \ - "\n\t" \ - "sts %[wdreg],%[wden]" \ - "\n\t" \ - "sts %[wdreg],%[wdval]" \ - "\n\t" \ - : \ - : [ wdreg ] "M"(&WDTCSR), [ wden ] "r"((uint8_t)(0x18)), [ wdval ] "r"((uint8_t)(val | (__VA_ARGS__ + 0)))) - -// for compatibility with avr/wdt.h -#define wdt_enable(val) WD_SET(WD_RST, val) -#define wdt_disable() WD_SET(WD_OFF) - -#endif /* _AVR_WD_H_ */ diff --git a/tmk_core/readme.md b/tmk_core/readme.md index 5b719bca5..a754cfee4 100644 --- a/tmk_core/readme.md +++ b/tmk_core/readme.md @@ -84,8 +84,8 @@ Architecture / /| Keys/Mouse | Protocol |d| | Action | | | Protocol | /__________/ |<-----------| LUFA |r| | Layer, Tap | | | Matrix | |.--------.| | LED | V-USB |i| |-------------| | | PS/2,IBM | __________________ - || || |----------->| iWRAP(BT)|v| | Keymap | | | ADB,M0110| Keys / /_/_/_/_/_/_/_/ /| - || Host || | Console | UART |e| | Mousekey | | | SUN/NEWS |<----------/ /_/_/_/_/_/_/_/ / / + || || |----------->| UART |v| | Keymap | | | ADB,M0110| Keys / /_/_/_/_/_/_/_/ /| + || Host || | Console | |e| | Mousekey | | | SUN/NEWS |<----------/ /_/_/_/_/_/_/_/ / / ||________||/.<-----------| |r| | Report | | | X68K/PC98| Control / /_/_/_/_/_/_/_/ / / `_========_'/| |---------------------------------------------|-------->/___ /_______/ ___/ / |_o______o_|/ | Sendchar, Print, Debug, Command, ... | |_________________|/ @@ -133,7 +133,6 @@ Files and Directories ### Keyboard Protocols * lufa/ - LUFA USB stack * vusb/ - Objective Development V-USB -* iwrap/ - Bluetooth HID for Bluegiga iWRAP * ps2.c - PS/2 protocol * adb.c - Apple Desktop Bus protocol * m0110.c - Macintosh 128K/512K/Plus keyboard protocol -- cgit v1.3.1 From 385d49cc39b57e74203e0c1c78c0789d249e4742 Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Sat, 6 Jun 2020 18:52:19 +1000 Subject: Initial work for consolidation of ChibiOS platform files (#8327) * Initial work for consolidation of board files and default ChibiOS configs. * Migrate F401/F411 black pills for testing. * Add early init bootloader jump flag. * Add support for I2C in order to use i2c_scanner keymap. * Add F401/F411 HSE bypass to get things booting. * Exempt "hooked" ChibiOS conf files from updater script. * Fix up ordering for bootloader_defs file check. * Match previous $(KEYBOARD_PATHS) value for Proton-C, updated for all board configs. --- build_keyboard.mk | 9 +- drivers/boards/BLACKPILL_STM32_F401/board.c | 250 ---- drivers/boards/BLACKPILL_STM32_F401/board.h | 568 ---------- drivers/boards/BLACKPILL_STM32_F401/board.mk | 9 - .../boards/BLACKPILL_STM32_F401/cfg/board.chcfg | 1193 -------------------- drivers/boards/BLACKPILL_STM32_F401/cfg/board.fmpp | 15 - drivers/boards/BLACKPILL_STM32_F411/board.c | 250 ---- drivers/boards/BLACKPILL_STM32_F411/board.h | 583 ---------- drivers/boards/BLACKPILL_STM32_F411/board.mk | 9 - .../boards/BLACKPILL_STM32_F411/cfg/board.chcfg | 1193 -------------------- drivers/boards/BLACKPILL_STM32_F411/cfg/board.fmpp | 15 - drivers/boards/GENERIC_STM32_F072XB/board.c | 250 ---- drivers/boards/GENERIC_STM32_F072XB/board.h | 407 ------- drivers/boards/GENERIC_STM32_F072XB/board.mk | 9 - .../boards/GENERIC_STM32_F072XB/bootloader_defs.h | 7 - .../boards/GENERIC_STM32_F072XB/cfg/board.chcfg | 703 ------------ drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp | 15 - drivers/boards/GENERIC_STM32_F303XC/board.c | 242 ---- drivers/boards/GENERIC_STM32_F303XC/board.h | 475 -------- drivers/boards/GENERIC_STM32_F303XC/board.mk | 5 - .../boards/GENERIC_STM32_F303XC/bootloader_defs.h | 7 - drivers/boards/IC_TEENSY_3_1/board.c | 146 --- drivers/boards/IC_TEENSY_3_1/board.h | 295 ----- drivers/boards/IC_TEENSY_3_1/board.mk | 5 - drivers/boards/STM32_F103_STM32DUINO/board.c | 56 - drivers/boards/STM32_F103_STM32DUINO/board.h | 166 --- drivers/boards/STM32_F103_STM32DUINO/board.mk | 5 - drivers/boards/ld/MKL26Z64.ld | 105 -- .../boards/ld/STM32F103x8_stm32duino_bootloader.ld | 88 -- keyboards/handwired/onekey/blackpill_f401/chconf.h | 714 ------------ .../handwired/onekey/blackpill_f401/halconf.h | 537 +-------- .../handwired/onekey/blackpill_f401/mcuconf.h | 264 +---- keyboards/handwired/onekey/blackpill_f411/chconf.h | 714 ------------ .../handwired/onekey/blackpill_f411/halconf.h | 537 +-------- .../handwired/onekey/blackpill_f411/mcuconf.h | 264 +---- .../ixora/boards/GENERIC_STM32_F042X6/board.c | 268 ----- .../ixora/boards/GENERIC_STM32_F042X6/board.h | 896 --------------- .../ixora/boards/GENERIC_STM32_F042X6/board.mk | 5 - keyboards/peiorisboards/ixora/bootloader_defs.h | 7 - .../vinta/boards/GENERIC_STM32_F042X6/board.c | 268 ----- .../vinta/boards/GENERIC_STM32_F042X6/board.h | 896 --------------- .../vinta/boards/GENERIC_STM32_F042X6/board.mk | 5 - keyboards/vinta/bootloader_defs.h | 7 - lib/python/qmk/cli/cformat.py | 4 +- .../chibios/BLACKPILL_STM32_F401/board/board.mk | 9 + .../chibios/BLACKPILL_STM32_F401/configs/board.h | 20 + .../chibios/BLACKPILL_STM32_F401/configs/chconf.h | 714 ++++++++++++ .../chibios/BLACKPILL_STM32_F401/configs/config.h | 23 + .../chibios/BLACKPILL_STM32_F401/configs/halconf.h | 525 +++++++++ .../chibios/BLACKPILL_STM32_F401/configs/mcuconf.h | 253 +++++ .../chibios/BLACKPILL_STM32_F411/board/board.mk | 9 + .../chibios/BLACKPILL_STM32_F411/configs/board.h | 20 + .../chibios/BLACKPILL_STM32_F411/configs/chconf.h | 714 ++++++++++++ .../chibios/BLACKPILL_STM32_F411/configs/config.h | 23 + .../chibios/BLACKPILL_STM32_F411/configs/halconf.h | 525 +++++++++ .../chibios/BLACKPILL_STM32_F411/configs/mcuconf.h | 253 +++++ .../chibios/GENERIC_STM32_F042X6/board/board.c | 269 +++++ .../chibios/GENERIC_STM32_F042X6/board/board.h | 896 +++++++++++++++ .../chibios/GENERIC_STM32_F042X6/board/board.mk | 9 + .../GENERIC_STM32_F042X6/configs/bootloader_defs.h | 7 + .../chibios/GENERIC_STM32_F072XB/board/board.c | 250 ++++ .../chibios/GENERIC_STM32_F072XB/board/board.h | 407 +++++++ .../chibios/GENERIC_STM32_F072XB/board/board.mk | 9 + .../GENERIC_STM32_F072XB/configs/bootloader_defs.h | 7 + .../chibios/GENERIC_STM32_F303XC/board/board.c | 242 ++++ .../chibios/GENERIC_STM32_F303XC/board/board.h | 475 ++++++++ .../chibios/GENERIC_STM32_F303XC/board/board.mk | 9 + .../GENERIC_STM32_F303XC/configs/bootloader_defs.h | 7 + .../chibios/GENERIC_STM32_F303XC/configs/chconf.h | 714 ++++++++++++ .../chibios/GENERIC_STM32_F303XC/configs/halconf.h | 525 +++++++++ .../chibios/GENERIC_STM32_F303XC/configs/mcuconf.h | 273 +++++ .../GENERIC_STM32_F303XC/configs/proton_c.mk | 9 + platforms/chibios/IC_TEENSY_3_1/board/board.c | 146 +++ platforms/chibios/IC_TEENSY_3_1/board/board.h | 295 +++++ platforms/chibios/IC_TEENSY_3_1/board/board.mk | 9 + .../chibios/STM32_F103_STM32DUINO/board/board.c | 59 + .../chibios/STM32_F103_STM32DUINO/board/board.h | 166 +++ .../chibios/STM32_F103_STM32DUINO/board/board.mk | 9 + .../chibios/keyboard-config-templates/board.h | 20 + .../chibios/keyboard-config-templates/chconf.h | 20 + .../chibios/keyboard-config-templates/halconf.h | 20 + .../chibios/keyboard-config-templates/mcuconf.h | 21 + platforms/chibios/ld/MKL26Z64.ld | 105 ++ .../ld/STM32F103x8_stm32duino_bootloader.ld | 88 ++ quantum/stm32/chconf.h | 712 ------------ quantum/stm32/halconf.h | 524 --------- quantum/stm32/mcuconf.h | 273 ----- quantum/stm32/proton_c.mk | 47 - tmk_core/chibios.mk | 113 +- util/chibios-upgrader.sh | 6 +- util/travis_compiled_push.sh | 2 +- 91 files changed, 8312 insertions(+), 13985 deletions(-) delete mode 100644 drivers/boards/BLACKPILL_STM32_F401/board.c delete mode 100644 drivers/boards/BLACKPILL_STM32_F401/board.h delete mode 100644 drivers/boards/BLACKPILL_STM32_F401/board.mk delete mode 100644 drivers/boards/BLACKPILL_STM32_F401/cfg/board.chcfg delete mode 100644 drivers/boards/BLACKPILL_STM32_F401/cfg/board.fmpp delete mode 100644 drivers/boards/BLACKPILL_STM32_F411/board.c delete mode 100644 drivers/boards/BLACKPILL_STM32_F411/board.h delete mode 100644 drivers/boards/BLACKPILL_STM32_F411/board.mk delete mode 100644 drivers/boards/BLACKPILL_STM32_F411/cfg/board.chcfg delete mode 100644 drivers/boards/BLACKPILL_STM32_F411/cfg/board.fmpp delete mode 100644 drivers/boards/GENERIC_STM32_F072XB/board.c delete mode 100644 drivers/boards/GENERIC_STM32_F072XB/board.h delete mode 100644 drivers/boards/GENERIC_STM32_F072XB/board.mk delete mode 100644 drivers/boards/GENERIC_STM32_F072XB/bootloader_defs.h delete mode 100644 drivers/boards/GENERIC_STM32_F072XB/cfg/board.chcfg delete mode 100644 drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp delete mode 100644 drivers/boards/GENERIC_STM32_F303XC/board.c delete mode 100644 drivers/boards/GENERIC_STM32_F303XC/board.h delete mode 100644 drivers/boards/GENERIC_STM32_F303XC/board.mk delete mode 100644 drivers/boards/GENERIC_STM32_F303XC/bootloader_defs.h delete mode 100644 drivers/boards/IC_TEENSY_3_1/board.c delete mode 100644 drivers/boards/IC_TEENSY_3_1/board.h delete mode 100644 drivers/boards/IC_TEENSY_3_1/board.mk delete mode 100644 drivers/boards/STM32_F103_STM32DUINO/board.c delete mode 100644 drivers/boards/STM32_F103_STM32DUINO/board.h delete mode 100644 drivers/boards/STM32_F103_STM32DUINO/board.mk delete mode 100644 drivers/boards/ld/MKL26Z64.ld delete mode 100644 drivers/boards/ld/STM32F103x8_stm32duino_bootloader.ld delete mode 100644 keyboards/handwired/onekey/blackpill_f401/chconf.h delete mode 100644 keyboards/handwired/onekey/blackpill_f411/chconf.h delete mode 100644 keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.c delete mode 100644 keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.h delete mode 100644 keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.mk delete mode 100644 keyboards/peiorisboards/ixora/bootloader_defs.h delete mode 100644 keyboards/vinta/boards/GENERIC_STM32_F042X6/board.c delete mode 100644 keyboards/vinta/boards/GENERIC_STM32_F042X6/board.h delete mode 100644 keyboards/vinta/boards/GENERIC_STM32_F042X6/board.mk delete mode 100644 keyboards/vinta/bootloader_defs.h create mode 100644 platforms/chibios/BLACKPILL_STM32_F401/board/board.mk create mode 100644 platforms/chibios/BLACKPILL_STM32_F401/configs/board.h create mode 100644 platforms/chibios/BLACKPILL_STM32_F401/configs/chconf.h create mode 100644 platforms/chibios/BLACKPILL_STM32_F401/configs/config.h create mode 100644 platforms/chibios/BLACKPILL_STM32_F401/configs/halconf.h create mode 100644 platforms/chibios/BLACKPILL_STM32_F401/configs/mcuconf.h create mode 100644 platforms/chibios/BLACKPILL_STM32_F411/board/board.mk create mode 100644 platforms/chibios/BLACKPILL_STM32_F411/configs/board.h create mode 100644 platforms/chibios/BLACKPILL_STM32_F411/configs/chconf.h create mode 100644 platforms/chibios/BLACKPILL_STM32_F411/configs/config.h create mode 100644 platforms/chibios/BLACKPILL_STM32_F411/configs/halconf.h create mode 100644 platforms/chibios/BLACKPILL_STM32_F411/configs/mcuconf.h create mode 100644 platforms/chibios/GENERIC_STM32_F042X6/board/board.c create mode 100644 platforms/chibios/GENERIC_STM32_F042X6/board/board.h create mode 100644 platforms/chibios/GENERIC_STM32_F042X6/board/board.mk create mode 100644 platforms/chibios/GENERIC_STM32_F042X6/configs/bootloader_defs.h create mode 100644 platforms/chibios/GENERIC_STM32_F072XB/board/board.c create mode 100644 platforms/chibios/GENERIC_STM32_F072XB/board/board.h create mode 100644 platforms/chibios/GENERIC_STM32_F072XB/board/board.mk create mode 100644 platforms/chibios/GENERIC_STM32_F072XB/configs/bootloader_defs.h create mode 100644 platforms/chibios/GENERIC_STM32_F303XC/board/board.c create mode 100644 platforms/chibios/GENERIC_STM32_F303XC/board/board.h create mode 100644 platforms/chibios/GENERIC_STM32_F303XC/board/board.mk create mode 100644 platforms/chibios/GENERIC_STM32_F303XC/configs/bootloader_defs.h create mode 100644 platforms/chibios/GENERIC_STM32_F303XC/configs/chconf.h create mode 100644 platforms/chibios/GENERIC_STM32_F303XC/configs/halconf.h create mode 100644 platforms/chibios/GENERIC_STM32_F303XC/configs/mcuconf.h create mode 100644 platforms/chibios/GENERIC_STM32_F303XC/configs/proton_c.mk create mode 100644 platforms/chibios/IC_TEENSY_3_1/board/board.c create mode 100644 platforms/chibios/IC_TEENSY_3_1/board/board.h create mode 100644 platforms/chibios/IC_TEENSY_3_1/board/board.mk create mode 100644 platforms/chibios/STM32_F103_STM32DUINO/board/board.c create mode 100644 platforms/chibios/STM32_F103_STM32DUINO/board/board.h create mode 100644 platforms/chibios/STM32_F103_STM32DUINO/board/board.mk create mode 100644 platforms/chibios/keyboard-config-templates/board.h create mode 100644 platforms/chibios/keyboard-config-templates/chconf.h create mode 100644 platforms/chibios/keyboard-config-templates/halconf.h create mode 100644 platforms/chibios/keyboard-config-templates/mcuconf.h create mode 100644 platforms/chibios/ld/MKL26Z64.ld create mode 100644 platforms/chibios/ld/STM32F103x8_stm32duino_bootloader.ld delete mode 100644 quantum/stm32/chconf.h delete mode 100644 quantum/stm32/halconf.h delete mode 100644 quantum/stm32/mcuconf.h delete mode 100644 quantum/stm32/proton_c.mk (limited to 'tmk_core') diff --git a/build_keyboard.mk b/build_keyboard.mk index 410870487..b4e1efd9e 100644 --- a/build_keyboard.mk +++ b/build_keyboard.mk @@ -16,7 +16,6 @@ include common.mk KEYBOARD_FILESAFE := $(subst /,_,$(KEYBOARD)) TARGET ?= $(KEYBOARD_FILESAFE)_$(KEYMAP) KEYBOARD_OUTPUT := $(BUILD_DIR)/obj_$(KEYBOARD_FILESAFE) -STM32_PATH := quantum/stm32 # Force expansion TARGET := $(TARGET) @@ -138,7 +137,7 @@ endif ifeq ($(strip $(CONVERT_TO_PROTON_C)), yes) TARGET := $(TARGET)_proton_c - include $(STM32_PATH)/proton_c.mk + include platforms/chibios/GENERIC_STM32_F303XC/configs/proton_c.mk OPT_DEFS += -DCONVERT_TO_PROTON_C endif @@ -148,12 +147,6 @@ endif include quantum/mcu_selection.mk -ifdef MCU_FAMILY - OPT_DEFS += -DQMK_STM32 - KEYBOARD_PATHS += $(STM32_PATH) -endif - - # Find all the C source files to be compiled in subfolders. KEYBOARD_SRC := diff --git a/drivers/boards/BLACKPILL_STM32_F401/board.c b/drivers/boards/BLACKPILL_STM32_F401/board.c deleted file mode 100644 index 330e06c8a..000000000 --- a/drivers/boards/BLACKPILL_STM32_F401/board.c +++ /dev/null @@ -1,250 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * This file has been automatically generated using ChibiStudio board - * generator plugin. Do not edit manually. - */ - -#include "hal.h" -#include "stm32_gpio.h" - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/** - * @brief Type of STM32 GPIO port setup. - */ -typedef struct { - uint32_t moder; - uint32_t otyper; - uint32_t ospeedr; - uint32_t pupdr; - uint32_t odr; - uint32_t afrl; - uint32_t afrh; -} gpio_setup_t; - -/** - * @brief Type of STM32 GPIO initialization data. - */ -typedef struct { -#if STM32_HAS_GPIOA || defined(__DOXYGEN__) - gpio_setup_t PAData; -#endif -#if STM32_HAS_GPIOB || defined(__DOXYGEN__) - gpio_setup_t PBData; -#endif -#if STM32_HAS_GPIOC || defined(__DOXYGEN__) - gpio_setup_t PCData; -#endif -#if STM32_HAS_GPIOD || defined(__DOXYGEN__) - gpio_setup_t PDData; -#endif -#if STM32_HAS_GPIOE || defined(__DOXYGEN__) - gpio_setup_t PEData; -#endif -#if STM32_HAS_GPIOF || defined(__DOXYGEN__) - gpio_setup_t PFData; -#endif -#if STM32_HAS_GPIOG || defined(__DOXYGEN__) - gpio_setup_t PGData; -#endif -#if STM32_HAS_GPIOH || defined(__DOXYGEN__) - gpio_setup_t PHData; -#endif -#if STM32_HAS_GPIOI || defined(__DOXYGEN__) - gpio_setup_t PIData; -#endif -#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) - gpio_setup_t PJData; -#endif -#if STM32_HAS_GPIOK || defined(__DOXYGEN__) - gpio_setup_t PKData; -#endif -} gpio_config_t; - -/** - * @brief STM32 GPIO static initialization data. - */ -static const gpio_config_t gpio_default_config = { -#if STM32_HAS_GPIOA - {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, -#endif -#if STM32_HAS_GPIOB - {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, -#endif -#if STM32_HAS_GPIOC - {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, -#endif -#if STM32_HAS_GPIOD - {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, -#endif -#if STM32_HAS_GPIOE - {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, -#endif -#if STM32_HAS_GPIOF - {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, -#endif -#if STM32_HAS_GPIOG - {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, -#endif -#if STM32_HAS_GPIOH - {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, -#endif -#if STM32_HAS_GPIOI - {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, -#endif -#if STM32_HAS_GPIOJ - {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, -#endif -#if STM32_HAS_GPIOK - {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} -#endif -}; - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { - gpiop->OTYPER = config->otyper; - gpiop->OSPEEDR = config->ospeedr; - gpiop->PUPDR = config->pupdr; - gpiop->ODR = config->odr; - gpiop->AFRL = config->afrl; - gpiop->AFRH = config->afrh; - gpiop->MODER = config->moder; -} - -static void stm32_gpio_init(void) { - /* Enabling GPIO-related clocks, the mask comes from the - registry header file.*/ - rccResetAHB1(STM32_GPIO_EN_MASK); - rccEnableAHB1(STM32_GPIO_EN_MASK, true); - - /* Initializing all the defined GPIO ports.*/ -#if STM32_HAS_GPIOA - gpio_init(GPIOA, &gpio_default_config.PAData); -#endif -#if STM32_HAS_GPIOB - gpio_init(GPIOB, &gpio_default_config.PBData); -#endif -#if STM32_HAS_GPIOC - gpio_init(GPIOC, &gpio_default_config.PCData); -#endif -#if STM32_HAS_GPIOD - gpio_init(GPIOD, &gpio_default_config.PDData); -#endif -#if STM32_HAS_GPIOE - gpio_init(GPIOE, &gpio_default_config.PEData); -#endif -#if STM32_HAS_GPIOF - gpio_init(GPIOF, &gpio_default_config.PFData); -#endif -#if STM32_HAS_GPIOG - gpio_init(GPIOG, &gpio_default_config.PGData); -#endif -#if STM32_HAS_GPIOH - gpio_init(GPIOH, &gpio_default_config.PHData); -#endif -#if STM32_HAS_GPIOI - gpio_init(GPIOI, &gpio_default_config.PIData); -#endif -#if STM32_HAS_GPIOJ - gpio_init(GPIOJ, &gpio_default_config.PJData); -#endif -#if STM32_HAS_GPIOK - gpio_init(GPIOK, &gpio_default_config.PKData); -#endif -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -__attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} - -/** - * @brief Early initialization code. - * @details GPIO ports and system clocks are initialized before everything - * else. - */ -void __early_init(void) { - enter_bootloader_mode_if_requested(); - - stm32_gpio_init(); - stm32_clock_init(); -} - -#if HAL_USE_SDC || defined(__DOXYGEN__) -/** - * @brief SDC card detection. - */ -bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { - (void)sdcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief SDC card write protection detection. - */ -bool sdc_lld_is_write_protected(SDCDriver *sdcp) { - (void)sdcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif /* HAL_USE_SDC */ - -#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) -/** - * @brief MMC_SPI card detection. - */ -bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { - (void)mmcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief MMC_SPI card write protection detection. - */ -bool mmc_lld_is_write_protected(MMCDriver *mmcp) { - (void)mmcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif - -/** - * @brief Board-specific initialization code. - * @todo Add your board-specific code, if any. - */ -void boardInit(void) {} diff --git a/drivers/boards/BLACKPILL_STM32_F401/board.h b/drivers/boards/BLACKPILL_STM32_F401/board.h deleted file mode 100644 index 2d1cd9ff7..000000000 --- a/drivers/boards/BLACKPILL_STM32_F401/board.h +++ /dev/null @@ -1,568 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * This file has been automatically generated using ChibiStudio board - * generator plugin. Do not edit manually. - */ - -#ifndef BOARD_H -#define BOARD_H - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/* - * Setup for STM32F401CCU6 black pill board. - */ - -/* - * Board identifier. - */ -#define BOARD_BLACKPILL_STM32_F401 -#define BOARD_NAME "STM32F401CCU6 blackpill" - -/* - * Allow Board to boot USB without extra A9 hardware/software config - */ -#define BOARD_OTG_NOVBUSSENS 1 - -/* - * Board oscillators-related settings. - */ -#if !defined(STM32_LSECLK) -# define STM32_LSECLK 32768U -#endif - -#if !defined(STM32_HSECLK) -# define STM32_HSECLK 25000000U -#endif - -/* - * Board voltages. - * Required for performance limits calculation. - */ -#define STM32_VDD 300U - -/* - * MCU type as defined in the ST header. - */ -#define STM32F401xC - -/* - * IO pins assignments. - */ -#define GPIOA_BUTTON 0U -#define GPIOA_PIN1 1U -#define GPIOA_PIN2 2U -#define GPIOA_PIN3 3U -#define GPIOA_CS43L22_LRCK 4U -#define GPIOA_L3GD20_SCL 5U -#define GPIOA_L3GD20_SD0 6U -#define GPIOA_L3GD20_SDI 7U -#define GPIOA_PIN8 8U -#define GPIOA_VBUS_FS 9U -#define GPIOA_OTG_FS_ID 10U -#define GPIOA_OTG_FS_DM 11U -#define GPIOA_OTG_FS_DP 12U -#define GPIOA_SWDIO 13U -#define GPIOA_SWCLK 14U -#define GPIOA_PIN15 15U - -#define GPIOB_PIN0 0U -#define GPIOB_PIN1 1U -#define GPIOB_PIN2 2U -#define GPIOB_SWO 3U -#define GPIOB_PIN4 4U -#define GPIOB_PIN5 5U -#define GPIOB_LSM303DLHC_SCL 6U -#define GPIOB_PIN7 7U -#define GPIOB_PIN8 8U -#define GPIOB_LSM303DLHC_SDA 9U -#define GPIOB_MP45DT02_CLK_IN 10U -#define GPIOB_PIN11 11U -#define GPIOB_PIN12 12U -#define GPIOB_PIN13 13U -#define GPIOB_PIN14 14U -#define GPIOB_PIN15 15U - -#define GPIOC_OTG_FS_POWER_ON 0U -#define GPIOC_PIN1 1U -#define GPIOC_PIN2 2U -#define GPIOC_CS43L22_AIN4x 3U -#define GPIOC_MP45DT02_PDM_OUT 3U -#define GPIOC_PIN4 4U -#define GPIOC_PIN5 5U -#define GPIOC_PIN6 6U -#define GPIOC_CS43L22_MCLK 7U -#define GPIOC_PIN8 8U -#define GPIOC_PIN9 9U -#define GPIOC_CS43L22_SCLK 10U -#define GPIOC_PIN11 11U -#define GPIOC_CS43L22_SDIN 12U -#define GPIOC_PIN13 13U -#define GPIOC_OSC32_IN 14U -#define GPIOC_OSC32_OUT 15U - -#define GPIOD_PIN0 0U -#define GPIOD_PIN1 1U -#define GPIOD_PIN2 2U -#define GPIOD_PIN3 3U -#define GPIOD_CS43L22_RESET 4U -#define GPIOD_OverCurrent 5U -#define GPIOD_PIN6 6U -#define GPIOD_PIN7 7U -#define GPIOD_PIN8 8U -#define GPIOD_PIN9 9U -#define GPIOD_PIN10 10U -#define GPIOD_PIN11 11U -#define GPIOD_LED4 12U -#define GPIOD_LED3 13U -#define GPIOD_LED5 14U -#define GPIOD_LED6 15U - -#define GPIOE_L3GD20_INT1 0U -#define GPIOE_L3GD20_INT2 1U -#define GPIOE_LSM303DLHC_DRDY 2U -#define GPIOE_L3GD20_CS 3U -#define GPIOE_LSM303DLHC_INT1 4U -#define GPIOE_LSM303DLHC_INT2 5U -#define GPIOE_PIN6 6U -#define GPIOE_PIN7 7U -#define GPIOE_PIN8 8U -#define GPIOE_PIN9 9U -#define GPIOE_PIN10 10U -#define GPIOE_PIN11 11U -#define GPIOE_PIN12 12U -#define GPIOE_PIN13 13U -#define GPIOE_PIN14 14U -#define GPIOE_PIN15 15U - -#define GPIOF_PIN0 0U -#define GPIOF_PIN1 1U -#define GPIOF_PIN2 2U -#define GPIOF_PIN3 3U -#define GPIOF_PIN4 4U -#define GPIOF_PIN5 5U -#define GPIOF_PIN6 6U -#define GPIOF_PIN7 7U -#define GPIOF_PIN8 8U -#define GPIOF_PIN9 9U -#define GPIOF_PIN10 10U -#define GPIOF_PIN11 11U -#define GPIOF_PIN12 12U -#define GPIOF_PIN13 13U -#define GPIOF_PIN14 14U -#define GPIOF_PIN15 15U - -#define GPIOG_PIN0 0U -#define GPIOG_PIN1 1U -#define GPIOG_PIN2 2U -#define GPIOG_PIN3 3U -#define GPIOG_PIN4 4U -#define GPIOG_PIN5 5U -#define GPIOG_PIN6 6U -#define GPIOG_PIN7 7U -#define GPIOG_PIN8 8U -#define GPIOG_PIN9 9U -#define GPIOG_PIN10 10U -#define GPIOG_PIN11 11U -#define GPIOG_PIN12 12U -#define GPIOG_PIN13 13U -#define GPIOG_PIN14 14U -#define GPIOG_PIN15 15U - -#define GPIOH_OSC_IN 0U -#define GPIOH_OSC_OUT 1U -#define GPIOH_PIN2 2U -#define GPIOH_PIN3 3U -#define GPIOH_PIN4 4U -#define GPIOH_PIN5 5U -#define GPIOH_PIN6 6U -#define GPIOH_PIN7 7U -#define GPIOH_PIN8 8U -#define GPIOH_PIN9 9U -#define GPIOH_PIN10 10U -#define GPIOH_PIN11 11U -#define GPIOH_PIN12 12U -#define GPIOH_PIN13 13U -#define GPIOH_PIN14 14U -#define GPIOH_PIN15 15U - -#define GPIOI_PIN0 0U -#define GPIOI_PIN1 1U -#define GPIOI_PIN2 2U -#define GPIOI_PIN3 3U -#define GPIOI_PIN4 4U -#define GPIOI_PIN5 5U -#define GPIOI_PIN6 6U -#define GPIOI_PIN7 7U -#define GPIOI_PIN8 8U -#define GPIOI_PIN9 9U -#define GPIOI_PIN10 10U -#define GPIOI_PIN11 11U -#define GPIOI_PIN12 12U -#define GPIOI_PIN13 13U -#define GPIOI_PIN14 14U -#define GPIOI_PIN15 15U - -/* - * IO lines assignments. - */ -#define LINE_BUTTON PAL_LINE(GPIOA, 0U) -#define LINE_CS43L22_LRCK PAL_LINE(GPIOA, 4U) -#define LINE_L3GD20_SCL PAL_LINE(GPIOA, 5U) -#define LINE_L3GD20_SD0 PAL_LINE(GPIOA, 6U) -#define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U) -#define LINE_VBUS_FS PAL_LINE(GPIOA, 9U) -#define LINE_OTG_FS_ID PAL_LINE(GPIOA, 10U) -#define LINE_OTG_FS_DM PAL_LINE(GPIOA, 11U) -#define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) -#define LINE_SWDIO PAL_LINE(GPIOA, 13U) -#define LINE_SWCLK PAL_LINE(GPIOA, 14U) -#define LINE_SWO PAL_LINE(GPIOB, 3U) -#define LINE_LSM303DLHC_SCL PAL_LINE(GPIOB, 6U) -#define LINE_LSM303DLHC_SDA PAL_LINE(GPIOB, 9U) -#define LINE_MP45DT02_CLK_IN PAL_LINE(GPIOB, 10U) -#define LINE_OTG_FS_POWER_ON PAL_LINE(GPIOC, 0U) -#define LINE_CS43L22_AIN4x PAL_LINE(GPIOC, 3U) -#define LINE_MP45DT02_PDM_OUT PAL_LINE(GPIOC, 3U) -#define LINE_CS43L22_MCLK PAL_LINE(GPIOC, 7U) -#define LINE_CS43L22_SCLK PAL_LINE(GPIOC, 10U) -#define LINE_CS43L22_SDIN PAL_LINE(GPIOC, 12U) -#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) -#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) -#define LINE_CS43L22_RESET PAL_LINE(GPIOD, 4U) -#define LINE_OverCurrent PAL_LINE(GPIOD, 5U) -#define LINE_LED4 PAL_LINE(GPIOD, 12U) -#define LINE_LED3 PAL_LINE(GPIOD, 13U) -#define LINE_LED5 PAL_LINE(GPIOD, 14U) -#define LINE_LED6 PAL_LINE(GPIOD, 15U) -#define LINE_L3GD20_INT1 PAL_LINE(GPIOE, 0U) -#define LINE_L3GD20_INT2 PAL_LINE(GPIOE, 1U) -#define LINE_LSM303DLHC_DRDY PAL_LINE(GPIOE, 2U) -#define LINE_L3GD20_CS PAL_LINE(GPIOE, 3U) -#define LINE_LSM303DLHC_INT1 PAL_LINE(GPIOE, 4U) -#define LINE_LSM303DLHC_INT2 PAL_LINE(GPIOE, 5U) -#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) -#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/* - * I/O ports initial setup, this configuration is established soon after reset - * in the initialization code. - * Please refer to the STM32 Reference Manual for details. - */ -#define PIN_MODE_INPUT(n) (0U << ((n)*2U)) -#define PIN_MODE_OUTPUT(n) (1U << ((n)*2U)) -#define PIN_MODE_ALTERNATE(n) (2U << ((n)*2U)) -#define PIN_MODE_ANALOG(n) (3U << ((n)*2U)) -#define PIN_ODR_LOW(n) (0U << (n)) -#define PIN_ODR_HIGH(n) (1U << (n)) -#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) -#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) -#define PIN_OSPEED_VERYLOW(n) (0U << ((n)*2U)) -#define PIN_OSPEED_LOW(n) (1U << ((n)*2U)) -#define PIN_OSPEED_MEDIUM(n) (2U << ((n)*2U)) -#define PIN_OSPEED_HIGH(n) (3U << ((n)*2U)) -#define PIN_PUPDR_FLOATING(n) (0U << ((n)*2U)) -#define PIN_PUPDR_PULLUP(n) (1U << ((n)*2U)) -#define PIN_PUPDR_PULLDOWN(n) (2U << ((n)*2U)) -#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) - -/* - * GPIOA setup: - * - * PA0 - BUTTON (input floating). - * PA1 - PIN1 (input pullup). - * PA2 - PIN2 (input pullup). - * PA3 - PIN3 (input pullup). - * PA4 - CS43L22_LRCK (alternate 6). - * PA5 - L3GD20_SCL (alternate 5). - * PA6 - L3GD20_SD0 (alternate 5). - * PA7 - L3GD20_SDI (alternate 5). - * PA8 - PIN8 (input pullup). - * PA9 - VBUS_FS (input floating). - * PA10 - OTG_FS_ID (alternate 10). - * PA11 - OTG_FS_DM (alternate 10). - * PA12 - OTG_FS_DP (alternate 10). - * PA13 - SWDIO (alternate 0). - * PA14 - SWCLK (alternate 0). - * PA15 - PIN15 (input pullup). - */ -#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | PIN_MODE_INPUT(GPIOA_PIN1) | PIN_MODE_INPUT(GPIOA_PIN2) | PIN_MODE_INPUT(GPIOA_PIN3) | PIN_MODE_ALTERNATE(GPIOA_CS43L22_LRCK) | PIN_MODE_ALTERNATE(GPIOA_L3GD20_SCL) | PIN_MODE_ALTERNATE(GPIOA_L3GD20_SD0) | PIN_MODE_ALTERNATE(GPIOA_L3GD20_SDI) | PIN_MODE_INPUT(GPIOA_PIN8) | PIN_MODE_INPUT(GPIOA_VBUS_FS) | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | PIN_MODE_ALTERNATE(GPIOA_SWDIO) | PIN_MODE_ALTERNATE(GPIOA_SWCLK) | PIN_MODE_INPUT(GPIOA_PIN15)) -#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | PIN_OTYPE_PUSHPULL(GPIOA_CS43L22_LRCK) | PIN_OTYPE_PUSHPULL(GPIOA_L3GD20_SCL) | PIN_OTYPE_PUSHPULL(GPIOA_L3GD20_SD0) | PIN_OTYPE_PUSHPULL(GPIOA_L3GD20_SDI) | PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | PIN_OTYPE_PUSHPULL(GPIOA_VBUS_FS) | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_ID) | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) -#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_BUTTON) | PIN_OSPEED_HIGH(GPIOA_PIN1) | PIN_OSPEED_HIGH(GPIOA_PIN2) | PIN_OSPEED_HIGH(GPIOA_PIN3) | PIN_OSPEED_HIGH(GPIOA_CS43L22_LRCK) | PIN_OSPEED_HIGH(GPIOA_L3GD20_SCL) | PIN_OSPEED_HIGH(GPIOA_L3GD20_SD0) | PIN_OSPEED_HIGH(GPIOA_L3GD20_SDI) | PIN_OSPEED_HIGH(GPIOA_PIN8) | PIN_OSPEED_HIGH(GPIOA_VBUS_FS) | PIN_OSPEED_HIGH(GPIOA_OTG_FS_ID) | PIN_OSPEED_HIGH(GPIOA_OTG_FS_DM) | PIN_OSPEED_HIGH(GPIOA_OTG_FS_DP) | PIN_OSPEED_HIGH(GPIOA_SWDIO) | PIN_OSPEED_HIGH(GPIOA_SWCLK) | PIN_OSPEED_HIGH(GPIOA_PIN15)) -#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | PIN_PUPDR_PULLUP(GPIOA_PIN1) | PIN_PUPDR_PULLUP(GPIOA_PIN2) | PIN_PUPDR_PULLUP(GPIOA_PIN3) | PIN_PUPDR_FLOATING(GPIOA_CS43L22_LRCK) | PIN_PUPDR_FLOATING(GPIOA_L3GD20_SCL) | PIN_PUPDR_PULLUP(GPIOA_L3GD20_SD0) | PIN_PUPDR_PULLUP(GPIOA_L3GD20_SDI) | PIN_PUPDR_PULLUP(GPIOA_PIN8) | PIN_PUPDR_FLOATING(GPIOA_VBUS_FS) | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_ID) | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | PIN_PUPDR_FLOATING(GPIOA_SWDIO) | PIN_PUPDR_FLOATING(GPIOA_SWCLK) | PIN_PUPDR_PULLUP(GPIOA_PIN15)) -#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | PIN_ODR_HIGH(GPIOA_PIN1) | PIN_ODR_HIGH(GPIOA_PIN2) | PIN_ODR_HIGH(GPIOA_PIN3) | PIN_ODR_HIGH(GPIOA_CS43L22_LRCK) | PIN_ODR_HIGH(GPIOA_L3GD20_SCL) | PIN_ODR_HIGH(GPIOA_L3GD20_SD0) | PIN_ODR_HIGH(GPIOA_L3GD20_SDI) | PIN_ODR_HIGH(GPIOA_PIN8) | PIN_ODR_HIGH(GPIOA_VBUS_FS) | PIN_ODR_HIGH(GPIOA_OTG_FS_ID) | PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | PIN_ODR_HIGH(GPIOA_SWDIO) | PIN_ODR_HIGH(GPIOA_SWCLK) | PIN_ODR_HIGH(GPIOA_PIN15)) -#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0U) | PIN_AFIO_AF(GPIOA_PIN1, 0U) | PIN_AFIO_AF(GPIOA_PIN2, 0U) | PIN_AFIO_AF(GPIOA_PIN3, 0U) | PIN_AFIO_AF(GPIOA_CS43L22_LRCK, 6U) | PIN_AFIO_AF(GPIOA_L3GD20_SCL, 5U) | PIN_AFIO_AF(GPIOA_L3GD20_SD0, 5U) | PIN_AFIO_AF(GPIOA_L3GD20_SDI, 5U)) -#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | PIN_AFIO_AF(GPIOA_VBUS_FS, 0U) | PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10U) | PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10U) | PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10U) | PIN_AFIO_AF(GPIOA_SWDIO, 0U) | PIN_AFIO_AF(GPIOA_SWCLK, 0U) | PIN_AFIO_AF(GPIOA_PIN15, 0U)) - -/* - * GPIOB setup: - * - * PB0 - PIN0 (input pullup). - * PB1 - PIN1 (input pullup). - * PB2 - PIN2 (input pullup). - * PB3 - SWO (alternate 0). - * PB4 - PIN4 (input pullup). - * PB5 - PIN5 (input pullup). - * PB6 - LSM303DLHC_SCL (alternate 4). - * PB7 - PIN7 (input pullup). - * PB8 - PIN8 (input pullup). - * PB9 - LSM303DLHC_SDA (alternate 4). - * PB10 - MP45DT02_CLK_IN (alternate 5). - * PB11 - PIN11 (input pullup). - * PB12 - PIN12 (input pullup). - * PB13 - PIN13 (input pullup). - * PB14 - PIN14 (input pullup). - * PB15 - PIN15 (input pullup). - */ -#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | PIN_MODE_INPUT(GPIOB_PIN1) | PIN_MODE_INPUT(GPIOB_PIN2) | PIN_MODE_ALTERNATE(GPIOB_SWO) | PIN_MODE_INPUT(GPIOB_PIN4) | PIN_MODE_INPUT(GPIOB_PIN5) | PIN_MODE_ALTERNATE(GPIOB_LSM303DLHC_SCL) | PIN_MODE_INPUT(GPIOB_PIN7) | PIN_MODE_INPUT(GPIOB_PIN8) | PIN_MODE_ALTERNATE(GPIOB_LSM303DLHC_SDA) | PIN_MODE_ALTERNATE(GPIOB_MP45DT02_CLK_IN) | PIN_MODE_INPUT(GPIOB_PIN11) | PIN_MODE_INPUT(GPIOB_PIN12) | PIN_MODE_INPUT(GPIOB_PIN13) | PIN_MODE_INPUT(GPIOB_PIN14) | PIN_MODE_INPUT(GPIOB_PIN15)) -#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | PIN_OTYPE_PUSHPULL(GPIOB_SWO) | PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | PIN_OTYPE_PUSHPULL(GPIOB_LSM303DLHC_SCL) | PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | PIN_OTYPE_PUSHPULL(GPIOB_LSM303DLHC_SDA) | PIN_OTYPE_PUSHPULL(GPIOB_MP45DT02_CLK_IN) | PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) -#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_PIN0) | PIN_OSPEED_HIGH(GPIOB_PIN1) | PIN_OSPEED_HIGH(GPIOB_PIN2) | PIN_OSPEED_HIGH(GPIOB_SWO) | PIN_OSPEED_HIGH(GPIOB_PIN4) | PIN_OSPEED_HIGH(GPIOB_PIN5) | PIN_OSPEED_HIGH(GPIOB_LSM303DLHC_SCL) | PIN_OSPEED_HIGH(GPIOB_PIN7) | PIN_OSPEED_HIGH(GPIOB_PIN8) | PIN_OSPEED_HIGH(GPIOB_LSM303DLHC_SDA) | PIN_OSPEED_HIGH(GPIOB_MP45DT02_CLK_IN) | PIN_OSPEED_HIGH(GPIOB_PIN11) | PIN_OSPEED_HIGH(GPIOB_PIN12) | PIN_OSPEED_HIGH(GPIOB_PIN13) | PIN_OSPEED_HIGH(GPIOB_PIN14) | PIN_OSPEED_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | PIN_PUPDR_PULLUP(GPIOB_PIN1) | PIN_PUPDR_PULLUP(GPIOB_PIN2) | PIN_PUPDR_PULLUP(GPIOB_SWO) | PIN_PUPDR_PULLUP(GPIOB_PIN4) | PIN_PUPDR_PULLUP(GPIOB_PIN5) | PIN_PUPDR_FLOATING(GPIOB_LSM303DLHC_SCL) | PIN_PUPDR_PULLUP(GPIOB_PIN7) | PIN_PUPDR_PULLUP(GPIOB_PIN8) | PIN_PUPDR_FLOATING(GPIOB_LSM303DLHC_SDA) | PIN_PUPDR_FLOATING(GPIOB_MP45DT02_CLK_IN) | PIN_PUPDR_PULLUP(GPIOB_PIN11) | PIN_PUPDR_PULLUP(GPIOB_PIN12) | PIN_PUPDR_PULLUP(GPIOB_PIN13) | PIN_PUPDR_PULLUP(GPIOB_PIN14) | PIN_PUPDR_PULLUP(GPIOB_PIN15)) -#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | PIN_ODR_HIGH(GPIOB_PIN1) | PIN_ODR_HIGH(GPIOB_PIN2) | PIN_ODR_HIGH(GPIOB_SWO) | PIN_ODR_HIGH(GPIOB_PIN4) | PIN_ODR_HIGH(GPIOB_PIN5) | PIN_ODR_HIGH(GPIOB_LSM303DLHC_SCL) | PIN_ODR_HIGH(GPIOB_PIN7) | PIN_ODR_HIGH(GPIOB_PIN8) | PIN_ODR_HIGH(GPIOB_LSM303DLHC_SDA) | PIN_ODR_HIGH(GPIOB_MP45DT02_CLK_IN) | PIN_ODR_HIGH(GPIOB_PIN11) | PIN_ODR_HIGH(GPIOB_PIN12) | PIN_ODR_HIGH(GPIOB_PIN13) | PIN_ODR_HIGH(GPIOB_PIN14) | PIN_ODR_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | PIN_AFIO_AF(GPIOB_PIN1, 0U) | PIN_AFIO_AF(GPIOB_PIN2, 0U) | PIN_AFIO_AF(GPIOB_SWO, 0U) | PIN_AFIO_AF(GPIOB_PIN4, 0U) | PIN_AFIO_AF(GPIOB_PIN5, 0U) | PIN_AFIO_AF(GPIOB_LSM303DLHC_SCL, 4U) | PIN_AFIO_AF(GPIOB_PIN7, 0U)) -#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | PIN_AFIO_AF(GPIOB_LSM303DLHC_SDA, 4U) | PIN_AFIO_AF(GPIOB_MP45DT02_CLK_IN, 5U) | PIN_AFIO_AF(GPIOB_PIN11, 0U) | PIN_AFIO_AF(GPIOB_PIN12, 0U) | PIN_AFIO_AF(GPIOB_PIN13, 0U) | PIN_AFIO_AF(GPIOB_PIN14, 0U) | PIN_AFIO_AF(GPIOB_PIN15, 0U)) - -/* - * GPIOC setup: - * - * PC0 - OTG_FS_POWER_ON (output pushpull maximum). - * PC1 - PIN1 (input pullup). - * PC2 - PIN2 (input pullup). - * PC3 - CS43L22_AIN4x MP45DT02_PDM_OUT(alternate 5). - * PC4 - PIN4 (input pullup). - * PC5 - PIN5 (input pullup). - * PC6 - PIN6 (input pullup). - * PC7 - CS43L22_MCLK (alternate 6). - * PC8 - PIN8 (input pullup). - * PC9 - PIN9 (input pullup). - * PC10 - CS43L22_SCLK (alternate 6). - * PC11 - PIN11 (input pullup). - * PC12 - CS43L22_SDIN (alternate 6). - * PC13 - PIN13 (input pullup). - * PC14 - OSC32_IN (input floating). - * PC15 - OSC32_OUT (input floating). - */ -#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) | PIN_MODE_INPUT(GPIOC_PIN1) | PIN_MODE_INPUT(GPIOC_PIN2) | PIN_MODE_ALTERNATE(GPIOC_CS43L22_AIN4x) | PIN_MODE_INPUT(GPIOC_PIN4) | PIN_MODE_INPUT(GPIOC_PIN5) | PIN_MODE_INPUT(GPIOC_PIN6) | PIN_MODE_ALTERNATE(GPIOC_CS43L22_MCLK) | PIN_MODE_INPUT(GPIOC_PIN8) | PIN_MODE_INPUT(GPIOC_PIN9) | PIN_MODE_ALTERNATE(GPIOC_CS43L22_SCLK) | PIN_MODE_INPUT(GPIOC_PIN11) | PIN_MODE_ALTERNATE(GPIOC_CS43L22_SDIN) | PIN_MODE_INPUT(GPIOC_PIN13) | PIN_MODE_INPUT(GPIOC_OSC32_IN) | PIN_MODE_INPUT(GPIOC_OSC32_OUT)) -#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_OTG_FS_POWER_ON) | PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | PIN_OTYPE_PUSHPULL(GPIOC_CS43L22_AIN4x) | PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | PIN_OTYPE_PUSHPULL(GPIOC_CS43L22_MCLK) | PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | PIN_OTYPE_PUSHPULL(GPIOC_CS43L22_SCLK) | PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | PIN_OTYPE_PUSHPULL(GPIOC_CS43L22_SDIN) | PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT)) -#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_OTG_FS_POWER_ON) | PIN_OSPEED_HIGH(GPIOC_PIN1) | PIN_OSPEED_HIGH(GPIOC_PIN2) | PIN_OSPEED_HIGH(GPIOC_CS43L22_AIN4x) | PIN_OSPEED_HIGH(GPIOC_PIN4) | PIN_OSPEED_HIGH(GPIOC_PIN5) | PIN_OSPEED_HIGH(GPIOC_PIN6) | PIN_OSPEED_HIGH(GPIOC_CS43L22_MCLK) | PIN_OSPEED_HIGH(GPIOC_PIN8) | PIN_OSPEED_HIGH(GPIOC_PIN9) | PIN_OSPEED_HIGH(GPIOC_CS43L22_SCLK) | PIN_OSPEED_HIGH(GPIOC_PIN11) | PIN_OSPEED_HIGH(GPIOC_CS43L22_SDIN) | PIN_OSPEED_HIGH(GPIOC_PIN13) | PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | PIN_OSPEED_HIGH(GPIOC_OSC32_OUT)) -#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_OTG_FS_POWER_ON) | PIN_PUPDR_PULLUP(GPIOC_PIN1) | PIN_PUPDR_PULLUP(GPIOC_PIN2) | PIN_PUPDR_FLOATING(GPIOC_CS43L22_AIN4x) | PIN_PUPDR_PULLUP(GPIOC_PIN4) | PIN_PUPDR_PULLUP(GPIOC_PIN5) | PIN_PUPDR_PULLUP(GPIOC_PIN6) | PIN_PUPDR_PULLUP(GPIOC_CS43L22_MCLK) | PIN_PUPDR_PULLUP(GPIOC_PIN8) | PIN_PUPDR_PULLUP(GPIOC_PIN9) | PIN_PUPDR_PULLUP(GPIOC_CS43L22_SCLK) | PIN_PUPDR_PULLUP(GPIOC_PIN11) | PIN_PUPDR_PULLUP(GPIOC_CS43L22_SDIN) | PIN_PUPDR_PULLUP(GPIOC_PIN13) | PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT)) -#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_OTG_FS_POWER_ON) | PIN_ODR_HIGH(GPIOC_PIN1) | PIN_ODR_HIGH(GPIOC_PIN2) | PIN_ODR_HIGH(GPIOC_CS43L22_AIN4x) | PIN_ODR_HIGH(GPIOC_PIN4) | PIN_ODR_HIGH(GPIOC_PIN5) | PIN_ODR_HIGH(GPIOC_PIN6) | PIN_ODR_HIGH(GPIOC_CS43L22_MCLK) | PIN_ODR_HIGH(GPIOC_PIN8) | PIN_ODR_HIGH(GPIOC_PIN9) | PIN_ODR_HIGH(GPIOC_CS43L22_SCLK) | PIN_ODR_HIGH(GPIOC_PIN11) | PIN_ODR_HIGH(GPIOC_CS43L22_SDIN) | PIN_ODR_HIGH(GPIOC_PIN13) | PIN_ODR_HIGH(GPIOC_OSC32_IN) | PIN_ODR_HIGH(GPIOC_OSC32_OUT)) -#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_OTG_FS_POWER_ON, 0U) | PIN_AFIO_AF(GPIOC_PIN1, 0U) | PIN_AFIO_AF(GPIOC_PIN2, 0U) | PIN_AFIO_AF(GPIOC_CS43L22_AIN4x, 5U) | PIN_AFIO_AF(GPIOC_PIN4, 0U) | PIN_AFIO_AF(GPIOC_PIN5, 0U) | PIN_AFIO_AF(GPIOC_PIN6, 0U) | PIN_AFIO_AF(GPIOC_CS43L22_MCLK, 6U)) -#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | PIN_AFIO_AF(GPIOC_PIN9, 0U) | PIN_AFIO_AF(GPIOC_CS43L22_SCLK, 6U) | PIN_AFIO_AF(GPIOC_PIN11, 0U) | PIN_AFIO_AF(GPIOC_CS43L22_SDIN, 6U) | PIN_AFIO_AF(GPIOC_PIN13, 0U) | PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U)) - -/* - * GPIOD setup: - * - * PD0 - PIN0 (input pullup). - * PD1 - PIN1 (input pullup). - * PD2 - PIN2 (input pullup). - * PD3 - PIN3 (input pullup). - * PD4 - CS43L22_RESET (output pushpull maximum). - * PD5 - OverCurrent (input floating). - * PD6 - PIN6 (input pullup). - * PD7 - PIN7 (input pullup). - * PD8 - PIN8 (input pullup). - * PD9 - PIN9 (input pullup). - * PD10 - PIN10 (input pullup). - * PD11 - PIN11 (input pullup). - * PD12 - LED4 (output pushpull maximum). - * PD13 - LED3 (output pushpull maximum). - * PD14 - LED5 (output pushpull maximum). - * PD15 - LED6 (output pushpull maximum). - */ -#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | PIN_MODE_INPUT(GPIOD_PIN1) | PIN_MODE_INPUT(GPIOD_PIN2) | PIN_MODE_INPUT(GPIOD_PIN3) | PIN_MODE_OUTPUT(GPIOD_CS43L22_RESET) | PIN_MODE_INPUT(GPIOD_OverCurrent) | PIN_MODE_INPUT(GPIOD_PIN6) | PIN_MODE_INPUT(GPIOD_PIN7) | PIN_MODE_INPUT(GPIOD_PIN8) | PIN_MODE_INPUT(GPIOD_PIN9) | PIN_MODE_INPUT(GPIOD_PIN10) | PIN_MODE_INPUT(GPIOD_PIN11) | PIN_MODE_OUTPUT(GPIOD_LED4) | PIN_MODE_OUTPUT(GPIOD_LED3) | PIN_MODE_OUTPUT(GPIOD_LED5) | PIN_MODE_OUTPUT(GPIOD_LED6)) -#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | PIN_OTYPE_PUSHPULL(GPIOD_CS43L22_RESET) | PIN_OTYPE_PUSHPULL(GPIOD_OverCurrent) | PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | PIN_OTYPE_PUSHPULL(GPIOD_LED4) | PIN_OTYPE_PUSHPULL(GPIOD_LED3) | PIN_OTYPE_PUSHPULL(GPIOD_LED5) | PIN_OTYPE_PUSHPULL(GPIOD_LED6)) -#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | PIN_OSPEED_HIGH(GPIOD_PIN1) | PIN_OSPEED_HIGH(GPIOD_PIN2) | PIN_OSPEED_HIGH(GPIOD_PIN3) | PIN_OSPEED_HIGH(GPIOD_CS43L22_RESET) | PIN_OSPEED_HIGH(GPIOD_OverCurrent) | PIN_OSPEED_HIGH(GPIOD_PIN6) | PIN_OSPEED_HIGH(GPIOD_PIN7) | PIN_OSPEED_HIGH(GPIOD_PIN8) | PIN_OSPEED_HIGH(GPIOD_PIN9) | PIN_OSPEED_HIGH(GPIOD_PIN10) | PIN_OSPEED_HIGH(GPIOD_PIN11) | PIN_OSPEED_HIGH(GPIOD_LED4) | PIN_OSPEED_HIGH(GPIOD_LED3) | PIN_OSPEED_HIGH(GPIOD_LED5) | PIN_OSPEED_HIGH(GPIOD_LED6)) -#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | PIN_PUPDR_PULLUP(GPIOD_PIN1) | PIN_PUPDR_PULLUP(GPIOD_PIN2) | PIN_PUPDR_PULLUP(GPIOD_PIN3) | PIN_PUPDR_PULLUP(GPIOD_CS43L22_RESET) | PIN_PUPDR_FLOATING(GPIOD_OverCurrent) | PIN_PUPDR_PULLUP(GPIOD_PIN6) | PIN_PUPDR_PULLUP(GPIOD_PIN7) | PIN_PUPDR_PULLUP(GPIOD_PIN8) | PIN_PUPDR_PULLUP(GPIOD_PIN9) | PIN_PUPDR_PULLUP(GPIOD_PIN10) | PIN_PUPDR_PULLUP(GPIOD_PIN11) | PIN_PUPDR_FLOATING(GPIOD_LED4) | PIN_PUPDR_FLOATING(GPIOD_LED3) | PIN_PUPDR_FLOATING(GPIOD_LED5) | PIN_PUPDR_FLOATING(GPIOD_LED6)) -#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | PIN_ODR_HIGH(GPIOD_PIN1) | PIN_ODR_HIGH(GPIOD_PIN2) | PIN_ODR_HIGH(GPIOD_PIN3) | PIN_ODR_HIGH(GPIOD_CS43L22_RESET) | PIN_ODR_HIGH(GPIOD_OverCurrent) | PIN_ODR_HIGH(GPIOD_PIN6) | PIN_ODR_HIGH(GPIOD_PIN7) | PIN_ODR_HIGH(GPIOD_PIN8) | PIN_ODR_HIGH(GPIOD_PIN9) | PIN_ODR_HIGH(GPIOD_PIN10) | PIN_ODR_HIGH(GPIOD_PIN11) | PIN_ODR_LOW(GPIOD_LED4) | PIN_ODR_LOW(GPIOD_LED3) | PIN_ODR_LOW(GPIOD_LED5) | PIN_ODR_LOW(GPIOD_LED6)) -#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | PIN_AFIO_AF(GPIOD_PIN1, 0U) | PIN_AFIO_AF(GPIOD_PIN2, 0U) | PIN_AFIO_AF(GPIOD_PIN3, 0U) | PIN_AFIO_AF(GPIOD_CS43L22_RESET, 0U) | PIN_AFIO_AF(GPIOD_OverCurrent, 0U) | PIN_AFIO_AF(GPIOD_PIN6, 0U) | PIN_AFIO_AF(GPIOD_PIN7, 0U)) -#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | PIN_AFIO_AF(GPIOD_PIN9, 0U) | PIN_AFIO_AF(GPIOD_PIN10, 0U) | PIN_AFIO_AF(GPIOD_PIN11, 0U) | PIN_AFIO_AF(GPIOD_LED4, 0U) | PIN_AFIO_AF(GPIOD_LED3, 0U) | PIN_AFIO_AF(GPIOD_LED5, 0U) | PIN_AFIO_AF(GPIOD_LED6, 0U)) - -/* - * GPIOE setup: - * - * PE0 - L3GD20_INT1 (input pullup). - * PE1 - L3GD20_INT2 (input pullup). - * PE2 - LSM303DLHC_DRDY (input floating). - * PE3 - L3GD20_CS (output pushpull maximum). - * PE4 - LSM303DLHC_INT1 (output pushpull maximum). - * PE5 - LSM303DLHC_INT2 (output pushpull maximum). - * PE6 - PIN6 (input pullup). - * PE7 - PIN7 (input pullup). - * PE8 - PIN8 (input pullup). - * PE9 - PIN9 (input pullup). - * PE10 - PIN10 (input pullup). - * PE11 - PIN11 (input pullup). - * PE12 - PIN12 (input pullup). - * PE13 - PIN13 (input pullup). - * PE14 - PIN14 (input pullup). - * PE15 - PIN15 (input pullup). - */ -#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_L3GD20_INT1) | PIN_MODE_INPUT(GPIOE_L3GD20_INT2) | PIN_MODE_INPUT(GPIOE_LSM303DLHC_DRDY) | PIN_MODE_OUTPUT(GPIOE_L3GD20_CS) | PIN_MODE_OUTPUT(GPIOE_LSM303DLHC_INT1) | PIN_MODE_OUTPUT(GPIOE_LSM303DLHC_INT2) | PIN_MODE_INPUT(GPIOE_PIN6) | PIN_MODE_INPUT(GPIOE_PIN7) | PIN_MODE_INPUT(GPIOE_PIN8) | PIN_MODE_INPUT(GPIOE_PIN9) | PIN_MODE_INPUT(GPIOE_PIN10) | PIN_MODE_INPUT(GPIOE_PIN11) | PIN_MODE_INPUT(GPIOE_PIN12) | PIN_MODE_INPUT(GPIOE_PIN13) | PIN_MODE_INPUT(GPIOE_PIN14) | PIN_MODE_INPUT(GPIOE_PIN15)) -#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_INT1) | PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_INT2) | PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_DRDY) | PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_CS) | PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_INT1) | PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_INT2) | PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) -#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_L3GD20_INT1) | PIN_OSPEED_HIGH(GPIOE_L3GD20_INT2) | PIN_OSPEED_HIGH(GPIOE_LSM303DLHC_DRDY) | PIN_OSPEED_HIGH(GPIOE_L3GD20_CS) | PIN_OSPEED_HIGH(GPIOE_LSM303DLHC_INT1) | PIN_OSPEED_HIGH(GPIOE_LSM303DLHC_INT2) | PIN_OSPEED_HIGH(GPIOE_PIN6) | PIN_OSPEED_HIGH(GPIOE_PIN7) | PIN_OSPEED_HIGH(GPIOE_PIN8) | PIN_OSPEED_HIGH(GPIOE_PIN9) | PIN_OSPEED_HIGH(GPIOE_PIN10) | PIN_OSPEED_HIGH(GPIOE_PIN11) | PIN_OSPEED_HIGH(GPIOE_PIN12) | PIN_OSPEED_HIGH(GPIOE_PIN13) | PIN_OSPEED_HIGH(GPIOE_PIN14) | PIN_OSPEED_HIGH(GPIOE_PIN15)) -#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_L3GD20_INT1) | PIN_PUPDR_PULLUP(GPIOE_L3GD20_INT2) | PIN_PUPDR_FLOATING(GPIOE_LSM303DLHC_DRDY) | PIN_PUPDR_PULLUP(GPIOE_L3GD20_CS) | PIN_PUPDR_PULLUP(GPIOE_LSM303DLHC_INT1) | PIN_PUPDR_PULLUP(GPIOE_LSM303DLHC_INT2) | PIN_PUPDR_PULLUP(GPIOE_PIN6) | PIN_PUPDR_PULLUP(GPIOE_PIN7) | PIN_PUPDR_PULLUP(GPIOE_PIN8) | PIN_PUPDR_PULLUP(GPIOE_PIN9) | PIN_PUPDR_PULLUP(GPIOE_PIN10) | PIN_PUPDR_PULLUP(GPIOE_PIN11) | PIN_PUPDR_PULLUP(GPIOE_PIN12) | PIN_PUPDR_PULLUP(GPIOE_PIN13) | PIN_PUPDR_PULLUP(GPIOE_PIN14) | PIN_PUPDR_PULLUP(GPIOE_PIN15)) -#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_L3GD20_INT1) | PIN_ODR_HIGH(GPIOE_L3GD20_INT2) | PIN_ODR_HIGH(GPIOE_LSM303DLHC_DRDY) | PIN_ODR_HIGH(GPIOE_L3GD20_CS) | PIN_ODR_HIGH(GPIOE_LSM303DLHC_INT1) | PIN_ODR_HIGH(GPIOE_LSM303DLHC_INT2) | PIN_ODR_HIGH(GPIOE_PIN6) | PIN_ODR_HIGH(GPIOE_PIN7) | PIN_ODR_HIGH(GPIOE_PIN8) | PIN_ODR_HIGH(GPIOE_PIN9) | PIN_ODR_HIGH(GPIOE_PIN10) | PIN_ODR_HIGH(GPIOE_PIN11) | PIN_ODR_HIGH(GPIOE_PIN12) | PIN_ODR_HIGH(GPIOE_PIN13) | PIN_ODR_HIGH(GPIOE_PIN14) | PIN_ODR_HIGH(GPIOE_PIN15)) -#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_L3GD20_INT1, 0U) | PIN_AFIO_AF(GPIOE_L3GD20_INT2, 0U) | PIN_AFIO_AF(GPIOE_LSM303DLHC_DRDY, 0U) | PIN_AFIO_AF(GPIOE_L3GD20_CS, 0U) | PIN_AFIO_AF(GPIOE_LSM303DLHC_INT1, 0U) | PIN_AFIO_AF(GPIOE_LSM303DLHC_INT2, 0U) | PIN_AFIO_AF(GPIOE_PIN6, 0U) | PIN_AFIO_AF(GPIOE_PIN7, 0U)) -#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | PIN_AFIO_AF(GPIOE_PIN9, 0U) | PIN_AFIO_AF(GPIOE_PIN10, 0U) | PIN_AFIO_AF(GPIOE_PIN11, 0U) | PIN_AFIO_AF(GPIOE_PIN12, 0U) | PIN_AFIO_AF(GPIOE_PIN13, 0U) | PIN_AFIO_AF(GPIOE_PIN14, 0U) | PIN_AFIO_AF(GPIOE_PIN15, 0U)) - -/* - * GPIOF setup: - * - * PF0 - PIN0 (input pullup). - * PF1 - PIN1 (input pullup). - * PF2 - PIN2 (input pullup). - * PF3 - PIN3 (input pullup). - * PF4 - PIN4 (input pullup). - * PF5 - PIN5 (input pullup). - * PF6 - PIN6 (input pullup). - * PF7 - PIN7 (input pullup). - * PF8 - PIN8 (input pullup). - * PF9 - PIN9 (input pullup). - * PF10 - PIN10 (input pullup). - * PF11 - PIN11 (input pullup). - * PF12 - PIN12 (input pullup). - * PF13 - PIN13 (input pullup). - * PF14 - PIN14 (input pullup). - * PF15 - PIN15 (input pullup). - */ -#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | PIN_MODE_INPUT(GPIOF_PIN1) | PIN_MODE_INPUT(GPIOF_PIN2) | PIN_MODE_INPUT(GPIOF_PIN3) | PIN_MODE_INPUT(GPIOF_PIN4) | PIN_MODE_INPUT(GPIOF_PIN5) | PIN_MODE_INPUT(GPIOF_PIN6) | PIN_MODE_INPUT(GPIOF_PIN7) | PIN_MODE_INPUT(GPIOF_PIN8) | PIN_MODE_INPUT(GPIOF_PIN9) | PIN_MODE_INPUT(GPIOF_PIN10) | PIN_MODE_INPUT(GPIOF_PIN11) | PIN_MODE_INPUT(GPIOF_PIN12) | PIN_MODE_INPUT(GPIOF_PIN13) | PIN_MODE_INPUT(GPIOF_PIN14) | PIN_MODE_INPUT(GPIOF_PIN15)) -#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) -#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_PIN0) | PIN_OSPEED_HIGH(GPIOF_PIN1) | PIN_OSPEED_HIGH(GPIOF_PIN2) | PIN_OSPEED_HIGH(GPIOF_PIN3) | PIN_OSPEED_HIGH(GPIOF_PIN4) | PIN_OSPEED_HIGH(GPIOF_PIN5) | PIN_OSPEED_HIGH(GPIOF_PIN6) | PIN_OSPEED_HIGH(GPIOF_PIN7) | PIN_OSPEED_HIGH(GPIOF_PIN8) | PIN_OSPEED_HIGH(GPIOF_PIN9) | PIN_OSPEED_HIGH(GPIOF_PIN10) | PIN_OSPEED_HIGH(GPIOF_PIN11) | PIN_OSPEED_HIGH(GPIOF_PIN12) | PIN_OSPEED_HIGH(GPIOF_PIN13) | PIN_OSPEED_HIGH(GPIOF_PIN14) | PIN_OSPEED_HIGH(GPIOF_PIN15)) -#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_PIN0) | PIN_PUPDR_PULLUP(GPIOF_PIN1) | PIN_PUPDR_PULLUP(GPIOF_PIN2) | PIN_PUPDR_PULLUP(GPIOF_PIN3) | PIN_PUPDR_PULLUP(GPIOF_PIN4) | PIN_PUPDR_PULLUP(GPIOF_PIN5) | PIN_PUPDR_PULLUP(GPIOF_PIN6) | PIN_PUPDR_PULLUP(GPIOF_PIN7) | PIN_PUPDR_PULLUP(GPIOF_PIN8) | PIN_PUPDR_PULLUP(GPIOF_PIN9) | PIN_PUPDR_PULLUP(GPIOF_PIN10) | PIN_PUPDR_PULLUP(GPIOF_PIN11) | PIN_PUPDR_PULLUP(GPIOF_PIN12) | PIN_PUPDR_PULLUP(GPIOF_PIN13) | PIN_PUPDR_PULLUP(GPIOF_PIN14) | PIN_PUPDR_PULLUP(GPIOF_PIN15)) -#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | PIN_ODR_HIGH(GPIOF_PIN1) | PIN_ODR_HIGH(GPIOF_PIN2) | PIN_ODR_HIGH(GPIOF_PIN3) | PIN_ODR_HIGH(GPIOF_PIN4) | PIN_ODR_HIGH(GPIOF_PIN5) | PIN_ODR_HIGH(GPIOF_PIN6) | PIN_ODR_HIGH(GPIOF_PIN7) | PIN_ODR_HIGH(GPIOF_PIN8) | PIN_ODR_HIGH(GPIOF_PIN9) | PIN_ODR_HIGH(GPIOF_PIN10) | PIN_ODR_HIGH(GPIOF_PIN11) | PIN_ODR_HIGH(GPIOF_PIN12) | PIN_ODR_HIGH(GPIOF_PIN13) | PIN_ODR_HIGH(GPIOF_PIN14) | PIN_ODR_HIGH(GPIOF_PIN15)) -#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0U) | PIN_AFIO_AF(GPIOF_PIN1, 0U) | PIN_AFIO_AF(GPIOF_PIN2, 0U) | PIN_AFIO_AF(GPIOF_PIN3, 0U) | PIN_AFIO_AF(GPIOF_PIN4, 0U) | PIN_AFIO_AF(GPIOF_PIN5, 0U) | PIN_AFIO_AF(GPIOF_PIN6, 0U) | PIN_AFIO_AF(GPIOF_PIN7, 0U)) -#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | PIN_AFIO_AF(GPIOF_PIN9, 0U) | PIN_AFIO_AF(GPIOF_PIN10, 0U) | PIN_AFIO_AF(GPIOF_PIN11, 0U) | PIN_AFIO_AF(GPIOF_PIN12, 0U) | PIN_AFIO_AF(GPIOF_PIN13, 0U) | PIN_AFIO_AF(GPIOF_PIN14, 0U) | PIN_AFIO_AF(GPIOF_PIN15, 0U)) - -/* - * GPIOG setup: - * - * PG0 - PIN0 (input pullup). - * PG1 - PIN1 (input pullup). - * PG2 - PIN2 (input pullup). - * PG3 - PIN3 (input pullup). - * PG4 - PIN4 (input pullup). - * PG5 - PIN5 (input pullup). - * PG6 - PIN6 (input pullup). - * PG7 - PIN7 (input pullup). - * PG8 - PIN8 (input pullup). - * PG9 - PIN9 (input pullup). - * PG10 - PIN10 (input pullup). - * PG11 - PIN11 (input pullup). - * PG12 - PIN12 (input pullup). - * PG13 - PIN13 (input pullup). - * PG14 - PIN14 (input pullup). - * PG15 - PIN15 (input pullup). - */ -#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | PIN_MODE_INPUT(GPIOG_PIN1) | PIN_MODE_INPUT(GPIOG_PIN2) | PIN_MODE_INPUT(GPIOG_PIN3) | PIN_MODE_INPUT(GPIOG_PIN4) | PIN_MODE_INPUT(GPIOG_PIN5) | PIN_MODE_INPUT(GPIOG_PIN6) | PIN_MODE_INPUT(GPIOG_PIN7) | PIN_MODE_INPUT(GPIOG_PIN8) | PIN_MODE_INPUT(GPIOG_PIN9) | PIN_MODE_INPUT(GPIOG_PIN10) | PIN_MODE_INPUT(GPIOG_PIN11) | PIN_MODE_INPUT(GPIOG_PIN12) | PIN_MODE_INPUT(GPIOG_PIN13) | PIN_MODE_INPUT(GPIOG_PIN14) | PIN_MODE_INPUT(GPIOG_PIN15)) -#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) -#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_HIGH(GPIOG_PIN0) | PIN_OSPEED_HIGH(GPIOG_PIN1) | PIN_OSPEED_HIGH(GPIOG_PIN2) | PIN_OSPEED_HIGH(GPIOG_PIN3) | PIN_OSPEED_HIGH(GPIOG_PIN4) | PIN_OSPEED_HIGH(GPIOG_PIN5) | PIN_OSPEED_HIGH(GPIOG_PIN6) | PIN_OSPEED_HIGH(GPIOG_PIN7) | PIN_OSPEED_HIGH(GPIOG_PIN8) | PIN_OSPEED_HIGH(GPIOG_PIN9) | PIN_OSPEED_HIGH(GPIOG_PIN10) | PIN_OSPEED_HIGH(GPIOG_PIN11) | PIN_OSPEED_HIGH(GPIOG_PIN12) | PIN_OSPEED_HIGH(GPIOG_PIN13) | PIN_OSPEED_HIGH(GPIOG_PIN14) | PIN_OSPEED_HIGH(GPIOG_PIN15)) -#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | PIN_PUPDR_PULLUP(GPIOG_PIN1) | PIN_PUPDR_PULLUP(GPIOG_PIN2) | PIN_PUPDR_PULLUP(GPIOG_PIN3) | PIN_PUPDR_PULLUP(GPIOG_PIN4) | PIN_PUPDR_PULLUP(GPIOG_PIN5) | PIN_PUPDR_PULLUP(GPIOG_PIN6) | PIN_PUPDR_PULLUP(GPIOG_PIN7) | PIN_PUPDR_PULLUP(GPIOG_PIN8) | PIN_PUPDR_PULLUP(GPIOG_PIN9) | PIN_PUPDR_PULLUP(GPIOG_PIN10) | PIN_PUPDR_PULLUP(GPIOG_PIN11) | PIN_PUPDR_PULLUP(GPIOG_PIN12) | PIN_PUPDR_PULLUP(GPIOG_PIN13) | PIN_PUPDR_PULLUP(GPIOG_PIN14) | PIN_PUPDR_PULLUP(GPIOG_PIN15)) -#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | PIN_ODR_HIGH(GPIOG_PIN1) | PIN_ODR_HIGH(GPIOG_PIN2) | PIN_ODR_HIGH(GPIOG_PIN3) | PIN_ODR_HIGH(GPIOG_PIN4) | PIN_ODR_HIGH(GPIOG_PIN5) | PIN_ODR_HIGH(GPIOG_PIN6) | PIN_ODR_HIGH(GPIOG_PIN7) | PIN_ODR_HIGH(GPIOG_PIN8) | PIN_ODR_HIGH(GPIOG_PIN9) | PIN_ODR_HIGH(GPIOG_PIN10) | PIN_ODR_HIGH(GPIOG_PIN11) | PIN_ODR_HIGH(GPIOG_PIN12) | PIN_ODR_HIGH(GPIOG_PIN13) | PIN_ODR_HIGH(GPIOG_PIN14) | PIN_ODR_HIGH(GPIOG_PIN15)) -#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0U) | PIN_AFIO_AF(GPIOG_PIN1, 0U) | PIN_AFIO_AF(GPIOG_PIN2, 0U) | PIN_AFIO_AF(GPIOG_PIN3, 0U) | PIN_AFIO_AF(GPIOG_PIN4, 0U) | PIN_AFIO_AF(GPIOG_PIN5, 0U) | PIN_AFIO_AF(GPIOG_PIN6, 0U) | PIN_AFIO_AF(GPIOG_PIN7, 0U)) -#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0U) | PIN_AFIO_AF(GPIOG_PIN9, 0U) | PIN_AFIO_AF(GPIOG_PIN10, 0U) | PIN_AFIO_AF(GPIOG_PIN11, 0U) | PIN_AFIO_AF(GPIOG_PIN12, 0U) | PIN_AFIO_AF(GPIOG_PIN13, 0U) | PIN_AFIO_AF(GPIOG_PIN14, 0U) | PIN_AFIO_AF(GPIOG_PIN15, 0U)) - -/* - * GPIOH setup: - * - * PH0 - OSC_IN (input floating). - * PH1 - OSC_OUT (input floating). - * PH2 - PIN2 (input pullup). - * PH3 - PIN3 (input pullup). - * PH4 - PIN4 (input pullup). - * PH5 - PIN5 (input pullup). - * PH6 - PIN6 (input pullup). - * PH7 - PIN7 (input pullup). - * PH8 - PIN8 (input pullup). - * PH9 - PIN9 (input pullup). - * PH10 - PIN10 (input pullup). - * PH11 - PIN11 (input pullup). - * PH12 - PIN12 (input pullup). - * PH13 - PIN13 (input pullup). - * PH14 - PIN14 (input pullup). - * PH15 - PIN15 (input pullup). - */ -#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | PIN_MODE_INPUT(GPIOH_OSC_OUT) | PIN_MODE_INPUT(GPIOH_PIN2) | PIN_MODE_INPUT(GPIOH_PIN3) | PIN_MODE_INPUT(GPIOH_PIN4) | PIN_MODE_INPUT(GPIOH_PIN5) | PIN_MODE_INPUT(GPIOH_PIN6) | PIN_MODE_INPUT(GPIOH_PIN7) | PIN_MODE_INPUT(GPIOH_PIN8) | PIN_MODE_INPUT(GPIOH_PIN9) | PIN_MODE_INPUT(GPIOH_PIN10) | PIN_MODE_INPUT(GPIOH_PIN11) | PIN_MODE_INPUT(GPIOH_PIN12) | PIN_MODE_INPUT(GPIOH_PIN13) | PIN_MODE_INPUT(GPIOH_PIN14) | PIN_MODE_INPUT(GPIOH_PIN15)) -#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) -#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_HIGH(GPIOH_OSC_IN) | PIN_OSPEED_HIGH(GPIOH_OSC_OUT) | PIN_OSPEED_HIGH(GPIOH_PIN2) | PIN_OSPEED_HIGH(GPIOH_PIN3) | PIN_OSPEED_HIGH(GPIOH_PIN4) | PIN_OSPEED_HIGH(GPIOH_PIN5) | PIN_OSPEED_HIGH(GPIOH_PIN6) | PIN_OSPEED_HIGH(GPIOH_PIN7) | PIN_OSPEED_HIGH(GPIOH_PIN8) | PIN_OSPEED_HIGH(GPIOH_PIN9) | PIN_OSPEED_HIGH(GPIOH_PIN10) | PIN_OSPEED_HIGH(GPIOH_PIN11) | PIN_OSPEED_HIGH(GPIOH_PIN12) | PIN_OSPEED_HIGH(GPIOH_PIN13) | PIN_OSPEED_HIGH(GPIOH_PIN14) | PIN_OSPEED_HIGH(GPIOH_PIN15)) -#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | PIN_PUPDR_PULLUP(GPIOH_PIN2) | PIN_PUPDR_PULLUP(GPIOH_PIN3) | PIN_PUPDR_PULLUP(GPIOH_PIN4) | PIN_PUPDR_PULLUP(GPIOH_PIN5) | PIN_PUPDR_PULLUP(GPIOH_PIN6) | PIN_PUPDR_PULLUP(GPIOH_PIN7) | PIN_PUPDR_PULLUP(GPIOH_PIN8) | PIN_PUPDR_PULLUP(GPIOH_PIN9) | PIN_PUPDR_PULLUP(GPIOH_PIN10) | PIN_PUPDR_PULLUP(GPIOH_PIN11) | PIN_PUPDR_PULLUP(GPIOH_PIN12) | PIN_PUPDR_PULLUP(GPIOH_PIN13) | PIN_PUPDR_PULLUP(GPIOH_PIN14) | PIN_PUPDR_PULLUP(GPIOH_PIN15)) -#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | PIN_ODR_HIGH(GPIOH_OSC_OUT) | PIN_ODR_HIGH(GPIOH_PIN2) | PIN_ODR_HIGH(GPIOH_PIN3) | PIN_ODR_HIGH(GPIOH_PIN4) | PIN_ODR_HIGH(GPIOH_PIN5) | PIN_ODR_HIGH(GPIOH_PIN6) | PIN_ODR_HIGH(GPIOH_PIN7) | PIN_ODR_HIGH(GPIOH_PIN8) | PIN_ODR_HIGH(GPIOH_PIN9) | PIN_ODR_HIGH(GPIOH_PIN10) | PIN_ODR_HIGH(GPIOH_PIN11) | PIN_ODR_HIGH(GPIOH_PIN12) | PIN_ODR_HIGH(GPIOH_PIN13) | PIN_ODR_HIGH(GPIOH_PIN14) | PIN_ODR_HIGH(GPIOH_PIN15)) -#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0U) | PIN_AFIO_AF(GPIOH_OSC_OUT, 0U) | PIN_AFIO_AF(GPIOH_PIN2, 0U) | PIN_AFIO_AF(GPIOH_PIN3, 0U) | PIN_AFIO_AF(GPIOH_PIN4, 0U) | PIN_AFIO_AF(GPIOH_PIN5, 0U) | PIN_AFIO_AF(GPIOH_PIN6, 0U) | PIN_AFIO_AF(GPIOH_PIN7, 0U)) -#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0U) | PIN_AFIO_AF(GPIOH_PIN9, 0U) | PIN_AFIO_AF(GPIOH_PIN10, 0U) | PIN_AFIO_AF(GPIOH_PIN11, 0U) | PIN_AFIO_AF(GPIOH_PIN12, 0U) | PIN_AFIO_AF(GPIOH_PIN13, 0U) | PIN_AFIO_AF(GPIOH_PIN14, 0U) | PIN_AFIO_AF(GPIOH_PIN15, 0U)) - -/* - * GPIOI setup: - * - * PI0 - PIN0 (input pullup). - * PI1 - PIN1 (input pullup). - * PI2 - PIN2 (input pullup). - * PI3 - PIN3 (input pullup). - * PI4 - PIN4 (input pullup). - * PI5 - PIN5 (input pullup). - * PI6 - PIN6 (input pullup). - * PI7 - PIN7 (input pullup). - * PI8 - PIN8 (input pullup). - * PI9 - PIN9 (input pullup). - * PI10 - PIN10 (input pullup). - * PI11 - PIN11 (input pullup). - * PI12 - PIN12 (input pullup). - * PI13 - PIN13 (input pullup). - * PI14 - PIN14 (input pullup). - * PI15 - PIN15 (input pullup). - */ -#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | PIN_MODE_INPUT(GPIOI_PIN1) | PIN_MODE_INPUT(GPIOI_PIN2) | PIN_MODE_INPUT(GPIOI_PIN3) | PIN_MODE_INPUT(GPIOI_PIN4) | PIN_MODE_INPUT(GPIOI_PIN5) | PIN_MODE_INPUT(GPIOI_PIN6) | PIN_MODE_INPUT(GPIOI_PIN7) | PIN_MODE_INPUT(GPIOI_PIN8) | PIN_MODE_INPUT(GPIOI_PIN9) | PIN_MODE_INPUT(GPIOI_PIN10) | PIN_MODE_INPUT(GPIOI_PIN11) | PIN_MODE_INPUT(GPIOI_PIN12) | PIN_MODE_INPUT(GPIOI_PIN13) | PIN_MODE_INPUT(GPIOI_PIN14) | PIN_MODE_INPUT(GPIOI_PIN15)) -#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) -#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_HIGH(GPIOI_PIN0) | PIN_OSPEED_HIGH(GPIOI_PIN1) | PIN_OSPEED_HIGH(GPIOI_PIN2) | PIN_OSPEED_HIGH(GPIOI_PIN3) | PIN_OSPEED_HIGH(GPIOI_PIN4) | PIN_OSPEED_HIGH(GPIOI_PIN5) | PIN_OSPEED_HIGH(GPIOI_PIN6) | PIN_OSPEED_HIGH(GPIOI_PIN7) | PIN_OSPEED_HIGH(GPIOI_PIN8) | PIN_OSPEED_HIGH(GPIOI_PIN9) | PIN_OSPEED_HIGH(GPIOI_PIN10) | PIN_OSPEED_HIGH(GPIOI_PIN11) | PIN_OSPEED_HIGH(GPIOI_PIN12) | PIN_OSPEED_HIGH(GPIOI_PIN13) | PIN_OSPEED_HIGH(GPIOI_PIN14) | PIN_OSPEED_HIGH(GPIOI_PIN15)) -#define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLUP(GPIOI_PIN0) | PIN_PUPDR_PULLUP(GPIOI_PIN1) | PIN_PUPDR_PULLUP(GPIOI_PIN2) | PIN_PUPDR_PULLUP(GPIOI_PIN3) | PIN_PUPDR_PULLUP(GPIOI_PIN4) | PIN_PUPDR_PULLUP(GPIOI_PIN5) | PIN_PUPDR_PULLUP(GPIOI_PIN6) | PIN_PUPDR_PULLUP(GPIOI_PIN7) | PIN_PUPDR_PULLUP(GPIOI_PIN8) | PIN_PUPDR_PULLUP(GPIOI_PIN9) | PIN_PUPDR_PULLUP(GPIOI_PIN10) | PIN_PUPDR_PULLUP(GPIOI_PIN11) | PIN_PUPDR_PULLUP(GPIOI_PIN12) | PIN_PUPDR_PULLUP(GPIOI_PIN13) | PIN_PUPDR_PULLUP(GPIOI_PIN14) | PIN_PUPDR_PULLUP(GPIOI_PIN15)) -#define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_PIN0) | PIN_ODR_HIGH(GPIOI_PIN1) | PIN_ODR_HIGH(GPIOI_PIN2) | PIN_ODR_HIGH(GPIOI_PIN3) | PIN_ODR_HIGH(GPIOI_PIN4) | PIN_ODR_HIGH(GPIOI_PIN5) | PIN_ODR_HIGH(GPIOI_PIN6) | PIN_ODR_HIGH(GPIOI_PIN7) | PIN_ODR_HIGH(GPIOI_PIN8) | PIN_ODR_HIGH(GPIOI_PIN9) | PIN_ODR_HIGH(GPIOI_PIN10) | PIN_ODR_HIGH(GPIOI_PIN11) | PIN_ODR_HIGH(GPIOI_PIN12) | PIN_ODR_HIGH(GPIOI_PIN13) | PIN_ODR_HIGH(GPIOI_PIN14) | PIN_ODR_HIGH(GPIOI_PIN15)) -#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0U) | PIN_AFIO_AF(GPIOI_PIN1, 0U) | PIN_AFIO_AF(GPIOI_PIN2, 0U) | PIN_AFIO_AF(GPIOI_PIN3, 0U) | PIN_AFIO_AF(GPIOI_PIN4, 0U) | PIN_AFIO_AF(GPIOI_PIN5, 0U) | PIN_AFIO_AF(GPIOI_PIN6, 0U) | PIN_AFIO_AF(GPIOI_PIN7, 0U)) -#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0U) | PIN_AFIO_AF(GPIOI_PIN9, 0U) | PIN_AFIO_AF(GPIOI_PIN10, 0U) | PIN_AFIO_AF(GPIOI_PIN11, 0U) | PIN_AFIO_AF(GPIOI_PIN12, 0U) | PIN_AFIO_AF(GPIOI_PIN13, 0U) | PIN_AFIO_AF(GPIOI_PIN14, 0U) | PIN_AFIO_AF(GPIOI_PIN15, 0U)) - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if !defined(_FROM_ASM_) -# ifdef __cplusplus -extern "C" { -# endif -void boardInit(void); -# ifdef __cplusplus -} -# endif -#endif /* _FROM_ASM_ */ - -#endif /* BOARD_H */ diff --git a/drivers/boards/BLACKPILL_STM32_F401/board.mk b/drivers/boards/BLACKPILL_STM32_F401/board.mk deleted file mode 100644 index 33473ed6b..000000000 --- a/drivers/boards/BLACKPILL_STM32_F401/board.mk +++ /dev/null @@ -1,9 +0,0 @@ -# List of all the board related files. -BOARDSRC = $(BOARD_PATH)/boards/BLACKPILL_STM32_F401/board.c - -# Required include directories -BOARDINC = $(BOARD_PATH)/boards/BLACKPILL_STM32_F401 - -# Shared variables -ALLCSRC += $(BOARDSRC) -ALLINC += $(BOARDINC) diff --git a/drivers/boards/BLACKPILL_STM32_F401/cfg/board.chcfg b/drivers/boards/BLACKPILL_STM32_F401/cfg/board.chcfg deleted file mode 100644 index 7559ceb93..000000000 --- a/drivers/boards/BLACKPILL_STM32_F401/cfg/board.chcfg +++ /dev/null @@ -1,1193 +0,0 @@ - - - - - resources/gencfg/processors/boards/stm32f4xx/templates - .. - 5.0.x - - STMicroelectronics STM32F401C-Discovery - ST_STM32F401C_DISCOVERY - - STM32F401xC - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/drivers/boards/BLACKPILL_STM32_F401/cfg/board.fmpp b/drivers/boards/BLACKPILL_STM32_F401/cfg/board.fmpp deleted file mode 100644 index 41754c141..000000000 --- a/drivers/boards/BLACKPILL_STM32_F401/cfg/board.fmpp +++ /dev/null @@ -1,15 +0,0 @@ -sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates -outputRoot: .. -dataRoot: . - -freemarkerLinks: { - lib: ../../../../../tools/ftl/libs -} - -data : { - doc1:xml ( - board.chcfg - { - } - ) -} diff --git a/drivers/boards/BLACKPILL_STM32_F411/board.c b/drivers/boards/BLACKPILL_STM32_F411/board.c deleted file mode 100644 index 330e06c8a..000000000 --- a/drivers/boards/BLACKPILL_STM32_F411/board.c +++ /dev/null @@ -1,250 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * This file has been automatically generated using ChibiStudio board - * generator plugin. Do not edit manually. - */ - -#include "hal.h" -#include "stm32_gpio.h" - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/** - * @brief Type of STM32 GPIO port setup. - */ -typedef struct { - uint32_t moder; - uint32_t otyper; - uint32_t ospeedr; - uint32_t pupdr; - uint32_t odr; - uint32_t afrl; - uint32_t afrh; -} gpio_setup_t; - -/** - * @brief Type of STM32 GPIO initialization data. - */ -typedef struct { -#if STM32_HAS_GPIOA || defined(__DOXYGEN__) - gpio_setup_t PAData; -#endif -#if STM32_HAS_GPIOB || defined(__DOXYGEN__) - gpio_setup_t PBData; -#endif -#if STM32_HAS_GPIOC || defined(__DOXYGEN__) - gpio_setup_t PCData; -#endif -#if STM32_HAS_GPIOD || defined(__DOXYGEN__) - gpio_setup_t PDData; -#endif -#if STM32_HAS_GPIOE || defined(__DOXYGEN__) - gpio_setup_t PEData; -#endif -#if STM32_HAS_GPIOF || defined(__DOXYGEN__) - gpio_setup_t PFData; -#endif -#if STM32_HAS_GPIOG || defined(__DOXYGEN__) - gpio_setup_t PGData; -#endif -#if STM32_HAS_GPIOH || defined(__DOXYGEN__) - gpio_setup_t PHData; -#endif -#if STM32_HAS_GPIOI || defined(__DOXYGEN__) - gpio_setup_t PIData; -#endif -#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) - gpio_setup_t PJData; -#endif -#if STM32_HAS_GPIOK || defined(__DOXYGEN__) - gpio_setup_t PKData; -#endif -} gpio_config_t; - -/** - * @brief STM32 GPIO static initialization data. - */ -static const gpio_config_t gpio_default_config = { -#if STM32_HAS_GPIOA - {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, -#endif -#if STM32_HAS_GPIOB - {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, -#endif -#if STM32_HAS_GPIOC - {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, -#endif -#if STM32_HAS_GPIOD - {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, -#endif -#if STM32_HAS_GPIOE - {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, -#endif -#if STM32_HAS_GPIOF - {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, -#endif -#if STM32_HAS_GPIOG - {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, -#endif -#if STM32_HAS_GPIOH - {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, -#endif -#if STM32_HAS_GPIOI - {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, -#endif -#if STM32_HAS_GPIOJ - {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, -#endif -#if STM32_HAS_GPIOK - {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} -#endif -}; - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { - gpiop->OTYPER = config->otyper; - gpiop->OSPEEDR = config->ospeedr; - gpiop->PUPDR = config->pupdr; - gpiop->ODR = config->odr; - gpiop->AFRL = config->afrl; - gpiop->AFRH = config->afrh; - gpiop->MODER = config->moder; -} - -static void stm32_gpio_init(void) { - /* Enabling GPIO-related clocks, the mask comes from the - registry header file.*/ - rccResetAHB1(STM32_GPIO_EN_MASK); - rccEnableAHB1(STM32_GPIO_EN_MASK, true); - - /* Initializing all the defined GPIO ports.*/ -#if STM32_HAS_GPIOA - gpio_init(GPIOA, &gpio_default_config.PAData); -#endif -#if STM32_HAS_GPIOB - gpio_init(GPIOB, &gpio_default_config.PBData); -#endif -#if STM32_HAS_GPIOC - gpio_init(GPIOC, &gpio_default_config.PCData); -#endif -#if STM32_HAS_GPIOD - gpio_init(GPIOD, &gpio_default_config.PDData); -#endif -#if STM32_HAS_GPIOE - gpio_init(GPIOE, &gpio_default_config.PEData); -#endif -#if STM32_HAS_GPIOF - gpio_init(GPIOF, &gpio_default_config.PFData); -#endif -#if STM32_HAS_GPIOG - gpio_init(GPIOG, &gpio_default_config.PGData); -#endif -#if STM32_HAS_GPIOH - gpio_init(GPIOH, &gpio_default_config.PHData); -#endif -#if STM32_HAS_GPIOI - gpio_init(GPIOI, &gpio_default_config.PIData); -#endif -#if STM32_HAS_GPIOJ - gpio_init(GPIOJ, &gpio_default_config.PJData); -#endif -#if STM32_HAS_GPIOK - gpio_init(GPIOK, &gpio_default_config.PKData); -#endif -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -__attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} - -/** - * @brief Early initialization code. - * @details GPIO ports and system clocks are initialized before everything - * else. - */ -void __early_init(void) { - enter_bootloader_mode_if_requested(); - - stm32_gpio_init(); - stm32_clock_init(); -} - -#if HAL_USE_SDC || defined(__DOXYGEN__) -/** - * @brief SDC card detection. - */ -bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { - (void)sdcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief SDC card write protection detection. - */ -bool sdc_lld_is_write_protected(SDCDriver *sdcp) { - (void)sdcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif /* HAL_USE_SDC */ - -#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) -/** - * @brief MMC_SPI card detection. - */ -bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { - (void)mmcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief MMC_SPI card write protection detection. - */ -bool mmc_lld_is_write_protected(MMCDriver *mmcp) { - (void)mmcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif - -/** - * @brief Board-specific initialization code. - * @todo Add your board-specific code, if any. - */ -void boardInit(void) {} diff --git a/drivers/boards/BLACKPILL_STM32_F411/board.h b/drivers/boards/BLACKPILL_STM32_F411/board.h deleted file mode 100644 index c0613b4a7..000000000 --- a/drivers/boards/BLACKPILL_STM32_F411/board.h +++ /dev/null @@ -1,583 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * This file has been automatically generated using ChibiStudio board - * generator plugin. Do not edit manually. - */ - -#ifndef BOARD_H -#define BOARD_H - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/* - * Setup for STM32F411CEU6 black pill board. - */ - -/* - * Board identifier. - */ -#define BOARD_BLACKPILL_STM32_F411 -#define BOARD_NAME "STM32F411CEU6 blackpill" - -/* - * Allow Board to boot USB without extra A9 hardware/software config - */ -#define BOARD_OTG_NOVBUSSENS 1 - -/* - * Board oscillators-related settings. - */ -#if !defined(STM32_LSECLK) -# define STM32_LSECLK 32768U -#endif - -#if !defined(STM32_HSECLK) -# define STM32_HSECLK 25000000U -#endif - -//#define STM32_HSE_BYPASS - -/* - * Board voltages. - * Required for performance limits calculation. - */ -#define STM32_VDD 300U - -/* - * MCU type as defined in the ST header. - */ -#define STM32F411xE - -/* - * IO pins assignments. - */ -#define GPIOA_ARD_A0 0U -#define GPIOA_ADC1_IN0 0U -#define GPIOA_ARD_A1 1U -#define GPIOA_ADC1_IN1 1U -#define GPIOA_ARD_D1 2U -#define GPIOA_USART2_TX 2U -#define GPIOA_ARD_D0 3U -#define GPIOA_USART2_RX 3U -#define GPIOA_ARD_A2 4U -#define GPIOA_ADC1_IN4 4U -#define GPIOA_LED_GREEN 5U -#define GPIOA_ARD_D13 5U -#define GPIOA_ARD_D12 6U -#define GPIOA_ARD_D11 7U -#define GPIOA_ARD_D7 8U -#define GPIOA_ARD_D8 9U -#define GPIOA_ARD_D2 10U -#define GPIOA_OTG_FS_DM 11U -#define GPIOA_OTG_FS_DP 12U -#define GPIOA_SWDIO 13U -#define GPIOA_SWCLK 14U -#define GPIOA_PIN15 15U - -#define GPIOB_ARD_A3 0U -#define GPIOB_ADC1_IN8 0U -#define GPIOB_PIN1 1U -#define GPIOB_PIN2 2U -#define GPIOB_SWO 3U -#define GPIOB_ARD_D3 3U -#define GPIOB_ARD_D5 4U -#define GPIOB_ARD_D4 5U -#define GPIOB_ARD_D10 6U -#define GPIOB_PIN7 7U -#define GPIOB_ARD_D15 8U -#define GPIOB_ARD_D14 9U -#define GPIOB_ARD_D6 10U -#define GPIOB_PIN11 11U -#define GPIOB_PIN12 12U -#define GPIOB_PIN13 13U -#define GPIOB_PIN14 14U -#define GPIOB_PIN15 15U - -#define GPIOC_ARD_A5 0U -#define GPIOC_ADC1_IN10 0U -#define GPIOC_ARD_A4 1U -#define GPIOC_ADC1_IN11 1U -#define GPIOC_PIN2 2U -#define GPIOC_PIN3 3U -#define GPIOC_PIN4 4U -#define GPIOC_PIN5 5U -#define GPIOC_PIN6 6U -#define GPIOC_ARD_D9 7U -#define GPIOC_PIN8 8U -#define GPIOC_PIN9 9U -#define GPIOC_PIN10 10U -#define GPIOC_PIN11 11U -#define GPIOC_PIN12 12U -#define GPIOC_BUTTON 13U -#define GPIOC_OSC32_IN 14U -#define GPIOC_OSC32_OUT 15U - -#define GPIOD_PIN0 0U -#define GPIOD_PIN1 1U -#define GPIOD_PIN2 2U -#define GPIOD_PIN3 3U -#define GPIOD_PIN4 4U -#define GPIOD_PIN5 5U -#define GPIOD_PIN6 6U -#define GPIOD_PIN7 7U -#define GPIOD_PIN8 8U -#define GPIOD_PIN9 9U -#define GPIOD_PIN10 10U -#define GPIOD_PIN11 11U -#define GPIOD_PIN12 12U -#define GPIOD_PIN13 13U -#define GPIOD_PIN14 14U -#define GPIOD_PIN15 15U - -#define GPIOE_PIN0 0U -#define GPIOE_PIN1 1U -#define GPIOE_PIN2 2U -#define GPIOE_PIN3 3U -#define GPIOE_PIN4 4U -#define GPIOE_PIN5 5U -#define GPIOE_PIN6 6U -#define GPIOE_PIN7 7U -#define GPIOE_PIN8 8U -#define GPIOE_PIN9 9U -#define GPIOE_PIN10 10U -#define GPIOE_PIN11 11U -#define GPIOE_PIN12 12U -#define GPIOE_PIN13 13U -#define GPIOE_PIN14 14U -#define GPIOE_PIN15 15U - -#define GPIOF_PIN0 0U -#define GPIOF_PIN1 1U -#define GPIOF_PIN2 2U -#define GPIOF_PIN3 3U -#define GPIOF_PIN4 4U -#define GPIOF_PIN5 5U -#define GPIOF_PIN6 6U -#define GPIOF_PIN7 7U -#define GPIOF_PIN8 8U -#define GPIOF_PIN9 9U -#define GPIOF_PIN10 10U -#define GPIOF_PIN11 11U -#define GPIOF_PIN12 12U -#define GPIOF_PIN13 13U -#define GPIOF_PIN14 14U -#define GPIOF_PIN15 15U - -#define GPIOG_PIN0 0U -#define GPIOG_PIN1 1U -#define GPIOG_PIN2 2U -#define GPIOG_PIN3 3U -#define GPIOG_PIN4 4U -#define GPIOG_PIN5 5U -#define GPIOG_PIN6 6U -#define GPIOG_PIN7 7U -#define GPIOG_PIN8 8U -#define GPIOG_PIN9 9U -#define GPIOG_PIN10 10U -#define GPIOG_PIN11 11U -#define GPIOG_PIN12 12U -#define GPIOG_PIN13 13U -#define GPIOG_PIN14 14U -#define GPIOG_PIN15 15U - -#define GPIOH_OSC_IN 0U -#define GPIOH_OSC_OUT 1U -#define GPIOH_PIN2 2U -#define GPIOH_PIN3 3U -#define GPIOH_PIN4 4U -#define GPIOH_PIN5 5U -#define GPIOH_PIN6 6U -#define GPIOH_PIN7 7U -#define GPIOH_PIN8 8U -#define GPIOH_PIN9 9U -#define GPIOH_PIN10 10U -#define GPIOH_PIN11 11U -#define GPIOH_PIN12 12U -#define GPIOH_PIN13 13U -#define GPIOH_PIN14 14U -#define GPIOH_PIN15 15U - -#define GPIOI_PIN0 0U -#define GPIOI_PIN1 1U -#define GPIOI_PIN2 2U -#define GPIOI_PIN3 3U -#define GPIOI_PIN4 4U -#define GPIOI_PIN5 5U -#define GPIOI_PIN6 6U -#define GPIOI_PIN7 7U -#define GPIOI_PIN8 8U -#define GPIOI_PIN9 9U -#define GPIOI_PIN10 10U -#define GPIOI_PIN11 11U -#define GPIOI_PIN12 12U -#define GPIOI_PIN13 13U -#define GPIOI_PIN14 14U -#define GPIOI_PIN15 15U - -/* - * IO lines assignments. - */ -#define LINE_ARD_A0 PAL_LINE(GPIOA, 0U) -#define LINE_ADC1_IN0 PAL_LINE(GPIOA, 0U) -#define LINE_ARD_A1 PAL_LINE(GPIOA, 1U) -#define LINE_ADC1_IN1 PAL_LINE(GPIOA, 1U) -#define LINE_ARD_D1 PAL_LINE(GPIOA, 2U) -#define LINE_USART2_TX PAL_LINE(GPIOA, 2U) -#define LINE_ARD_D0 PAL_LINE(GPIOA, 3U) -#define LINE_USART2_RX PAL_LINE(GPIOA, 3U) -#define LINE_ARD_A2 PAL_LINE(GPIOA, 4U) -#define LINE_ADC1_IN4 PAL_LINE(GPIOA, 4U) -#define LINE_LED_GREEN PAL_LINE(GPIOA, 5U) -#define LINE_ARD_D13 PAL_LINE(GPIOA, 5U) -#define LINE_ARD_D12 PAL_LINE(GPIOA, 6U) -#define LINE_ARD_D11 PAL_LINE(GPIOA, 7U) -#define LINE_ARD_D7 PAL_LINE(GPIOA, 8U) -#define LINE_ARD_D8 PAL_LINE(GPIOA, 9U) -#define LINE_ARD_D2 PAL_LINE(GPIOA, 10U) -#define LINE_OTG_FS_DM PAL_LINE(GPIOA, 11U) -#define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) -#define LINE_SWDIO PAL_LINE(GPIOA, 13U) -#define LINE_SWCLK PAL_LINE(GPIOA, 14U) -#define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) -#define LINE_ADC1_IN8 PAL_LINE(GPIOB, 0U) -#define LINE_SWO PAL_LINE(GPIOB, 3U) -#define LINE_ARD_D3 PAL_LINE(GPIOB, 3U) -#define LINE_ARD_D5 PAL_LINE(GPIOB, 4U) -#define LINE_ARD_D4 PAL_LINE(GPIOB, 5U) -#define LINE_ARD_D10 PAL_LINE(GPIOB, 6U) -#define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) -#define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) -#define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) -#define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) -#define LINE_ADC1_IN10 PAL_LINE(GPIOC, 0U) -#define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) -#define LINE_ADC1_IN11 PAL_LINE(GPIOC, 1U) -#define LINE_ARD_D9 PAL_LINE(GPIOC, 7U) -#define LINE_BUTTON PAL_LINE(GPIOC, 13U) -#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) -#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) -#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) -#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/* - * I/O ports initial setup, this configuration is established soon after reset - * in the initialization code. - * Please refer to the STM32 Reference Manual for details. - */ -#define PIN_MODE_INPUT(n) (0U << ((n)*2U)) -#define PIN_MODE_OUTPUT(n) (1U << ((n)*2U)) -#define PIN_MODE_ALTERNATE(n) (2U << ((n)*2U)) -#define PIN_MODE_ANALOG(n) (3U << ((n)*2U)) -#define PIN_ODR_LOW(n) (0U << (n)) -#define PIN_ODR_HIGH(n) (1U << (n)) -#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) -#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) -#define PIN_OSPEED_VERYLOW(n) (0U << ((n)*2U)) -#define PIN_OSPEED_LOW(n) (1U << ((n)*2U)) -#define PIN_OSPEED_MEDIUM(n) (2U << ((n)*2U)) -#define PIN_OSPEED_HIGH(n) (3U << ((n)*2U)) -#define PIN_PUPDR_FLOATING(n) (0U << ((n)*2U)) -#define PIN_PUPDR_PULLUP(n) (1U << ((n)*2U)) -#define PIN_PUPDR_PULLDOWN(n) (2U << ((n)*2U)) -#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) - -/* - * GPIOA setup: - * - * PA0 - ARD_A0 ADC1_IN0 (input pullup). - * PA1 - ARD_A1 ADC1_IN1 (input pullup). - * PA2 - ARD_D1 USART2_TX (alternate 7). - * PA3 - ARD_D0 USART2_RX (alternate 7). - * PA4 - ARD_A2 ADC1_IN4 (input pullup). - * PA5 - LED_GREEN ARD_D13 (output pushpull high). - * PA6 - ARD_D12 (input pullup). - * PA7 - ARD_D11 (input pullup). - * PA8 - ARD_D7 (input pullup). - * PA9 - ARD_D8 (input pullup). - * PA10 - ARD_D2 (input pullup). - * PA11 - OTG_FS_DM (alternate 10). - * PA12 - OTG_FS_DP (alternate 10). - * PA13 - SWDIO (alternate 0). - * PA14 - SWCLK (alternate 0). - * PA15 - PIN15 (input pullup). - */ -#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_ARD_A0) | PIN_MODE_INPUT(GPIOA_ARD_A1) | PIN_MODE_ALTERNATE(GPIOA_ARD_D1) | PIN_MODE_ALTERNATE(GPIOA_ARD_D0) | PIN_MODE_INPUT(GPIOA_ARD_A2) | PIN_MODE_OUTPUT(GPIOA_LED_GREEN) | PIN_MODE_INPUT(GPIOA_ARD_D12) | PIN_MODE_INPUT(GPIOA_ARD_D11) | PIN_MODE_INPUT(GPIOA_ARD_D7) | PIN_MODE_INPUT(GPIOA_ARD_D8) | PIN_MODE_INPUT(GPIOA_ARD_D2) | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | PIN_MODE_ALTERNATE(GPIOA_SWDIO) | PIN_MODE_ALTERNATE(GPIOA_SWCLK) | PIN_MODE_INPUT(GPIOA_PIN15)) -#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_ARD_A0) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_A1) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D1) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D0) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_A2) | PIN_OTYPE_PUSHPULL(GPIOA_LED_GREEN) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D12) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D11) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D7) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D8) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D2) | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) -#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_ARD_A0) | PIN_OSPEED_HIGH(GPIOA_ARD_A1) | PIN_OSPEED_MEDIUM(GPIOA_ARD_D1) | PIN_OSPEED_MEDIUM(GPIOA_ARD_D0) | PIN_OSPEED_HIGH(GPIOA_ARD_A2) | PIN_OSPEED_MEDIUM(GPIOA_LED_GREEN) | PIN_OSPEED_HIGH(GPIOA_ARD_D12) | PIN_OSPEED_HIGH(GPIOA_ARD_D11) | PIN_OSPEED_HIGH(GPIOA_ARD_D7) | PIN_OSPEED_HIGH(GPIOA_ARD_D8) | PIN_OSPEED_HIGH(GPIOA_ARD_D2) | PIN_OSPEED_HIGH(GPIOA_OTG_FS_DM) | PIN_OSPEED_HIGH(GPIOA_OTG_FS_DP) | PIN_OSPEED_HIGH(GPIOA_SWDIO) | PIN_OSPEED_HIGH(GPIOA_SWCLK) | PIN_OSPEED_HIGH(GPIOA_PIN15)) -#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_ARD_A0) | PIN_PUPDR_PULLUP(GPIOA_ARD_A1) | PIN_PUPDR_FLOATING(GPIOA_ARD_D1) | PIN_PUPDR_FLOATING(GPIOA_ARD_D0) | PIN_PUPDR_PULLUP(GPIOA_ARD_A2) | PIN_PUPDR_FLOATING(GPIOA_LED_GREEN) | PIN_PUPDR_PULLUP(GPIOA_ARD_D12) | PIN_PUPDR_PULLUP(GPIOA_ARD_D11) | PIN_PUPDR_PULLUP(GPIOA_ARD_D7) | PIN_PUPDR_PULLUP(GPIOA_ARD_D8) | PIN_PUPDR_PULLUP(GPIOA_ARD_D2) | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | PIN_PUPDR_PULLUP(GPIOA_SWDIO) | PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | PIN_PUPDR_PULLUP(GPIOA_PIN15)) -#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_ARD_A0) | PIN_ODR_HIGH(GPIOA_ARD_A1) | PIN_ODR_HIGH(GPIOA_ARD_D1) | PIN_ODR_HIGH(GPIOA_ARD_D0) | PIN_ODR_HIGH(GPIOA_ARD_A2) | PIN_ODR_LOW(GPIOA_LED_GREEN) | PIN_ODR_HIGH(GPIOA_ARD_D12) | PIN_ODR_HIGH(GPIOA_ARD_D11) | PIN_ODR_HIGH(GPIOA_ARD_D7) | PIN_ODR_HIGH(GPIOA_ARD_D8) | PIN_ODR_HIGH(GPIOA_ARD_D2) | PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | PIN_ODR_HIGH(GPIOA_SWDIO) | PIN_ODR_HIGH(GPIOA_SWCLK) | PIN_ODR_HIGH(GPIOA_PIN15)) -#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ARD_A0, 0U) | PIN_AFIO_AF(GPIOA_ARD_A1, 0U) | PIN_AFIO_AF(GPIOA_ARD_D1, 7U) | PIN_AFIO_AF(GPIOA_ARD_D0, 7U) | PIN_AFIO_AF(GPIOA_ARD_A2, 0U) | PIN_AFIO_AF(GPIOA_LED_GREEN, 0U) | PIN_AFIO_AF(GPIOA_ARD_D12, 0U) | PIN_AFIO_AF(GPIOA_ARD_D11, 0U)) -#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_ARD_D7, 0U) | PIN_AFIO_AF(GPIOA_ARD_D8, 0U) | PIN_AFIO_AF(GPIOA_ARD_D2, 0U) | PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10U) | PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10U) | PIN_AFIO_AF(GPIOA_SWDIO, 0U) | PIN_AFIO_AF(GPIOA_SWCLK, 0U) | PIN_AFIO_AF(GPIOA_PIN15, 0U)) - -/* - * GPIOB setup: - * - * PB0 - ARD_A3 ADC1_IN8 (input pullup). - * PB1 - PIN1 (input pullup). - * PB2 - PIN2 (input pullup). - * PB3 - SWO ARD_D3 (alternate 0). - * PB4 - ARD_D5 (input pullup). - * PB5 - ARD_D4 (input pullup). - * PB6 - ARD_D10 (input pullup). - * PB7 - PIN7 (input pullup). - * PB8 - ARD_D15 (input pullup). - * PB9 - ARD_D14 (input pullup). - * PB10 - ARD_D6 (input pullup). - * PB11 - PIN11 (input pullup). - * PB12 - PIN12 (input pullup). - * PB13 - PIN13 (input pullup). - * PB14 - PIN14 (input pullup). - * PB15 - PIN15 (input pullup). - */ -#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_ARD_A3) | PIN_MODE_INPUT(GPIOB_PIN1) | PIN_MODE_INPUT(GPIOB_PIN2) | PIN_MODE_ALTERNATE(GPIOB_SWO) | PIN_MODE_INPUT(GPIOB_ARD_D5) | PIN_MODE_INPUT(GPIOB_ARD_D4) | PIN_MODE_INPUT(GPIOB_ARD_D10) | PIN_MODE_INPUT(GPIOB_PIN7) | PIN_MODE_INPUT(GPIOB_ARD_D15) | PIN_MODE_INPUT(GPIOB_ARD_D14) | PIN_MODE_INPUT(GPIOB_ARD_D6) | PIN_MODE_INPUT(GPIOB_PIN11) | PIN_MODE_INPUT(GPIOB_PIN12) | PIN_MODE_INPUT(GPIOB_PIN13) | PIN_MODE_INPUT(GPIOB_PIN14) | PIN_MODE_INPUT(GPIOB_PIN15)) -#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_ARD_A3) | PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | PIN_OTYPE_PUSHPULL(GPIOB_SWO) | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D5) | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D4) | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D10) | PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D15) | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D14) | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D6) | PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) -#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_ARD_A3) | PIN_OSPEED_HIGH(GPIOB_PIN1) | PIN_OSPEED_HIGH(GPIOB_PIN2) | PIN_OSPEED_HIGH(GPIOB_SWO) | PIN_OSPEED_HIGH(GPIOB_ARD_D5) | PIN_OSPEED_HIGH(GPIOB_ARD_D4) | PIN_OSPEED_HIGH(GPIOB_ARD_D10) | PIN_OSPEED_HIGH(GPIOB_PIN7) | PIN_OSPEED_HIGH(GPIOB_ARD_D15) | PIN_OSPEED_HIGH(GPIOB_ARD_D14) | PIN_OSPEED_HIGH(GPIOB_ARD_D6) | PIN_OSPEED_HIGH(GPIOB_PIN11) | PIN_OSPEED_HIGH(GPIOB_PIN12) | PIN_OSPEED_HIGH(GPIOB_PIN13) | PIN_OSPEED_HIGH(GPIOB_PIN14) | PIN_OSPEED_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_ARD_A3) | PIN_PUPDR_PULLUP(GPIOB_PIN1) | PIN_PUPDR_PULLUP(GPIOB_PIN2) | PIN_PUPDR_PULLUP(GPIOB_SWO) | PIN_PUPDR_PULLUP(GPIOB_ARD_D5) | PIN_PUPDR_PULLUP(GPIOB_ARD_D4) | PIN_PUPDR_PULLUP(GPIOB_ARD_D10) | PIN_PUPDR_PULLUP(GPIOB_PIN7) | PIN_PUPDR_PULLUP(GPIOB_ARD_D15) | PIN_PUPDR_PULLUP(GPIOB_ARD_D14) | PIN_PUPDR_PULLUP(GPIOB_ARD_D6) | PIN_PUPDR_PULLUP(GPIOB_PIN11) | PIN_PUPDR_PULLUP(GPIOB_PIN12) | PIN_PUPDR_PULLUP(GPIOB_PIN13) | PIN_PUPDR_PULLUP(GPIOB_PIN14) | PIN_PUPDR_PULLUP(GPIOB_PIN15)) -#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_ARD_A3) | PIN_ODR_HIGH(GPIOB_PIN1) | PIN_ODR_HIGH(GPIOB_PIN2) | PIN_ODR_HIGH(GPIOB_SWO) | PIN_ODR_HIGH(GPIOB_ARD_D5) | PIN_ODR_HIGH(GPIOB_ARD_D4) | PIN_ODR_HIGH(GPIOB_ARD_D10) | PIN_ODR_HIGH(GPIOB_PIN7) | PIN_ODR_HIGH(GPIOB_ARD_D15) | PIN_ODR_HIGH(GPIOB_ARD_D14) | PIN_ODR_HIGH(GPIOB_ARD_D6) | PIN_ODR_HIGH(GPIOB_PIN11) | PIN_ODR_HIGH(GPIOB_PIN12) | PIN_ODR_HIGH(GPIOB_PIN13) | PIN_ODR_HIGH(GPIOB_PIN14) | PIN_ODR_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_ARD_A3, 0U) | PIN_AFIO_AF(GPIOB_PIN1, 0U) | PIN_AFIO_AF(GPIOB_PIN2, 0U) | PIN_AFIO_AF(GPIOB_SWO, 0U) | PIN_AFIO_AF(GPIOB_ARD_D5, 0U) | PIN_AFIO_AF(GPIOB_ARD_D4, 0U) | PIN_AFIO_AF(GPIOB_ARD_D10, 0U) | PIN_AFIO_AF(GPIOB_PIN7, 0U)) -#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_ARD_D15, 0U) | PIN_AFIO_AF(GPIOB_ARD_D14, 0U) | PIN_AFIO_AF(GPIOB_ARD_D6, 0U) | PIN_AFIO_AF(GPIOB_PIN11, 0U) | PIN_AFIO_AF(GPIOB_PIN12, 0U) | PIN_AFIO_AF(GPIOB_PIN13, 0U) | PIN_AFIO_AF(GPIOB_PIN14, 0U) | PIN_AFIO_AF(GPIOB_PIN15, 0U)) - -/* - * GPIOC setup: - * - * PC0 - ARD_A5 ADC1_IN10 (input pullup). - * PC1 - ARD_A4 ADC1_IN11 (input pullup). - * PC2 - PIN2 (input pullup). - * PC3 - PIN3 (input pullup). - * PC4 - PIN4 (input pullup). - * PC5 - PIN5 (input pullup). - * PC6 - PIN6 (input pullup). - * PC7 - ARD_D9 (input pullup). - * PC8 - PIN8 (input pullup). - * PC9 - PIN9 (input pullup). - * PC10 - PIN10 (input pullup). - * PC11 - PIN11 (input pullup). - * PC12 - PIN12 (input pullup). - * PC13 - BUTTON (input floating). - * PC14 - OSC32_IN (input floating). - * PC15 - OSC32_OUT (input floating). - */ -#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_ARD_A5) | PIN_MODE_INPUT(GPIOC_ARD_A4) | PIN_MODE_INPUT(GPIOC_PIN2) | PIN_MODE_INPUT(GPIOC_PIN3) | PIN_MODE_INPUT(GPIOC_PIN4) | PIN_MODE_INPUT(GPIOC_PIN5) | PIN_MODE_INPUT(GPIOC_PIN6) | PIN_MODE_INPUT(GPIOC_ARD_D9) | PIN_MODE_INPUT(GPIOC_PIN8) | PIN_MODE_INPUT(GPIOC_PIN9) | PIN_MODE_INPUT(GPIOC_PIN10) | PIN_MODE_INPUT(GPIOC_PIN11) | PIN_MODE_INPUT(GPIOC_PIN12) | PIN_MODE_INPUT(GPIOC_BUTTON) | PIN_MODE_INPUT(GPIOC_OSC32_IN) | PIN_MODE_INPUT(GPIOC_OSC32_OUT)) -#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_ARD_A5) | PIN_OTYPE_PUSHPULL(GPIOC_ARD_A4) | PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | PIN_OTYPE_PUSHPULL(GPIOC_ARD_D9) | PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | PIN_OTYPE_PUSHPULL(GPIOC_BUTTON) | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT)) -#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_ARD_A5) | PIN_OSPEED_HIGH(GPIOC_ARD_A4) | PIN_OSPEED_HIGH(GPIOC_PIN2) | PIN_OSPEED_HIGH(GPIOC_PIN3) | PIN_OSPEED_HIGH(GPIOC_PIN4) | PIN_OSPEED_HIGH(GPIOC_PIN5) | PIN_OSPEED_HIGH(GPIOC_PIN6) | PIN_OSPEED_HIGH(GPIOC_ARD_D9) | PIN_OSPEED_HIGH(GPIOC_PIN8) | PIN_OSPEED_HIGH(GPIOC_PIN9) | PIN_OSPEED_HIGH(GPIOC_PIN10) | PIN_OSPEED_HIGH(GPIOC_PIN11) | PIN_OSPEED_HIGH(GPIOC_PIN12) | PIN_OSPEED_HIGH(GPIOC_BUTTON) | PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | PIN_OSPEED_HIGH(GPIOC_OSC32_OUT)) -#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_ARD_A5) | PIN_PUPDR_PULLUP(GPIOC_ARD_A4) | PIN_PUPDR_PULLUP(GPIOC_PIN2) | PIN_PUPDR_PULLUP(GPIOC_PIN3) | PIN_PUPDR_PULLUP(GPIOC_PIN4) | PIN_PUPDR_PULLUP(GPIOC_PIN5) | PIN_PUPDR_PULLUP(GPIOC_PIN6) | PIN_PUPDR_PULLUP(GPIOC_ARD_D9) | PIN_PUPDR_PULLUP(GPIOC_PIN8) | PIN_PUPDR_PULLUP(GPIOC_PIN9) | PIN_PUPDR_PULLUP(GPIOC_PIN10) | PIN_PUPDR_PULLUP(GPIOC_PIN11) | PIN_PUPDR_PULLUP(GPIOC_PIN12) | PIN_PUPDR_FLOATING(GPIOC_BUTTON) | PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT)) -#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_ARD_A5) | PIN_ODR_HIGH(GPIOC_ARD_A4) | PIN_ODR_HIGH(GPIOC_PIN2) | PIN_ODR_HIGH(GPIOC_PIN3) | PIN_ODR_HIGH(GPIOC_PIN4) | PIN_ODR_HIGH(GPIOC_PIN5) | PIN_ODR_HIGH(GPIOC_PIN6) | PIN_ODR_HIGH(GPIOC_ARD_D9) | PIN_ODR_HIGH(GPIOC_PIN8) | PIN_ODR_HIGH(GPIOC_PIN9) | PIN_ODR_HIGH(GPIOC_PIN10) | PIN_ODR_HIGH(GPIOC_PIN11) | PIN_ODR_HIGH(GPIOC_PIN12) | PIN_ODR_HIGH(GPIOC_BUTTON) | PIN_ODR_HIGH(GPIOC_OSC32_IN) | PIN_ODR_HIGH(GPIOC_OSC32_OUT)) -#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_ARD_A5, 0U) | PIN_AFIO_AF(GPIOC_ARD_A4, 0U) | PIN_AFIO_AF(GPIOC_PIN2, 0U) | PIN_AFIO_AF(GPIOC_PIN3, 0U) | PIN_AFIO_AF(GPIOC_PIN4, 0U) | PIN_AFIO_AF(GPIOC_PIN5, 0U) | PIN_AFIO_AF(GPIOC_PIN6, 0U) | PIN_AFIO_AF(GPIOC_ARD_D9, 0U)) -#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | PIN_AFIO_AF(GPIOC_PIN9, 0U) | PIN_AFIO_AF(GPIOC_PIN10, 0U) | PIN_AFIO_AF(GPIOC_PIN11, 0U) | PIN_AFIO_AF(GPIOC_PIN12, 0U) | PIN_AFIO_AF(GPIOC_BUTTON, 0U) | PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U)) - -/* - * GPIOD setup: - * - * PD0 - PIN0 (input pullup). - * PD1 - PIN1 (input pullup). - * PD2 - PIN2 (input pullup). - * PD3 - PIN3 (input pullup). - * PD4 - PIN4 (input pullup). - * PD5 - PIN5 (input pullup). - * PD6 - PIN6 (input pullup). - * PD7 - PIN7 (input pullup). - * PD8 - PIN8 (input pullup). - * PD9 - PIN9 (input pullup). - * PD10 - PIN10 (input pullup). - * PD11 - PIN11 (input pullup). - * PD12 - PIN12 (input pullup). - * PD13 - PIN13 (input pullup). - * PD14 - PIN14 (input pullup). - * PD15 - PIN15 (input pullup). - */ -#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | PIN_MODE_INPUT(GPIOD_PIN1) | PIN_MODE_INPUT(GPIOD_PIN2) | PIN_MODE_INPUT(GPIOD_PIN3) | PIN_MODE_INPUT(GPIOD_PIN4) | PIN_MODE_INPUT(GPIOD_PIN5) | PIN_MODE_INPUT(GPIOD_PIN6) | PIN_MODE_INPUT(GPIOD_PIN7) | PIN_MODE_INPUT(GPIOD_PIN8) | PIN_MODE_INPUT(GPIOD_PIN9) | PIN_MODE_INPUT(GPIOD_PIN10) | PIN_MODE_INPUT(GPIOD_PIN11) | PIN_MODE_INPUT(GPIOD_PIN12) | PIN_MODE_INPUT(GPIOD_PIN13) | PIN_MODE_INPUT(GPIOD_PIN14) | PIN_MODE_INPUT(GPIOD_PIN15)) -#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) -#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | PIN_OSPEED_HIGH(GPIOD_PIN1) | PIN_OSPEED_HIGH(GPIOD_PIN2) | PIN_OSPEED_HIGH(GPIOD_PIN3) | PIN_OSPEED_HIGH(GPIOD_PIN4) | PIN_OSPEED_HIGH(GPIOD_PIN5) | PIN_OSPEED_HIGH(GPIOD_PIN6) | PIN_OSPEED_HIGH(GPIOD_PIN7) | PIN_OSPEED_HIGH(GPIOD_PIN8) | PIN_OSPEED_HIGH(GPIOD_PIN9) | PIN_OSPEED_HIGH(GPIOD_PIN10) | PIN_OSPEED_HIGH(GPIOD_PIN11) | PIN_OSPEED_HIGH(GPIOD_PIN12) | PIN_OSPEED_HIGH(GPIOD_PIN13) | PIN_OSPEED_HIGH(GPIOD_PIN14) | PIN_OSPEED_HIGH(GPIOD_PIN15)) -#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | PIN_PUPDR_PULLUP(GPIOD_PIN1) | PIN_PUPDR_PULLUP(GPIOD_PIN2) | PIN_PUPDR_PULLUP(GPIOD_PIN3) | PIN_PUPDR_PULLUP(GPIOD_PIN4) | PIN_PUPDR_PULLUP(GPIOD_PIN5) | PIN_PUPDR_PULLUP(GPIOD_PIN6) | PIN_PUPDR_PULLUP(GPIOD_PIN7) | PIN_PUPDR_PULLUP(GPIOD_PIN8) | PIN_PUPDR_PULLUP(GPIOD_PIN9) | PIN_PUPDR_PULLUP(GPIOD_PIN10) | PIN_PUPDR_PULLUP(GPIOD_PIN11) | PIN_PUPDR_PULLUP(GPIOD_PIN12) | PIN_PUPDR_PULLUP(GPIOD_PIN13) | PIN_PUPDR_PULLUP(GPIOD_PIN14) | PIN_PUPDR_PULLUP(GPIOD_PIN15)) -#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | PIN_ODR_HIGH(GPIOD_PIN1) | PIN_ODR_HIGH(GPIOD_PIN2) | PIN_ODR_HIGH(GPIOD_PIN3) | PIN_ODR_HIGH(GPIOD_PIN4) | PIN_ODR_HIGH(GPIOD_PIN5) | PIN_ODR_HIGH(GPIOD_PIN6) | PIN_ODR_HIGH(GPIOD_PIN7) | PIN_ODR_HIGH(GPIOD_PIN8) | PIN_ODR_HIGH(GPIOD_PIN9) | PIN_ODR_HIGH(GPIOD_PIN10) | PIN_ODR_HIGH(GPIOD_PIN11) | PIN_ODR_HIGH(GPIOD_PIN12) | PIN_ODR_HIGH(GPIOD_PIN13) | PIN_ODR_HIGH(GPIOD_PIN14) | PIN_ODR_HIGH(GPIOD_PIN15)) -#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | PIN_AFIO_AF(GPIOD_PIN1, 0U) | PIN_AFIO_AF(GPIOD_PIN2, 0U) | PIN_AFIO_AF(GPIOD_PIN3, 0U) | PIN_AFIO_AF(GPIOD_PIN4, 0U) | PIN_AFIO_AF(GPIOD_PIN5, 0U) | PIN_AFIO_AF(GPIOD_PIN6, 0U) | PIN_AFIO_AF(GPIOD_PIN7, 0U)) -#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | PIN_AFIO_AF(GPIOD_PIN9, 0U) | PIN_AFIO_AF(GPIOD_PIN10, 0U) | PIN_AFIO_AF(GPIOD_PIN11, 0U) | PIN_AFIO_AF(GPIOD_PIN12, 0U) | PIN_AFIO_AF(GPIOD_PIN13, 0U) | PIN_AFIO_AF(GPIOD_PIN14, 0U) | PIN_AFIO_AF(GPIOD_PIN15, 0U)) - -/* - * GPIOE setup: - * - * PE0 - PIN0 (input pullup). - * PE1 - PIN1 (input pullup). - * PE2 - PIN2 (input pullup). - * PE3 - PIN3 (input pullup). - * PE4 - PIN4 (input pullup). - * PE5 - PIN5 (input pullup). - * PE6 - PIN6 (input pullup). - * PE7 - PIN7 (input pullup). - * PE8 - PIN8 (input pullup). - * PE9 - PIN9 (input pullup). - * PE10 - PIN10 (input pullup). - * PE11 - PIN11 (input pullup). - * PE12 - PIN12 (input pullup). - * PE13 - PIN13 (input pullup). - * PE14 - PIN14 (input pullup). - * PE15 - PIN15 (input pullup). - */ -#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | PIN_MODE_INPUT(GPIOE_PIN1) | PIN_MODE_INPUT(GPIOE_PIN2) | PIN_MODE_INPUT(GPIOE_PIN3) | PIN_MODE_INPUT(GPIOE_PIN4) | PIN_MODE_INPUT(GPIOE_PIN5) | PIN_MODE_INPUT(GPIOE_PIN6) | PIN_MODE_INPUT(GPIOE_PIN7) | PIN_MODE_INPUT(GPIOE_PIN8) | PIN_MODE_INPUT(GPIOE_PIN9) | PIN_MODE_INPUT(GPIOE_PIN10) | PIN_MODE_INPUT(GPIOE_PIN11) | PIN_MODE_INPUT(GPIOE_PIN12) | PIN_MODE_INPUT(GPIOE_PIN13) | PIN_MODE_INPUT(GPIOE_PIN14) | PIN_MODE_INPUT(GPIOE_PIN15)) -#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) -#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_PIN0) | PIN_OSPEED_HIGH(GPIOE_PIN1) | PIN_OSPEED_HIGH(GPIOE_PIN2) | PIN_OSPEED_HIGH(GPIOE_PIN3) | PIN_OSPEED_HIGH(GPIOE_PIN4) | PIN_OSPEED_HIGH(GPIOE_PIN5) | PIN_OSPEED_HIGH(GPIOE_PIN6) | PIN_OSPEED_HIGH(GPIOE_PIN7) | PIN_OSPEED_HIGH(GPIOE_PIN8) | PIN_OSPEED_HIGH(GPIOE_PIN9) | PIN_OSPEED_HIGH(GPIOE_PIN10) | PIN_OSPEED_HIGH(GPIOE_PIN11) | PIN_OSPEED_HIGH(GPIOE_PIN12) | PIN_OSPEED_HIGH(GPIOE_PIN13) | PIN_OSPEED_HIGH(GPIOE_PIN14) | PIN_OSPEED_HIGH(GPIOE_PIN15)) -#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | PIN_PUPDR_PULLUP(GPIOE_PIN1) | PIN_PUPDR_PULLUP(GPIOE_PIN2) | PIN_PUPDR_PULLUP(GPIOE_PIN3) | PIN_PUPDR_PULLUP(GPIOE_PIN4) | PIN_PUPDR_PULLUP(GPIOE_PIN5) | PIN_PUPDR_PULLUP(GPIOE_PIN6) | PIN_PUPDR_PULLUP(GPIOE_PIN7) | PIN_PUPDR_PULLUP(GPIOE_PIN8) | PIN_PUPDR_PULLUP(GPIOE_PIN9) | PIN_PUPDR_PULLUP(GPIOE_PIN10) | PIN_PUPDR_PULLUP(GPIOE_PIN11) | PIN_PUPDR_PULLUP(GPIOE_PIN12) | PIN_PUPDR_PULLUP(GPIOE_PIN13) | PIN_PUPDR_PULLUP(GPIOE_PIN14) | PIN_PUPDR_PULLUP(GPIOE_PIN15)) -#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | PIN_ODR_HIGH(GPIOE_PIN1) | PIN_ODR_HIGH(GPIOE_PIN2) | PIN_ODR_HIGH(GPIOE_PIN3) | PIN_ODR_HIGH(GPIOE_PIN4) | PIN_ODR_HIGH(GPIOE_PIN5) | PIN_ODR_HIGH(GPIOE_PIN6) | PIN_ODR_HIGH(GPIOE_PIN7) | PIN_ODR_HIGH(GPIOE_PIN8) | PIN_ODR_HIGH(GPIOE_PIN9) | PIN_ODR_HIGH(GPIOE_PIN10) | PIN_ODR_HIGH(GPIOE_PIN11) | PIN_ODR_HIGH(GPIOE_PIN12) | PIN_ODR_HIGH(GPIOE_PIN13) | PIN_ODR_HIGH(GPIOE_PIN14) | PIN_ODR_HIGH(GPIOE_PIN15)) -#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | PIN_AFIO_AF(GPIOE_PIN1, 0U) | PIN_AFIO_AF(GPIOE_PIN2, 0U) | PIN_AFIO_AF(GPIOE_PIN3, 0U) | PIN_AFIO_AF(GPIOE_PIN4, 0U) | PIN_AFIO_AF(GPIOE_PIN5, 0U) | PIN_AFIO_AF(GPIOE_PIN6, 0U) | PIN_AFIO_AF(GPIOE_PIN7, 0U)) -#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | PIN_AFIO_AF(GPIOE_PIN9, 0U) | PIN_AFIO_AF(GPIOE_PIN10, 0U) | PIN_AFIO_AF(GPIOE_PIN11, 0U) | PIN_AFIO_AF(GPIOE_PIN12, 0U) | PIN_AFIO_AF(GPIOE_PIN13, 0U) | PIN_AFIO_AF(GPIOE_PIN14, 0U) | PIN_AFIO_AF(GPIOE_PIN15, 0U)) - -/* - * GPIOF setup: - * - * PF0 - PIN0 (input pullup). - * PF1 - PIN1 (input pullup). - * PF2 - PIN2 (input pullup). - * PF3 - PIN3 (input pullup). - * PF4 - PIN4 (input pullup). - * PF5 - PIN5 (input pullup). - * PF6 - PIN6 (input pullup). - * PF7 - PIN7 (input pullup). - * PF8 - PIN8 (input pullup). - * PF9 - PIN9 (input pullup). - * PF10 - PIN10 (input pullup). - * PF11 - PIN11 (input pullup). - * PF12 - PIN12 (input pullup). - * PF13 - PIN13 (input pullup). - * PF14 - PIN14 (input pullup). - * PF15 - PIN15 (input pullup). - */ -#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | PIN_MODE_INPUT(GPIOF_PIN1) | PIN_MODE_INPUT(GPIOF_PIN2) | PIN_MODE_INPUT(GPIOF_PIN3) | PIN_MODE_INPUT(GPIOF_PIN4) | PIN_MODE_INPUT(GPIOF_PIN5) | PIN_MODE_INPUT(GPIOF_PIN6) | PIN_MODE_INPUT(GPIOF_PIN7) | PIN_MODE_INPUT(GPIOF_PIN8) | PIN_MODE_INPUT(GPIOF_PIN9) | PIN_MODE_INPUT(GPIOF_PIN10) | PIN_MODE_INPUT(GPIOF_PIN11) | PIN_MODE_INPUT(GPIOF_PIN12) | PIN_MODE_INPUT(GPIOF_PIN13) | PIN_MODE_INPUT(GPIOF_PIN14) | PIN_MODE_INPUT(GPIOF_PIN15)) -#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) -#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_PIN0) | PIN_OSPEED_HIGH(GPIOF_PIN1) | PIN_OSPEED_HIGH(GPIOF_PIN2) | PIN_OSPEED_HIGH(GPIOF_PIN3) | PIN_OSPEED_HIGH(GPIOF_PIN4) | PIN_OSPEED_HIGH(GPIOF_PIN5) | PIN_OSPEED_HIGH(GPIOF_PIN6) | PIN_OSPEED_HIGH(GPIOF_PIN7) | PIN_OSPEED_HIGH(GPIOF_PIN8) | PIN_OSPEED_HIGH(GPIOF_PIN9) | PIN_OSPEED_HIGH(GPIOF_PIN10) | PIN_OSPEED_HIGH(GPIOF_PIN11) | PIN_OSPEED_HIGH(GPIOF_PIN12) | PIN_OSPEED_HIGH(GPIOF_PIN13) | PIN_OSPEED_HIGH(GPIOF_PIN14) | PIN_OSPEED_HIGH(GPIOF_PIN15)) -#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_PIN0) | PIN_PUPDR_PULLUP(GPIOF_PIN1) | PIN_PUPDR_PULLUP(GPIOF_PIN2) | PIN_PUPDR_PULLUP(GPIOF_PIN3) | PIN_PUPDR_PULLUP(GPIOF_PIN4) | PIN_PUPDR_PULLUP(GPIOF_PIN5) | PIN_PUPDR_PULLUP(GPIOF_PIN6) | PIN_PUPDR_PULLUP(GPIOF_PIN7) | PIN_PUPDR_PULLUP(GPIOF_PIN8) | PIN_PUPDR_PULLUP(GPIOF_PIN9) | PIN_PUPDR_PULLUP(GPIOF_PIN10) | PIN_PUPDR_PULLUP(GPIOF_PIN11) | PIN_PUPDR_PULLUP(GPIOF_PIN12) | PIN_PUPDR_PULLUP(GPIOF_PIN13) | PIN_PUPDR_PULLUP(GPIOF_PIN14) | PIN_PUPDR_PULLUP(GPIOF_PIN15)) -#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | PIN_ODR_HIGH(GPIOF_PIN1) | PIN_ODR_HIGH(GPIOF_PIN2) | PIN_ODR_HIGH(GPIOF_PIN3) | PIN_ODR_HIGH(GPIOF_PIN4) | PIN_ODR_HIGH(GPIOF_PIN5) | PIN_ODR_HIGH(GPIOF_PIN6) | PIN_ODR_HIGH(GPIOF_PIN7) | PIN_ODR_HIGH(GPIOF_PIN8) | PIN_ODR_HIGH(GPIOF_PIN9) | PIN_ODR_HIGH(GPIOF_PIN10) | PIN_ODR_HIGH(GPIOF_PIN11) | PIN_ODR_HIGH(GPIOF_PIN12) | PIN_ODR_HIGH(GPIOF_PIN13) | PIN_ODR_HIGH(GPIOF_PIN14) | PIN_ODR_HIGH(GPIOF_PIN15)) -#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0U) | PIN_AFIO_AF(GPIOF_PIN1, 0U) | PIN_AFIO_AF(GPIOF_PIN2, 0U) | PIN_AFIO_AF(GPIOF_PIN3, 0U) | PIN_AFIO_AF(GPIOF_PIN4, 0U) | PIN_AFIO_AF(GPIOF_PIN5, 0U) | PIN_AFIO_AF(GPIOF_PIN6, 0U) | PIN_AFIO_AF(GPIOF_PIN7, 0U)) -#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | PIN_AFIO_AF(GPIOF_PIN9, 0U) | PIN_AFIO_AF(GPIOF_PIN10, 0U) | PIN_AFIO_AF(GPIOF_PIN11, 0U) | PIN_AFIO_AF(GPIOF_PIN12, 0U) | PIN_AFIO_AF(GPIOF_PIN13, 0U) | PIN_AFIO_AF(GPIOF_PIN14, 0U) | PIN_AFIO_AF(GPIOF_PIN15, 0U)) - -/* - * GPIOG setup: - * - * PG0 - PIN0 (input pullup). - * PG1 - PIN1 (input pullup). - * PG2 - PIN2 (input pullup). - * PG3 - PIN3 (input pullup). - * PG4 - PIN4 (input pullup). - * PG5 - PIN5 (input pullup). - * PG6 - PIN6 (input pullup). - * PG7 - PIN7 (input pullup). - * PG8 - PIN8 (input pullup). - * PG9 - PIN9 (input pullup). - * PG10 - PIN10 (input pullup). - * PG11 - PIN11 (input pullup). - * PG12 - PIN12 (input pullup). - * PG13 - PIN13 (input pullup). - * PG14 - PIN14 (input pullup). - * PG15 - PIN15 (input pullup). - */ -#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | PIN_MODE_INPUT(GPIOG_PIN1) | PIN_MODE_INPUT(GPIOG_PIN2) | PIN_MODE_INPUT(GPIOG_PIN3) | PIN_MODE_INPUT(GPIOG_PIN4) | PIN_MODE_INPUT(GPIOG_PIN5) | PIN_MODE_INPUT(GPIOG_PIN6) | PIN_MODE_INPUT(GPIOG_PIN7) | PIN_MODE_INPUT(GPIOG_PIN8) | PIN_MODE_INPUT(GPIOG_PIN9) | PIN_MODE_INPUT(GPIOG_PIN10) | PIN_MODE_INPUT(GPIOG_PIN11) | PIN_MODE_INPUT(GPIOG_PIN12) | PIN_MODE_INPUT(GPIOG_PIN13) | PIN_MODE_INPUT(GPIOG_PIN14) | PIN_MODE_INPUT(GPIOG_PIN15)) -#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) -#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_HIGH(GPIOG_PIN0) | PIN_OSPEED_HIGH(GPIOG_PIN1) | PIN_OSPEED_HIGH(GPIOG_PIN2) | PIN_OSPEED_HIGH(GPIOG_PIN3) | PIN_OSPEED_HIGH(GPIOG_PIN4) | PIN_OSPEED_HIGH(GPIOG_PIN5) | PIN_OSPEED_HIGH(GPIOG_PIN6) | PIN_OSPEED_HIGH(GPIOG_PIN7) | PIN_OSPEED_HIGH(GPIOG_PIN8) | PIN_OSPEED_HIGH(GPIOG_PIN9) | PIN_OSPEED_HIGH(GPIOG_PIN10) | PIN_OSPEED_HIGH(GPIOG_PIN11) | PIN_OSPEED_HIGH(GPIOG_PIN12) | PIN_OSPEED_HIGH(GPIOG_PIN13) | PIN_OSPEED_HIGH(GPIOG_PIN14) | PIN_OSPEED_HIGH(GPIOG_PIN15)) -#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | PIN_PUPDR_PULLUP(GPIOG_PIN1) | PIN_PUPDR_PULLUP(GPIOG_PIN2) | PIN_PUPDR_PULLUP(GPIOG_PIN3) | PIN_PUPDR_PULLUP(GPIOG_PIN4) | PIN_PUPDR_PULLUP(GPIOG_PIN5) | PIN_PUPDR_PULLUP(GPIOG_PIN6) | PIN_PUPDR_PULLUP(GPIOG_PIN7) | PIN_PUPDR_PULLUP(GPIOG_PIN8) | PIN_PUPDR_PULLUP(GPIOG_PIN9) | PIN_PUPDR_PULLUP(GPIOG_PIN10) | PIN_PUPDR_PULLUP(GPIOG_PIN11) | PIN_PUPDR_PULLUP(GPIOG_PIN12) | PIN_PUPDR_PULLUP(GPIOG_PIN13) | PIN_PUPDR_PULLUP(GPIOG_PIN14) | PIN_PUPDR_PULLUP(GPIOG_PIN15)) -#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | PIN_ODR_HIGH(GPIOG_PIN1) | PIN_ODR_HIGH(GPIOG_PIN2) | PIN_ODR_HIGH(GPIOG_PIN3) | PIN_ODR_HIGH(GPIOG_PIN4) | PIN_ODR_HIGH(GPIOG_PIN5) | PIN_ODR_HIGH(GPIOG_PIN6) | PIN_ODR_HIGH(GPIOG_PIN7) | PIN_ODR_HIGH(GPIOG_PIN8) | PIN_ODR_HIGH(GPIOG_PIN9) | PIN_ODR_HIGH(GPIOG_PIN10) | PIN_ODR_HIGH(GPIOG_PIN11) | PIN_ODR_HIGH(GPIOG_PIN12) | PIN_ODR_HIGH(GPIOG_PIN13) | PIN_ODR_HIGH(GPIOG_PIN14) | PIN_ODR_HIGH(GPIOG_PIN15)) -#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0U) | PIN_AFIO_AF(GPIOG_PIN1, 0U) | PIN_AFIO_AF(GPIOG_PIN2, 0U) | PIN_AFIO_AF(GPIOG_PIN3, 0U) | PIN_AFIO_AF(GPIOG_PIN4, 0U) | PIN_AFIO_AF(GPIOG_PIN5, 0U) | PIN_AFIO_AF(GPIOG_PIN6, 0U) | PIN_AFIO_AF(GPIOG_PIN7, 0U)) -#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0U) | PIN_AFIO_AF(GPIOG_PIN9, 0U) | PIN_AFIO_AF(GPIOG_PIN10, 0U) | PIN_AFIO_AF(GPIOG_PIN11, 0U) | PIN_AFIO_AF(GPIOG_PIN12, 0U) | PIN_AFIO_AF(GPIOG_PIN13, 0U) | PIN_AFIO_AF(GPIOG_PIN14, 0U) | PIN_AFIO_AF(GPIOG_PIN15, 0U)) - -/* - * GPIOH setup: - * - * PH0 - OSC_IN (input floating). - * PH1 - OSC_OUT (input floating). - * PH2 - PIN2 (input pullup). - * PH3 - PIN3 (input pullup). - * PH4 - PIN4 (input pullup). - * PH5 - PIN5 (input pullup). - * PH6 - PIN6 (input pullup). - * PH7 - PIN7 (input pullup). - * PH8 - PIN8 (input pullup). - * PH9 - PIN9 (input pullup). - * PH10 - PIN10 (input pullup). - * PH11 - PIN11 (input pullup). - * PH12 - PIN12 (input pullup). - * PH13 - PIN13 (input pullup). - * PH14 - PIN14 (input pullup). - * PH15 - PIN15 (input pullup). - */ -#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | PIN_MODE_INPUT(GPIOH_OSC_OUT) | PIN_MODE_INPUT(GPIOH_PIN2) | PIN_MODE_INPUT(GPIOH_PIN3) | PIN_MODE_INPUT(GPIOH_PIN4) | PIN_MODE_INPUT(GPIOH_PIN5) | PIN_MODE_INPUT(GPIOH_PIN6) | PIN_MODE_INPUT(GPIOH_PIN7) | PIN_MODE_INPUT(GPIOH_PIN8) | PIN_MODE_INPUT(GPIOH_PIN9) | PIN_MODE_INPUT(GPIOH_PIN10) | PIN_MODE_INPUT(GPIOH_PIN11) | PIN_MODE_INPUT(GPIOH_PIN12) | PIN_MODE_INPUT(GPIOH_PIN13) | PIN_MODE_INPUT(GPIOH_PIN14) | PIN_MODE_INPUT(GPIOH_PIN15)) -#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) -#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_HIGH(GPIOH_OSC_IN) | PIN_OSPEED_HIGH(GPIOH_OSC_OUT) | PIN_OSPEED_HIGH(GPIOH_PIN2) | PIN_OSPEED_HIGH(GPIOH_PIN3) | PIN_OSPEED_HIGH(GPIOH_PIN4) | PIN_OSPEED_HIGH(GPIOH_PIN5) | PIN_OSPEED_HIGH(GPIOH_PIN6) | PIN_OSPEED_HIGH(GPIOH_PIN7) | PIN_OSPEED_HIGH(GPIOH_PIN8) | PIN_OSPEED_HIGH(GPIOH_PIN9) | PIN_OSPEED_HIGH(GPIOH_PIN10) | PIN_OSPEED_HIGH(GPIOH_PIN11) | PIN_OSPEED_HIGH(GPIOH_PIN12) | PIN_OSPEED_HIGH(GPIOH_PIN13) | PIN_OSPEED_HIGH(GPIOH_PIN14) | PIN_OSPEED_HIGH(GPIOH_PIN15)) -#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | PIN_PUPDR_PULLUP(GPIOH_PIN2) | PIN_PUPDR_PULLUP(GPIOH_PIN3) | PIN_PUPDR_PULLUP(GPIOH_PIN4) | PIN_PUPDR_PULLUP(GPIOH_PIN5) | PIN_PUPDR_PULLUP(GPIOH_PIN6) | PIN_PUPDR_PULLUP(GPIOH_PIN7) | PIN_PUPDR_PULLUP(GPIOH_PIN8) | PIN_PUPDR_PULLUP(GPIOH_PIN9) | PIN_PUPDR_PULLUP(GPIOH_PIN10) | PIN_PUPDR_PULLUP(GPIOH_PIN11) | PIN_PUPDR_PULLUP(GPIOH_PIN12) | PIN_PUPDR_PULLUP(GPIOH_PIN13) | PIN_PUPDR_PULLUP(GPIOH_PIN14) | PIN_PUPDR_PULLUP(GPIOH_PIN15)) -#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | PIN_ODR_HIGH(GPIOH_OSC_OUT) | PIN_ODR_HIGH(GPIOH_PIN2) | PIN_ODR_HIGH(GPIOH_PIN3) | PIN_ODR_HIGH(GPIOH_PIN4) | PIN_ODR_HIGH(GPIOH_PIN5) | PIN_ODR_HIGH(GPIOH_PIN6) | PIN_ODR_HIGH(GPIOH_PIN7) | PIN_ODR_HIGH(GPIOH_PIN8) | PIN_ODR_HIGH(GPIOH_PIN9) | PIN_ODR_HIGH(GPIOH_PIN10) | PIN_ODR_HIGH(GPIOH_PIN11) | PIN_ODR_HIGH(GPIOH_PIN12) | PIN_ODR_HIGH(GPIOH_PIN13) | PIN_ODR_HIGH(GPIOH_PIN14) | PIN_ODR_HIGH(GPIOH_PIN15)) -#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0U) | PIN_AFIO_AF(GPIOH_OSC_OUT, 0U) | PIN_AFIO_AF(GPIOH_PIN2, 0U) | PIN_AFIO_AF(GPIOH_PIN3, 0U) | PIN_AFIO_AF(GPIOH_PIN4, 0U) | PIN_AFIO_AF(GPIOH_PIN5, 0U) | PIN_AFIO_AF(GPIOH_PIN6, 0U) | PIN_AFIO_AF(GPIOH_PIN7, 0U)) -#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0U) | PIN_AFIO_AF(GPIOH_PIN9, 0U) | PIN_AFIO_AF(GPIOH_PIN10, 0U) | PIN_AFIO_AF(GPIOH_PIN11, 0U) | PIN_AFIO_AF(GPIOH_PIN12, 0U) | PIN_AFIO_AF(GPIOH_PIN13, 0U) | PIN_AFIO_AF(GPIOH_PIN14, 0U) | PIN_AFIO_AF(GPIOH_PIN15, 0U)) - -/* - * GPIOI setup: - * - * PI0 - PIN0 (input pullup). - * PI1 - PIN1 (input pullup). - * PI2 - PIN2 (input pullup). - * PI3 - PIN3 (input pullup). - * PI4 - PIN4 (input pullup). - * PI5 - PIN5 (input pullup). - * PI6 - PIN6 (input pullup). - * PI7 - PIN7 (input pullup). - * PI8 - PIN8 (input pullup). - * PI9 - PIN9 (input pullup). - * PI10 - PIN10 (input pullup). - * PI11 - PIN11 (input pullup). - * PI12 - PIN12 (input pullup). - * PI13 - PIN13 (input pullup). - * PI14 - PIN14 (input pullup). - * PI15 - PIN15 (input pullup). - */ -#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | PIN_MODE_INPUT(GPIOI_PIN1) | PIN_MODE_INPUT(GPIOI_PIN2) | PIN_MODE_INPUT(GPIOI_PIN3) | PIN_MODE_INPUT(GPIOI_PIN4) | PIN_MODE_INPUT(GPIOI_PIN5) | PIN_MODE_INPUT(GPIOI_PIN6) | PIN_MODE_INPUT(GPIOI_PIN7) | PIN_MODE_INPUT(GPIOI_PIN8) | PIN_MODE_INPUT(GPIOI_PIN9) | PIN_MODE_INPUT(GPIOI_PIN10) | PIN_MODE_INPUT(GPIOI_PIN11) | PIN_MODE_INPUT(GPIOI_PIN12) | PIN_MODE_INPUT(GPIOI_PIN13) | PIN_MODE_INPUT(GPIOI_PIN14) | PIN_MODE_INPUT(GPIOI_PIN15)) -#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) -#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_HIGH(GPIOI_PIN0) | PIN_OSPEED_HIGH(GPIOI_PIN1) | PIN_OSPEED_HIGH(GPIOI_PIN2) | PIN_OSPEED_HIGH(GPIOI_PIN3) | PIN_OSPEED_HIGH(GPIOI_PIN4) | PIN_OSPEED_HIGH(GPIOI_PIN5) | PIN_OSPEED_HIGH(GPIOI_PIN6) | PIN_OSPEED_HIGH(GPIOI_PIN7) | PIN_OSPEED_HIGH(GPIOI_PIN8) | PIN_OSPEED_HIGH(GPIOI_PIN9) | PIN_OSPEED_HIGH(GPIOI_PIN10) | PIN_OSPEED_HIGH(GPIOI_PIN11) | PIN_OSPEED_HIGH(GPIOI_PIN12) | PIN_OSPEED_HIGH(GPIOI_PIN13) | PIN_OSPEED_HIGH(GPIOI_PIN14) | PIN_OSPEED_HIGH(GPIOI_PIN15)) -#define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLUP(GPIOI_PIN0) | PIN_PUPDR_PULLUP(GPIOI_PIN1) | PIN_PUPDR_PULLUP(GPIOI_PIN2) | PIN_PUPDR_PULLUP(GPIOI_PIN3) | PIN_PUPDR_PULLUP(GPIOI_PIN4) | PIN_PUPDR_PULLUP(GPIOI_PIN5) | PIN_PUPDR_PULLUP(GPIOI_PIN6) | PIN_PUPDR_PULLUP(GPIOI_PIN7) | PIN_PUPDR_PULLUP(GPIOI_PIN8) | PIN_PUPDR_PULLUP(GPIOI_PIN9) | PIN_PUPDR_PULLUP(GPIOI_PIN10) | PIN_PUPDR_PULLUP(GPIOI_PIN11) | PIN_PUPDR_PULLUP(GPIOI_PIN12) | PIN_PUPDR_PULLUP(GPIOI_PIN13) | PIN_PUPDR_PULLUP(GPIOI_PIN14) | PIN_PUPDR_PULLUP(GPIOI_PIN15)) -#define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_PIN0) | PIN_ODR_HIGH(GPIOI_PIN1) | PIN_ODR_HIGH(GPIOI_PIN2) | PIN_ODR_HIGH(GPIOI_PIN3) | PIN_ODR_HIGH(GPIOI_PIN4) | PIN_ODR_HIGH(GPIOI_PIN5) | PIN_ODR_HIGH(GPIOI_PIN6) | PIN_ODR_HIGH(GPIOI_PIN7) | PIN_ODR_HIGH(GPIOI_PIN8) | PIN_ODR_HIGH(GPIOI_PIN9) | PIN_ODR_HIGH(GPIOI_PIN10) | PIN_ODR_HIGH(GPIOI_PIN11) | PIN_ODR_HIGH(GPIOI_PIN12) | PIN_ODR_HIGH(GPIOI_PIN13) | PIN_ODR_HIGH(GPIOI_PIN14) | PIN_ODR_HIGH(GPIOI_PIN15)) -#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0U) | PIN_AFIO_AF(GPIOI_PIN1, 0U) | PIN_AFIO_AF(GPIOI_PIN2, 0U) | PIN_AFIO_AF(GPIOI_PIN3, 0U) | PIN_AFIO_AF(GPIOI_PIN4, 0U) | PIN_AFIO_AF(GPIOI_PIN5, 0U) | PIN_AFIO_AF(GPIOI_PIN6, 0U) | PIN_AFIO_AF(GPIOI_PIN7, 0U)) -#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0U) | PIN_AFIO_AF(GPIOI_PIN9, 0U) | PIN_AFIO_AF(GPIOI_PIN10, 0U) | PIN_AFIO_AF(GPIOI_PIN11, 0U) | PIN_AFIO_AF(GPIOI_PIN12, 0U) | PIN_AFIO_AF(GPIOI_PIN13, 0U) | PIN_AFIO_AF(GPIOI_PIN14, 0U) | PIN_AFIO_AF(GPIOI_PIN15, 0U)) - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if !defined(_FROM_ASM_) -# ifdef __cplusplus -extern "C" { -# endif -void boardInit(void); -# ifdef __cplusplus -} -# endif -#endif /* _FROM_ASM_ */ - -#endif /* BOARD_H */ diff --git a/drivers/boards/BLACKPILL_STM32_F411/board.mk b/drivers/boards/BLACKPILL_STM32_F411/board.mk deleted file mode 100644 index 93c1e62f5..000000000 --- a/drivers/boards/BLACKPILL_STM32_F411/board.mk +++ /dev/null @@ -1,9 +0,0 @@ -# List of all the board related files. -BOARDSRC = $(BOARD_PATH)/boards/BLACKPILL_STM32_F411/board.c - -# Required include directories -BOARDINC = $(BOARD_PATH)/boards/BLACKPILL_STM32_F411 - -# Shared variables -ALLCSRC += $(BOARDSRC) -ALLINC += $(BOARDINC) diff --git a/drivers/boards/BLACKPILL_STM32_F411/cfg/board.chcfg b/drivers/boards/BLACKPILL_STM32_F411/cfg/board.chcfg deleted file mode 100644 index 3095409cc..000000000 --- a/drivers/boards/BLACKPILL_STM32_F411/cfg/board.chcfg +++ /dev/null @@ -1,1193 +0,0 @@ - - - - - resources/gencfg/processors/boards/stm32f4xx/templates - .. - 5.0.x - - STMicroelectronics STM32 Nucleo64-F411RE - ST_NUCLEO64_F411RE - - STM32F411xE - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/drivers/boards/BLACKPILL_STM32_F411/cfg/board.fmpp b/drivers/boards/BLACKPILL_STM32_F411/cfg/board.fmpp deleted file mode 100644 index 41754c141..000000000 --- a/drivers/boards/BLACKPILL_STM32_F411/cfg/board.fmpp +++ /dev/null @@ -1,15 +0,0 @@ -sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates -outputRoot: .. -dataRoot: . - -freemarkerLinks: { - lib: ../../../../../tools/ftl/libs -} - -data : { - doc1:xml ( - board.chcfg - { - } - ) -} diff --git a/drivers/boards/GENERIC_STM32_F072XB/board.c b/drivers/boards/GENERIC_STM32_F072XB/board.c deleted file mode 100644 index c91136e8f..000000000 --- a/drivers/boards/GENERIC_STM32_F072XB/board.c +++ /dev/null @@ -1,250 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * This file has been automatically generated using ChibiStudio board - * generator plugin. Do not edit manually. - */ - -#include "hal.h" -#include "stm32_gpio.h" - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/** - * @brief Type of STM32 GPIO port setup. - */ -typedef struct { - uint32_t moder; - uint32_t otyper; - uint32_t ospeedr; - uint32_t pupdr; - uint32_t odr; - uint32_t afrl; - uint32_t afrh; -} gpio_setup_t; - -/** - * @brief Type of STM32 GPIO initialization data. - */ -typedef struct { -#if STM32_HAS_GPIOA || defined(__DOXYGEN__) - gpio_setup_t PAData; -#endif -#if STM32_HAS_GPIOB || defined(__DOXYGEN__) - gpio_setup_t PBData; -#endif -#if STM32_HAS_GPIOC || defined(__DOXYGEN__) - gpio_setup_t PCData; -#endif -#if STM32_HAS_GPIOD || defined(__DOXYGEN__) - gpio_setup_t PDData; -#endif -#if STM32_HAS_GPIOE || defined(__DOXYGEN__) - gpio_setup_t PEData; -#endif -#if STM32_HAS_GPIOF || defined(__DOXYGEN__) - gpio_setup_t PFData; -#endif -#if STM32_HAS_GPIOG || defined(__DOXYGEN__) - gpio_setup_t PGData; -#endif -#if STM32_HAS_GPIOH || defined(__DOXYGEN__) - gpio_setup_t PHData; -#endif -#if STM32_HAS_GPIOI || defined(__DOXYGEN__) - gpio_setup_t PIData; -#endif -#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) - gpio_setup_t PJData; -#endif -#if STM32_HAS_GPIOK || defined(__DOXYGEN__) - gpio_setup_t PKData; -#endif -} gpio_config_t; - -/** - * @brief STM32 GPIO static initialization data. - */ -static const gpio_config_t gpio_default_config = { -#if STM32_HAS_GPIOA - {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, -#endif -#if STM32_HAS_GPIOB - {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, -#endif -#if STM32_HAS_GPIOC - {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, -#endif -#if STM32_HAS_GPIOD - {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, -#endif -#if STM32_HAS_GPIOE - {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, -#endif -#if STM32_HAS_GPIOF - {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, -#endif -#if STM32_HAS_GPIOG - {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, -#endif -#if STM32_HAS_GPIOH - {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, -#endif -#if STM32_HAS_GPIOI - {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, -#endif -#if STM32_HAS_GPIOJ - {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, -#endif -#if STM32_HAS_GPIOK - {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} -#endif -}; - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { - gpiop->OTYPER = config->otyper; - gpiop->OSPEEDR = config->ospeedr; - gpiop->PUPDR = config->pupdr; - gpiop->ODR = config->odr; - gpiop->AFRL = config->afrl; - gpiop->AFRH = config->afrh; - gpiop->MODER = config->moder; -} - -static void stm32_gpio_init(void) { - /* Enabling GPIO-related clocks, the mask comes from the - registry header file.*/ - rccResetAHB(STM32_GPIO_EN_MASK); - rccEnableAHB(STM32_GPIO_EN_MASK, true); - - /* Initializing all the defined GPIO ports.*/ -#if STM32_HAS_GPIOA - gpio_init(GPIOA, &gpio_default_config.PAData); -#endif -#if STM32_HAS_GPIOB - gpio_init(GPIOB, &gpio_default_config.PBData); -#endif -#if STM32_HAS_GPIOC - gpio_init(GPIOC, &gpio_default_config.PCData); -#endif -#if STM32_HAS_GPIOD - gpio_init(GPIOD, &gpio_default_config.PDData); -#endif -#if STM32_HAS_GPIOE - gpio_init(GPIOE, &gpio_default_config.PEData); -#endif -#if STM32_HAS_GPIOF - gpio_init(GPIOF, &gpio_default_config.PFData); -#endif -#if STM32_HAS_GPIOG - gpio_init(GPIOG, &gpio_default_config.PGData); -#endif -#if STM32_HAS_GPIOH - gpio_init(GPIOH, &gpio_default_config.PHData); -#endif -#if STM32_HAS_GPIOI - gpio_init(GPIOI, &gpio_default_config.PIData); -#endif -#if STM32_HAS_GPIOJ - gpio_init(GPIOJ, &gpio_default_config.PJData); -#endif -#if STM32_HAS_GPIOK - gpio_init(GPIOK, &gpio_default_config.PKData); -#endif -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -__attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} - -/** - * @brief Early initialization code. - * @details GPIO ports and system clocks are initialized before everything - * else. - */ -void __early_init(void) { - enter_bootloader_mode_if_requested(); - - stm32_gpio_init(); - stm32_clock_init(); -} - -#if HAL_USE_SDC || defined(__DOXYGEN__) -/** - * @brief SDC card detection. - */ -bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { - (void)sdcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief SDC card write protection detection. - */ -bool sdc_lld_is_write_protected(SDCDriver *sdcp) { - (void)sdcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif /* HAL_USE_SDC */ - -#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) -/** - * @brief MMC_SPI card detection. - */ -bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { - (void)mmcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief MMC_SPI card write protection detection. - */ -bool mmc_lld_is_write_protected(MMCDriver *mmcp) { - (void)mmcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif - -/** - * @brief Board-specific initialization code. - * @todo Add your board-specific code, if any. - */ -void boardInit(void) {} diff --git a/drivers/boards/GENERIC_STM32_F072XB/board.h b/drivers/boards/GENERIC_STM32_F072XB/board.h deleted file mode 100644 index 87570e62d..000000000 --- a/drivers/boards/GENERIC_STM32_F072XB/board.h +++ /dev/null @@ -1,407 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * This file has been automatically generated using ChibiStudio board - * generator plugin. Do not edit manually. - */ - -#ifndef BOARD_H -#define BOARD_H - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/* - * Setup for Generic STM32_F072 Board - */ - -/* - * Board identifier. - */ -#define BOARD_GENERIC_STM32_F072XB -#define BOARD_NAME "STM32_F072" - -/* - * Board oscillators-related settings. - * NOTE: LSE not fitted. - * NOTE: HSE not fitted. - */ -#if !defined(STM32_LSECLK) -# define STM32_LSECLK 0U -#endif - -#define STM32_LSEDRV (3U << 3U) - -#if !defined(STM32_HSECLK) -# define STM32_HSECLK 0U -#endif - -#define STM32_HSE_BYPASS - -/* - * MCU type as defined in the ST header. - */ -#define STM32F072xB - -/* - * IO pins assignments. - */ -#define GPIOA_BUTTON 0U -#define GPIOA_PIN1 1U -#define GPIOA_PIN2 2U -#define GPIOA_PIN3 3U -#define GPIOA_PIN4 4U -#define GPIOA_PIN5 5U -#define GPIOA_PIN6 6U -#define GPIOA_PIN7 7U -#define GPIOA_PIN8 8U -#define GPIOA_PIN9 9U -#define GPIOA_PIN10 10U -#define GPIOA_USB_DM 11U -#define GPIOA_USB_DP 12U -#define GPIOA_SWDIO 13U -#define GPIOA_SWCLK 14U -#define GPIOA_PIN15 15U - -#define GPIOB_PIN0 0U -#define GPIOB_PIN1 1U -#define GPIOB_PIN2 2U -#define GPIOB_PIN3 3U -#define GPIOB_PIN4 4U -#define GPIOB_PIN5 5U -#define GPIOB_PIN6 6U -#define GPIOB_PIN7 7U -#define GPIOB_PIN8 8U -#define GPIOB_PIN9 9U -#define GPIOB_PIN10 10U -#define GPIOB_PIN11 11U -#define GPIOB_PIN12 12U -#define GPIOB_SPI2_SCK 13U -#define GPIOB_SPI2_MISO 14U -#define GPIOB_SPI2_MOSI 15U - -#define GPIOC_MEMS_CS 0U -#define GPIOC_PIN1 1U -#define GPIOC_PIN2 2U -#define GPIOC_PIN3 3U -#define GPIOC_PIN4 4U -#define GPIOC_PIN5 5U -#define GPIOC_LED_RED 6U -#define GPIOC_LED_BLUE 7U -#define GPIOC_LED_ORANGE 8U -#define GPIOC_LED_GREEN 9U -#define GPIOC_PIN10 10U -#define GPIOC_PIN11 11U -#define GPIOC_PIN12 12U -#define GPIOC_PIN13 13U -#define GPIOC_OSC32_IN 14U -#define GPIOC_OSC32_OUT 15U - -#define GPIOD_PIN0 0U -#define GPIOD_PIN1 1U -#define GPIOD_PIN2 2U -#define GPIOD_PIN3 3U -#define GPIOD_PIN4 4U -#define GPIOD_PIN5 5U -#define GPIOD_PIN6 6U -#define GPIOD_PIN7 7U -#define GPIOD_PIN8 8U -#define GPIOD_PIN9 9U -#define GPIOD_PIN10 10U -#define GPIOD_PIN11 11U -#define GPIOD_PIN12 12U -#define GPIOD_PIN13 13U -#define GPIOD_PIN14 14U -#define GPIOD_PIN15 15U - -#define GPIOE_PIN0 0U -#define GPIOE_PIN1 1U -#define GPIOE_PIN2 2U -#define GPIOE_PIN3 3U -#define GPIOE_PIN4 4U -#define GPIOE_PIN5 5U -#define GPIOE_PIN6 6U -#define GPIOE_PIN7 7U -#define GPIOE_PIN8 8U -#define GPIOE_PIN9 9U -#define GPIOE_PIN10 10U -#define GPIOE_PIN11 11U -#define GPIOE_PIN12 12U -#define GPIOE_PIN13 13U -#define GPIOE_PIN14 14U -#define GPIOE_PIN15 15U - -#define GPIOF_OSC_IN 0U -#define GPIOF_OSC_OUT 1U -#define GPIOF_PIN2 2U -#define GPIOF_PIN3 3U -#define GPIOF_PIN4 4U -#define GPIOF_PIN5 5U -#define GPIOF_PIN6 6U -#define GPIOF_PIN7 7U -#define GPIOF_PIN8 8U -#define GPIOF_PIN9 9U -#define GPIOF_PIN10 10U -#define GPIOF_PIN11 11U -#define GPIOF_PIN12 12U -#define GPIOF_PIN13 13U -#define GPIOF_PIN14 14U -#define GPIOF_PIN15 15U - -/* - * IO lines assignments. - */ -#define LINE_BUTTON PAL_LINE(GPIOA, 0U) -#define LINE_USB_DM PAL_LINE(GPIOA, 11U) -#define LINE_USB_DP PAL_LINE(GPIOA, 12U) -#define LINE_SWDIO PAL_LINE(GPIOA, 13U) -#define LINE_SWCLK PAL_LINE(GPIOA, 14U) -#define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U) -#define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U) -#define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U) -#define LINE_MEMS_CS PAL_LINE(GPIOC, 0U) -#define LINE_LED_RED PAL_LINE(GPIOC, 6U) -#define LINE_LED_BLUE PAL_LINE(GPIOC, 7U) -#define LINE_LED_ORANGE PAL_LINE(GPIOC, 8U) -#define LINE_LED_GREEN PAL_LINE(GPIOC, 9U) -#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) -#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) -#define LINE_OSC_IN PAL_LINE(GPIOF, 0U) -#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/* - * I/O ports initial setup, this configuration is established soon after reset - * in the initialization code. - * Please refer to the STM32 Reference Manual for details. - */ -#define PIN_MODE_INPUT(n) (0U << ((n)*2U)) -#define PIN_MODE_OUTPUT(n) (1U << ((n)*2U)) -#define PIN_MODE_ALTERNATE(n) (2U << ((n)*2U)) -#define PIN_MODE_ANALOG(n) (3U << ((n)*2U)) -#define PIN_ODR_LOW(n) (0U << (n)) -#define PIN_ODR_HIGH(n) (1U << (n)) -#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) -#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) -#define PIN_OSPEED_VERYLOW(n) (0U << ((n)*2U)) -#define PIN_OSPEED_LOW(n) (1U << ((n)*2U)) -#define PIN_OSPEED_MEDIUM(n) (2U << ((n)*2U)) -#define PIN_OSPEED_HIGH(n) (3U << ((n)*2U)) -#define PIN_PUPDR_FLOATING(n) (0U << ((n)*2U)) -#define PIN_PUPDR_PULLUP(n) (1U << ((n)*2U)) -#define PIN_PUPDR_PULLDOWN(n) (2U << ((n)*2U)) -#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) - -/* - * GPIOA setup: - * - * PA0 - BUTTON (input floating). - * PA1 - PIN1 (input pullup). - * PA2 - PIN2 (input pullup). - * PA3 - PIN3 (input pullup). - * PA4 - PIN4 (input pullup). - * PA5 - PIN5 (input pullup). - * PA6 - PIN6 (input pullup). - * PA7 - PIN7 (input pullup). - * PA8 - PIN8 (input pullup). - * PA9 - PIN9 (input pullup). - * PA10 - PIN10 (input pullup). - * PA11 - USB_DM (input floating). - * PA12 - USB_DP (input floating). - * PA13 - SWDIO (alternate 0). - * PA14 - SWCLK (alternate 0). - * PA15 - PIN15 (input pullup). - */ -#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | PIN_MODE_INPUT(GPIOA_PIN1) | PIN_MODE_INPUT(GPIOA_PIN2) | PIN_MODE_INPUT(GPIOA_PIN3) | PIN_MODE_INPUT(GPIOA_PIN4) | PIN_MODE_INPUT(GPIOA_PIN5) | PIN_MODE_INPUT(GPIOA_PIN6) | PIN_MODE_INPUT(GPIOA_PIN7) | PIN_MODE_INPUT(GPIOA_PIN8) | PIN_MODE_INPUT(GPIOA_PIN9) | PIN_MODE_INPUT(GPIOA_PIN10) | PIN_MODE_INPUT(GPIOA_USB_DM) | PIN_MODE_INPUT(GPIOA_USB_DP) | PIN_MODE_ALTERNATE(GPIOA_SWDIO) | PIN_MODE_ALTERNATE(GPIOA_SWCLK) | PIN_MODE_INPUT(GPIOA_PIN15)) -#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) -#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_BUTTON) | PIN_OSPEED_VERYLOW(GPIOA_PIN1) | PIN_OSPEED_VERYLOW(GPIOA_PIN2) | PIN_OSPEED_VERYLOW(GPIOA_PIN3) | PIN_OSPEED_VERYLOW(GPIOA_PIN4) | PIN_OSPEED_VERYLOW(GPIOA_PIN5) | PIN_OSPEED_VERYLOW(GPIOA_PIN6) | PIN_OSPEED_VERYLOW(GPIOA_PIN7) | PIN_OSPEED_VERYLOW(GPIOA_PIN8) | PIN_OSPEED_VERYLOW(GPIOA_PIN9) | PIN_OSPEED_VERYLOW(GPIOA_PIN10) | PIN_OSPEED_VERYLOW(GPIOA_USB_DM) | PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | PIN_OSPEED_HIGH(GPIOA_SWDIO) | PIN_OSPEED_HIGH(GPIOA_SWCLK) | PIN_OSPEED_HIGH(GPIOA_PIN15)) -#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | PIN_PUPDR_PULLUP(GPIOA_PIN1) | PIN_PUPDR_PULLUP(GPIOA_PIN2) | PIN_PUPDR_PULLUP(GPIOA_PIN3) | PIN_PUPDR_PULLUP(GPIOA_PIN4) | PIN_PUPDR_PULLUP(GPIOA_PIN5) | PIN_PUPDR_PULLUP(GPIOA_PIN6) | PIN_PUPDR_PULLUP(GPIOA_PIN7) | PIN_PUPDR_PULLUP(GPIOA_PIN8) | PIN_PUPDR_PULLUP(GPIOA_PIN9) | PIN_PUPDR_PULLUP(GPIOA_PIN10) | PIN_PUPDR_FLOATING(GPIOA_USB_DM) | PIN_PUPDR_FLOATING(GPIOA_USB_DP) | PIN_PUPDR_PULLUP(GPIOA_SWDIO) | PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | PIN_PUPDR_PULLUP(GPIOA_PIN15)) -#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | PIN_ODR_HIGH(GPIOA_PIN1) | PIN_ODR_HIGH(GPIOA_PIN2) | PIN_ODR_HIGH(GPIOA_PIN3) | PIN_ODR_HIGH(GPIOA_PIN4) | PIN_ODR_HIGH(GPIOA_PIN5) | PIN_ODR_HIGH(GPIOA_PIN6) | PIN_ODR_HIGH(GPIOA_PIN7) | PIN_ODR_HIGH(GPIOA_PIN8) | PIN_ODR_HIGH(GPIOA_PIN9) | PIN_ODR_HIGH(GPIOA_PIN10) | PIN_ODR_HIGH(GPIOA_USB_DM) | PIN_ODR_HIGH(GPIOA_USB_DP) | PIN_ODR_HIGH(GPIOA_SWDIO) | PIN_ODR_HIGH(GPIOA_SWCLK) | PIN_ODR_HIGH(GPIOA_PIN15)) -#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0U) | PIN_AFIO_AF(GPIOA_PIN1, 0U) | PIN_AFIO_AF(GPIOA_PIN2, 0U) | PIN_AFIO_AF(GPIOA_PIN3, 0U) | PIN_AFIO_AF(GPIOA_PIN4, 0U) | PIN_AFIO_AF(GPIOA_PIN5, 0U) | PIN_AFIO_AF(GPIOA_PIN6, 0U) | PIN_AFIO_AF(GPIOA_PIN7, 0U)) -#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | PIN_AFIO_AF(GPIOA_PIN9, 0U) | PIN_AFIO_AF(GPIOA_PIN10, 0U) | PIN_AFIO_AF(GPIOA_USB_DM, 0U) | PIN_AFIO_AF(GPIOA_USB_DP, 0U) | PIN_AFIO_AF(GPIOA_SWDIO, 0U) | PIN_AFIO_AF(GPIOA_SWCLK, 0U) | PIN_AFIO_AF(GPIOA_PIN15, 0U)) - -/* - * GPIOB setup: - * - * PB0 - PIN0 (input pullup). - * PB1 - PIN1 (input pullup). - * PB2 - PIN2 (input pullup). - * PB3 - PIN3 (input pullup). - * PB4 - PIN4 (input pullup). - * PB5 - PIN5 (input pullup). - * PB6 - PIN6 (input pullup). - * PB7 - PIN7 (input pullup). - * PB8 - PIN8 (input pullup). - * PB9 - PIN9 (input pullup). - * PB10 - PIN10 (input pullup). - * PB11 - PIN11 (input pullup). - * PB12 - PIN12 (input pullup). - * PB13 - SPI2_SCK (alternate 0). - * PB14 - SPI2_MISO (alternate 0). - * PB15 - SPI2_MOSI (alternate 0). - */ -#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | PIN_MODE_INPUT(GPIOB_PIN1) | PIN_MODE_INPUT(GPIOB_PIN2) | PIN_MODE_INPUT(GPIOB_PIN3) | PIN_MODE_INPUT(GPIOB_PIN4) | PIN_MODE_INPUT(GPIOB_PIN5) | PIN_MODE_INPUT(GPIOB_PIN6) | PIN_MODE_INPUT(GPIOB_PIN7) | PIN_MODE_INPUT(GPIOB_PIN8) | PIN_MODE_INPUT(GPIOB_PIN9) | PIN_MODE_INPUT(GPIOB_PIN10) | PIN_MODE_INPUT(GPIOB_PIN11) | PIN_MODE_INPUT(GPIOB_PIN12) | PIN_MODE_ALTERNATE(GPIOB_SPI2_SCK) | PIN_MODE_ALTERNATE(GPIOB_SPI2_MISO) | PIN_MODE_ALTERNATE(GPIOB_SPI2_MOSI)) -#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | PIN_OTYPE_PUSHPULL(GPIOB_SPI2_SCK) | PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MISO) | PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MOSI)) -#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | PIN_OSPEED_VERYLOW(GPIOB_PIN1) | PIN_OSPEED_HIGH(GPIOB_PIN2) | PIN_OSPEED_HIGH(GPIOB_PIN3) | PIN_OSPEED_HIGH(GPIOB_PIN4) | PIN_OSPEED_VERYLOW(GPIOB_PIN5) | PIN_OSPEED_VERYLOW(GPIOB_PIN6) | PIN_OSPEED_VERYLOW(GPIOB_PIN7) | PIN_OSPEED_VERYLOW(GPIOB_PIN8) | PIN_OSPEED_VERYLOW(GPIOB_PIN9) | PIN_OSPEED_VERYLOW(GPIOB_PIN10) | PIN_OSPEED_VERYLOW(GPIOB_PIN11) | PIN_OSPEED_VERYLOW(GPIOB_PIN12) | PIN_OSPEED_VERYLOW(GPIOB_SPI2_SCK) | PIN_OSPEED_VERYLOW(GPIOB_SPI2_MISO) | PIN_OSPEED_VERYLOW(GPIOB_SPI2_MOSI)) -#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | PIN_PUPDR_PULLUP(GPIOB_PIN1) | PIN_PUPDR_PULLUP(GPIOB_PIN2) | PIN_PUPDR_PULLUP(GPIOB_PIN3) | PIN_PUPDR_PULLUP(GPIOB_PIN4) | PIN_PUPDR_PULLUP(GPIOB_PIN5) | PIN_PUPDR_PULLUP(GPIOB_PIN6) | PIN_PUPDR_PULLUP(GPIOB_PIN7) | PIN_PUPDR_PULLUP(GPIOB_PIN8) | PIN_PUPDR_PULLUP(GPIOB_PIN9) | PIN_PUPDR_PULLUP(GPIOB_PIN10) | PIN_PUPDR_PULLUP(GPIOB_PIN11) | PIN_PUPDR_PULLUP(GPIOB_PIN12) | PIN_PUPDR_FLOATING(GPIOB_SPI2_SCK) | PIN_PUPDR_FLOATING(GPIOB_SPI2_MISO) | PIN_PUPDR_FLOATING(GPIOB_SPI2_MOSI)) -#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | PIN_ODR_HIGH(GPIOB_PIN1) | PIN_ODR_HIGH(GPIOB_PIN2) | PIN_ODR_HIGH(GPIOB_PIN3) | PIN_ODR_HIGH(GPIOB_PIN4) | PIN_ODR_HIGH(GPIOB_PIN5) | PIN_ODR_HIGH(GPIOB_PIN6) | PIN_ODR_HIGH(GPIOB_PIN7) | PIN_ODR_HIGH(GPIOB_PIN8) | PIN_ODR_HIGH(GPIOB_PIN9) | PIN_ODR_HIGH(GPIOB_PIN10) | PIN_ODR_HIGH(GPIOB_PIN11) | PIN_ODR_HIGH(GPIOB_PIN12) | PIN_ODR_HIGH(GPIOB_SPI2_SCK) | PIN_ODR_HIGH(GPIOB_SPI2_MISO) | PIN_ODR_HIGH(GPIOB_SPI2_MOSI)) -#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | PIN_AFIO_AF(GPIOB_PIN1, 0U) | PIN_AFIO_AF(GPIOB_PIN2, 0U) | PIN_AFIO_AF(GPIOB_PIN3, 0U) | PIN_AFIO_AF(GPIOB_PIN4, 0U) | PIN_AFIO_AF(GPIOB_PIN5, 0U) | PIN_AFIO_AF(GPIOB_PIN6, 0U) | PIN_AFIO_AF(GPIOB_PIN7, 0U)) -#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | PIN_AFIO_AF(GPIOB_PIN9, 0U) | PIN_AFIO_AF(GPIOB_PIN10, 0U) | PIN_AFIO_AF(GPIOB_PIN11, 0U) | PIN_AFIO_AF(GPIOB_PIN12, 0U) | PIN_AFIO_AF(GPIOB_SPI2_SCK, 0U) | PIN_AFIO_AF(GPIOB_SPI2_MISO, 0U) | PIN_AFIO_AF(GPIOB_SPI2_MOSI, 0U)) - -/* - * GPIOC setup: - * - * PC0 - MEMS_CS (output pushpull maximum). - * PC1 - PIN1 (input pullup). - * PC2 - PIN2 (input pullup). - * PC3 - PIN3 (input pullup). - * PC4 - PIN4 (input pullup). - * PC5 - PIN5 (input pullup). - * PC6 - LED_RED (output pushpull maximum). - * PC7 - LED_BLUE (output pushpull maximum). - * PC8 - LED_ORANGE (output pushpull maximum). - * PC9 - LED_GREEN (output pushpull maximum). - * PC10 - PIN10 (input pullup). - * PC11 - PIN11 (input pullup). - * PC12 - PIN12 (input pullup). - * PC13 - PIN13 (input pullup). - * PC14 - OSC32_IN (input floating). - * PC15 - OSC32_OUT (input floating). - */ -#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_MEMS_CS) | PIN_MODE_INPUT(GPIOC_PIN1) | PIN_MODE_INPUT(GPIOC_PIN2) | PIN_MODE_INPUT(GPIOC_PIN3) | PIN_MODE_INPUT(GPIOC_PIN4) | PIN_MODE_INPUT(GPIOC_PIN5) | PIN_MODE_OUTPUT(GPIOC_LED_RED) | PIN_MODE_OUTPUT(GPIOC_LED_BLUE) | PIN_MODE_OUTPUT(GPIOC_LED_ORANGE) | PIN_MODE_OUTPUT(GPIOC_LED_GREEN) | PIN_MODE_INPUT(GPIOC_PIN10) | PIN_MODE_INPUT(GPIOC_PIN11) | PIN_MODE_INPUT(GPIOC_PIN12) | PIN_MODE_INPUT(GPIOC_PIN13) | PIN_MODE_INPUT(GPIOC_OSC32_IN) | PIN_MODE_INPUT(GPIOC_OSC32_OUT)) -#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_MEMS_CS) | PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | PIN_OTYPE_PUSHPULL(GPIOC_LED_RED) | PIN_OTYPE_PUSHPULL(GPIOC_LED_BLUE) | PIN_OTYPE_PUSHPULL(GPIOC_LED_ORANGE) | PIN_OTYPE_PUSHPULL(GPIOC_LED_GREEN) | PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT)) -#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_MEMS_CS) | PIN_OSPEED_VERYLOW(GPIOC_PIN1) | PIN_OSPEED_VERYLOW(GPIOC_PIN2) | PIN_OSPEED_VERYLOW(GPIOC_PIN3) | PIN_OSPEED_VERYLOW(GPIOC_PIN4) | PIN_OSPEED_VERYLOW(GPIOC_PIN5) | PIN_OSPEED_HIGH(GPIOC_LED_RED) | PIN_OSPEED_HIGH(GPIOC_LED_BLUE) | PIN_OSPEED_HIGH(GPIOC_LED_ORANGE) | PIN_OSPEED_HIGH(GPIOC_LED_GREEN) | PIN_OSPEED_VERYLOW(GPIOC_PIN10) | PIN_OSPEED_VERYLOW(GPIOC_PIN11) | PIN_OSPEED_VERYLOW(GPIOC_PIN12) | PIN_OSPEED_VERYLOW(GPIOC_PIN13) | PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | PIN_OSPEED_HIGH(GPIOC_OSC32_OUT)) -#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_MEMS_CS) | PIN_PUPDR_PULLUP(GPIOC_PIN1) | PIN_PUPDR_PULLUP(GPIOC_PIN2) | PIN_PUPDR_PULLUP(GPIOC_PIN3) | PIN_PUPDR_PULLUP(GPIOC_PIN4) | PIN_PUPDR_PULLUP(GPIOC_PIN5) | PIN_PUPDR_FLOATING(GPIOC_LED_RED) | PIN_PUPDR_FLOATING(GPIOC_LED_BLUE) | PIN_PUPDR_FLOATING(GPIOC_LED_ORANGE) | PIN_PUPDR_FLOATING(GPIOC_LED_GREEN) | PIN_PUPDR_PULLUP(GPIOC_PIN10) | PIN_PUPDR_PULLUP(GPIOC_PIN11) | PIN_PUPDR_PULLUP(GPIOC_PIN12) | PIN_PUPDR_PULLUP(GPIOC_PIN13) | PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT)) -#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_MEMS_CS) | PIN_ODR_HIGH(GPIOC_PIN1) | PIN_ODR_HIGH(GPIOC_PIN2) | PIN_ODR_HIGH(GPIOC_PIN3) | PIN_ODR_HIGH(GPIOC_PIN4) | PIN_ODR_HIGH(GPIOC_PIN5) | PIN_ODR_LOW(GPIOC_LED_RED) | PIN_ODR_LOW(GPIOC_LED_BLUE) | PIN_ODR_LOW(GPIOC_LED_ORANGE) | PIN_ODR_LOW(GPIOC_LED_GREEN) | PIN_ODR_HIGH(GPIOC_PIN10) | PIN_ODR_HIGH(GPIOC_PIN11) | PIN_ODR_HIGH(GPIOC_PIN12) | PIN_ODR_HIGH(GPIOC_PIN13) | PIN_ODR_HIGH(GPIOC_OSC32_IN) | PIN_ODR_HIGH(GPIOC_OSC32_OUT)) -#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_MEMS_CS, 0U) | PIN_AFIO_AF(GPIOC_PIN1, 0U) | PIN_AFIO_AF(GPIOC_PIN2, 0U) | PIN_AFIO_AF(GPIOC_PIN3, 0U) | PIN_AFIO_AF(GPIOC_PIN4, 0U) | PIN_AFIO_AF(GPIOC_PIN5, 0U) | PIN_AFIO_AF(GPIOC_LED_RED, 0U) | PIN_AFIO_AF(GPIOC_LED_BLUE, 0U)) -#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_LED_ORANGE, 0U) | PIN_AFIO_AF(GPIOC_LED_GREEN, 0U) | PIN_AFIO_AF(GPIOC_PIN10, 0U) | PIN_AFIO_AF(GPIOC_PIN11, 0U) | PIN_AFIO_AF(GPIOC_PIN12, 0U) | PIN_AFIO_AF(GPIOC_PIN13, 0U) | PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U)) - -/* - * GPIOD setup: - * - * PD0 - PIN0 (input pullup). - * PD1 - PIN1 (input pullup). - * PD2 - PIN2 (input pullup). - * PD3 - PIN3 (input pullup). - * PD4 - PIN4 (input pullup). - * PD5 - PIN5 (input pullup). - * PD6 - PIN6 (input pullup). - * PD7 - PIN7 (input pullup). - * PD8 - PIN8 (input pullup). - * PD9 - PIN9 (input pullup). - * PD10 - PIN10 (input pullup). - * PD11 - PIN11 (input pullup). - * PD12 - PIN12 (input pullup). - * PD13 - PIN13 (input pullup). - * PD14 - PIN14 (input pullup). - * PD15 - PIN15 (input pullup). - */ -#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | PIN_MODE_INPUT(GPIOD_PIN1) | PIN_MODE_INPUT(GPIOD_PIN2) | PIN_MODE_INPUT(GPIOD_PIN3) | PIN_MODE_INPUT(GPIOD_PIN4) | PIN_MODE_INPUT(GPIOD_PIN5) | PIN_MODE_INPUT(GPIOD_PIN6) | PIN_MODE_INPUT(GPIOD_PIN7) | PIN_MODE_INPUT(GPIOD_PIN8) | PIN_MODE_INPUT(GPIOD_PIN9) | PIN_MODE_INPUT(GPIOD_PIN10) | PIN_MODE_INPUT(GPIOD_PIN11) | PIN_MODE_INPUT(GPIOD_PIN12) | PIN_MODE_INPUT(GPIOD_PIN13) | PIN_MODE_INPUT(GPIOD_PIN14) | PIN_MODE_INPUT(GPIOD_PIN15)) -#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) -#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | PIN_OSPEED_VERYLOW(GPIOD_PIN1) | PIN_OSPEED_VERYLOW(GPIOD_PIN2) | PIN_OSPEED_VERYLOW(GPIOD_PIN3) | PIN_OSPEED_VERYLOW(GPIOD_PIN4) | PIN_OSPEED_VERYLOW(GPIOD_PIN5) | PIN_OSPEED_VERYLOW(GPIOD_PIN6) | PIN_OSPEED_VERYLOW(GPIOD_PIN7) | PIN_OSPEED_VERYLOW(GPIOD_PIN8) | PIN_OSPEED_VERYLOW(GPIOD_PIN9) | PIN_OSPEED_VERYLOW(GPIOD_PIN10) | PIN_OSPEED_VERYLOW(GPIOD_PIN11) | PIN_OSPEED_VERYLOW(GPIOD_PIN12) | PIN_OSPEED_VERYLOW(GPIOD_PIN13) | PIN_OSPEED_VERYLOW(GPIOD_PIN14) | PIN_OSPEED_VERYLOW(GPIOD_PIN15)) -#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | PIN_PUPDR_PULLUP(GPIOD_PIN1) | PIN_PUPDR_PULLUP(GPIOD_PIN2) | PIN_PUPDR_PULLUP(GPIOD_PIN3) | PIN_PUPDR_PULLUP(GPIOD_PIN4) | PIN_PUPDR_PULLUP(GPIOD_PIN5) | PIN_PUPDR_PULLUP(GPIOD_PIN6) | PIN_PUPDR_PULLUP(GPIOD_PIN7) | PIN_PUPDR_PULLUP(GPIOD_PIN8) | PIN_PUPDR_PULLUP(GPIOD_PIN9) | PIN_PUPDR_PULLUP(GPIOD_PIN10) | PIN_PUPDR_PULLUP(GPIOD_PIN11) | PIN_PUPDR_PULLUP(GPIOD_PIN12) | PIN_PUPDR_PULLUP(GPIOD_PIN13) | PIN_PUPDR_PULLUP(GPIOD_PIN14) | PIN_PUPDR_PULLUP(GPIOD_PIN15)) -#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | PIN_ODR_HIGH(GPIOD_PIN1) | PIN_ODR_HIGH(GPIOD_PIN2) | PIN_ODR_HIGH(GPIOD_PIN3) | PIN_ODR_HIGH(GPIOD_PIN4) | PIN_ODR_HIGH(GPIOD_PIN5) | PIN_ODR_HIGH(GPIOD_PIN6) | PIN_ODR_HIGH(GPIOD_PIN7) | PIN_ODR_HIGH(GPIOD_PIN8) | PIN_ODR_HIGH(GPIOD_PIN9) | PIN_ODR_HIGH(GPIOD_PIN10) | PIN_ODR_HIGH(GPIOD_PIN11) | PIN_ODR_HIGH(GPIOD_PIN12) | PIN_ODR_HIGH(GPIOD_PIN13) | PIN_ODR_HIGH(GPIOD_PIN14) | PIN_ODR_HIGH(GPIOD_PIN15)) -#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | PIN_AFIO_AF(GPIOD_PIN1, 0U) | PIN_AFIO_AF(GPIOD_PIN2, 0U) | PIN_AFIO_AF(GPIOD_PIN3, 0U) | PIN_AFIO_AF(GPIOD_PIN4, 0U) | PIN_AFIO_AF(GPIOD_PIN5, 0U) | PIN_AFIO_AF(GPIOD_PIN6, 0U) | PIN_AFIO_AF(GPIOD_PIN7, 0U)) -#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | PIN_AFIO_AF(GPIOD_PIN9, 0U) | PIN_AFIO_AF(GPIOD_PIN10, 0U) | PIN_AFIO_AF(GPIOD_PIN11, 0U) | PIN_AFIO_AF(GPIOD_PIN12, 0U) | PIN_AFIO_AF(GPIOD_PIN13, 0U) | PIN_AFIO_AF(GPIOD_PIN14, 0U) | PIN_AFIO_AF(GPIOD_PIN15, 0U)) - -/* - * GPIOE setup: - * - * PE0 - PIN0 (input pullup). - * PE1 - PIN1 (input pullup). - * PE2 - PIN2 (input pullup). - * PE3 - PIN3 (input pullup). - * PE4 - PIN4 (input pullup). - * PE5 - PIN5 (input pullup). - * PE6 - PIN6 (input pullup). - * PE7 - PIN7 (input pullup). - * PE8 - PIN8 (input pullup). - * PE9 - PIN9 (input pullup). - * PE10 - PIN10 (input pullup). - * PE11 - PIN11 (input pullup). - * PE12 - PIN12 (input pullup). - * PE13 - PIN13 (input pullup). - * PE14 - PIN14 (input pullup). - * PE15 - PIN15 (input pullup). - */ -#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | PIN_MODE_INPUT(GPIOE_PIN1) | PIN_MODE_INPUT(GPIOE_PIN2) | PIN_MODE_INPUT(GPIOE_PIN3) | PIN_MODE_INPUT(GPIOE_PIN4) | PIN_MODE_INPUT(GPIOE_PIN5) | PIN_MODE_INPUT(GPIOE_PIN6) | PIN_MODE_INPUT(GPIOE_PIN7) | PIN_MODE_INPUT(GPIOE_PIN8) | PIN_MODE_INPUT(GPIOE_PIN9) | PIN_MODE_INPUT(GPIOE_PIN10) | PIN_MODE_INPUT(GPIOE_PIN11) | PIN_MODE_INPUT(GPIOE_PIN12) | PIN_MODE_INPUT(GPIOE_PIN13) | PIN_MODE_INPUT(GPIOE_PIN14) | PIN_MODE_INPUT(GPIOE_PIN15)) -#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) -#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) | PIN_OSPEED_VERYLOW(GPIOE_PIN1) | PIN_OSPEED_VERYLOW(GPIOE_PIN2) | PIN_OSPEED_VERYLOW(GPIOE_PIN3) | PIN_OSPEED_VERYLOW(GPIOE_PIN4) | PIN_OSPEED_VERYLOW(GPIOE_PIN5) | PIN_OSPEED_VERYLOW(GPIOE_PIN6) | PIN_OSPEED_VERYLOW(GPIOE_PIN7) | PIN_OSPEED_VERYLOW(GPIOE_PIN8) | PIN_OSPEED_VERYLOW(GPIOE_PIN9) | PIN_OSPEED_VERYLOW(GPIOE_PIN10) | PIN_OSPEED_VERYLOW(GPIOE_PIN11) | PIN_OSPEED_VERYLOW(GPIOE_PIN12) | PIN_OSPEED_VERYLOW(GPIOE_PIN13) | PIN_OSPEED_VERYLOW(GPIOE_PIN14) | PIN_OSPEED_VERYLOW(GPIOE_PIN15)) -#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | PIN_PUPDR_PULLUP(GPIOE_PIN1) | PIN_PUPDR_PULLUP(GPIOE_PIN2) | PIN_PUPDR_PULLUP(GPIOE_PIN3) | PIN_PUPDR_PULLUP(GPIOE_PIN4) | PIN_PUPDR_PULLUP(GPIOE_PIN5) | PIN_PUPDR_PULLUP(GPIOE_PIN6) | PIN_PUPDR_PULLUP(GPIOE_PIN7) | PIN_PUPDR_PULLUP(GPIOE_PIN8) | PIN_PUPDR_PULLUP(GPIOE_PIN9) | PIN_PUPDR_PULLUP(GPIOE_PIN10) | PIN_PUPDR_PULLUP(GPIOE_PIN11) | PIN_PUPDR_PULLUP(GPIOE_PIN12) | PIN_PUPDR_PULLUP(GPIOE_PIN13) | PIN_PUPDR_PULLUP(GPIOE_PIN14) | PIN_PUPDR_PULLUP(GPIOE_PIN15)) -#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | PIN_ODR_HIGH(GPIOE_PIN1) | PIN_ODR_HIGH(GPIOE_PIN2) | PIN_ODR_HIGH(GPIOE_PIN3) | PIN_ODR_HIGH(GPIOE_PIN4) | PIN_ODR_HIGH(GPIOE_PIN5) | PIN_ODR_HIGH(GPIOE_PIN6) | PIN_ODR_HIGH(GPIOE_PIN7) | PIN_ODR_HIGH(GPIOE_PIN8) | PIN_ODR_HIGH(GPIOE_PIN9) | PIN_ODR_HIGH(GPIOE_PIN10) | PIN_ODR_HIGH(GPIOE_PIN11) | PIN_ODR_HIGH(GPIOE_PIN12) | PIN_ODR_HIGH(GPIOE_PIN13) | PIN_ODR_HIGH(GPIOE_PIN14) | PIN_ODR_HIGH(GPIOE_PIN15)) -#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | PIN_AFIO_AF(GPIOE_PIN1, 0U) | PIN_AFIO_AF(GPIOE_PIN2, 0U) | PIN_AFIO_AF(GPIOE_PIN3, 0U) | PIN_AFIO_AF(GPIOE_PIN4, 0U) | PIN_AFIO_AF(GPIOE_PIN5, 0U) | PIN_AFIO_AF(GPIOE_PIN6, 0U) | PIN_AFIO_AF(GPIOE_PIN7, 0U)) -#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | PIN_AFIO_AF(GPIOE_PIN9, 0U) | PIN_AFIO_AF(GPIOE_PIN10, 0U) | PIN_AFIO_AF(GPIOE_PIN11, 0U) | PIN_AFIO_AF(GPIOE_PIN12, 0U) | PIN_AFIO_AF(GPIOE_PIN13, 0U) | PIN_AFIO_AF(GPIOE_PIN14, 0U) | PIN_AFIO_AF(GPIOE_PIN15, 0U)) - -/* - * GPIOF setup: - * - * PF0 - OSC_IN (input floating). - * PF1 - OSC_OUT (input floating). - * PF2 - PIN2 (input pullup). - * PF3 - PIN3 (input pullup). - * PF4 - PIN4 (input pullup). - * PF5 - PIN5 (input pullup). - * PF6 - PIN6 (input pullup). - * PF7 - PIN7 (input pullup). - * PF8 - PIN8 (input pullup). - * PF9 - PIN9 (input pullup). - * PF10 - PIN10 (input pullup). - * PF11 - PIN11 (input pullup). - * PF12 - PIN12 (input pullup). - * PF13 - PIN13 (input pullup). - * PF14 - PIN14 (input pullup). - * PF15 - PIN15 (input pullup). - */ -#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_OSC_IN) | PIN_MODE_INPUT(GPIOF_OSC_OUT) | PIN_MODE_INPUT(GPIOF_PIN2) | PIN_MODE_INPUT(GPIOF_PIN3) | PIN_MODE_INPUT(GPIOF_PIN4) | PIN_MODE_INPUT(GPIOF_PIN5) | PIN_MODE_INPUT(GPIOF_PIN6) | PIN_MODE_INPUT(GPIOF_PIN7) | PIN_MODE_INPUT(GPIOF_PIN8) | PIN_MODE_INPUT(GPIOF_PIN9) | PIN_MODE_INPUT(GPIOF_PIN10) | PIN_MODE_INPUT(GPIOF_PIN11) | PIN_MODE_INPUT(GPIOF_PIN12) | PIN_MODE_INPUT(GPIOF_PIN13) | PIN_MODE_INPUT(GPIOF_PIN14) | PIN_MODE_INPUT(GPIOF_PIN15)) -#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) | PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT) | PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) -#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOF_OSC_IN) | PIN_OSPEED_VERYLOW(GPIOF_OSC_OUT) | PIN_OSPEED_VERYLOW(GPIOF_PIN2) | PIN_OSPEED_VERYLOW(GPIOF_PIN3) | PIN_OSPEED_VERYLOW(GPIOF_PIN4) | PIN_OSPEED_VERYLOW(GPIOF_PIN5) | PIN_OSPEED_VERYLOW(GPIOF_PIN6) | PIN_OSPEED_VERYLOW(GPIOF_PIN7) | PIN_OSPEED_VERYLOW(GPIOF_PIN8) | PIN_OSPEED_VERYLOW(GPIOF_PIN9) | PIN_OSPEED_VERYLOW(GPIOF_PIN10) | PIN_OSPEED_VERYLOW(GPIOF_PIN11) | PIN_OSPEED_VERYLOW(GPIOF_PIN12) | PIN_OSPEED_VERYLOW(GPIOF_PIN13) | PIN_OSPEED_VERYLOW(GPIOF_PIN14) | PIN_OSPEED_VERYLOW(GPIOF_PIN15)) -#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) | PIN_PUPDR_FLOATING(GPIOF_OSC_OUT) | PIN_PUPDR_PULLUP(GPIOF_PIN2) | PIN_PUPDR_PULLUP(GPIOF_PIN3) | PIN_PUPDR_PULLUP(GPIOF_PIN4) | PIN_PUPDR_PULLUP(GPIOF_PIN5) | PIN_PUPDR_PULLUP(GPIOF_PIN6) | PIN_PUPDR_PULLUP(GPIOF_PIN7) | PIN_PUPDR_PULLUP(GPIOF_PIN8) | PIN_PUPDR_PULLUP(GPIOF_PIN9) | PIN_PUPDR_PULLUP(GPIOF_PIN10) | PIN_PUPDR_PULLUP(GPIOF_PIN11) | PIN_PUPDR_PULLUP(GPIOF_PIN12) | PIN_PUPDR_PULLUP(GPIOF_PIN13) | PIN_PUPDR_PULLUP(GPIOF_PIN14) | PIN_PUPDR_PULLUP(GPIOF_PIN15)) -#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_OSC_IN) | PIN_ODR_HIGH(GPIOF_OSC_OUT) | PIN_ODR_HIGH(GPIOF_PIN2) | PIN_ODR_HIGH(GPIOF_PIN3) | PIN_ODR_HIGH(GPIOF_PIN4) | PIN_ODR_HIGH(GPIOF_PIN5) | PIN_ODR_HIGH(GPIOF_PIN6) | PIN_ODR_HIGH(GPIOF_PIN7) | PIN_ODR_HIGH(GPIOF_PIN8) | PIN_ODR_HIGH(GPIOF_PIN9) | PIN_ODR_HIGH(GPIOF_PIN10) | PIN_ODR_HIGH(GPIOF_PIN11) | PIN_ODR_HIGH(GPIOF_PIN12) | PIN_ODR_HIGH(GPIOF_PIN13) | PIN_ODR_HIGH(GPIOF_PIN14) | PIN_ODR_HIGH(GPIOF_PIN15)) -#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0U) | PIN_AFIO_AF(GPIOF_OSC_OUT, 0U) | PIN_AFIO_AF(GPIOF_PIN2, 0U) | PIN_AFIO_AF(GPIOF_PIN3, 0U) | PIN_AFIO_AF(GPIOF_PIN4, 0U) | PIN_AFIO_AF(GPIOF_PIN5, 0U) | PIN_AFIO_AF(GPIOF_PIN6, 0U) | PIN_AFIO_AF(GPIOF_PIN7, 0U)) -#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | PIN_AFIO_AF(GPIOF_PIN9, 0U) | PIN_AFIO_AF(GPIOF_PIN10, 0U) | PIN_AFIO_AF(GPIOF_PIN11, 0U) | PIN_AFIO_AF(GPIOF_PIN12, 0U) | PIN_AFIO_AF(GPIOF_PIN13, 0U) | PIN_AFIO_AF(GPIOF_PIN14, 0U) | PIN_AFIO_AF(GPIOF_PIN15, 0U)) - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if !defined(_FROM_ASM_) -# ifdef __cplusplus -extern "C" { -# endif -void boardInit(void); -# ifdef __cplusplus -} -# endif -#endif /* _FROM_ASM_ */ - -#endif /* BOARD_H */ diff --git a/drivers/boards/GENERIC_STM32_F072XB/board.mk b/drivers/boards/GENERIC_STM32_F072XB/board.mk deleted file mode 100644 index bd6f87826..000000000 --- a/drivers/boards/GENERIC_STM32_F072XB/board.mk +++ /dev/null @@ -1,9 +0,0 @@ -# List of all the board related files. -BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F072XB/board.c - -# Required include directories -BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F072XB - -# Shared variables -ALLCSRC += $(BOARDSRC) -ALLINC += $(BOARDINC) diff --git a/drivers/boards/GENERIC_STM32_F072XB/bootloader_defs.h b/drivers/boards/GENERIC_STM32_F072XB/bootloader_defs.h deleted file mode 100644 index 02c48c4e6..000000000 --- a/drivers/boards/GENERIC_STM32_F072XB/bootloader_defs.h +++ /dev/null @@ -1,7 +0,0 @@ -/* Address for jumping to bootloader on STM32 chips. */ -/* It is chip dependent, the correct number can be looked up here (page 175): - * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf - * This also requires a patch to chibios: - * /tmk_core/tool/chibios/ch-bootloader-jump.patch - */ -#define STM32_BOOTLOADER_ADDRESS 0x1FFFC800 diff --git a/drivers/boards/GENERIC_STM32_F072XB/cfg/board.chcfg b/drivers/boards/GENERIC_STM32_F072XB/cfg/board.chcfg deleted file mode 100644 index e6ceecb62..000000000 --- a/drivers/boards/GENERIC_STM32_F072XB/cfg/board.chcfg +++ /dev/null @@ -1,703 +0,0 @@ - - - - - resources/gencfg/processors/boards/stm32f0xx/templates - .. - 5.0.x - - ST STM32F072B-Discovery - ST_STM32F072B_DISCOVERY - - STM32F072xB - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp b/drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp deleted file mode 100644 index 55cd396e4..000000000 --- a/drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp +++ /dev/null @@ -1,15 +0,0 @@ -sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f0xx/templates -outputRoot: .. -dataRoot: . - -freemarkerLinks: { - lib: ../../../../../tools/ftl/libs -} - -data : { - doc1:xml ( - board.chcfg - { - } - ) -} diff --git a/drivers/boards/GENERIC_STM32_F303XC/board.c b/drivers/boards/GENERIC_STM32_F303XC/board.c deleted file mode 100644 index 9b0fc1b6b..000000000 --- a/drivers/boards/GENERIC_STM32_F303XC/board.c +++ /dev/null @@ -1,242 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * This file has been automatically generated using ChibiStudio board - * generator plugin. Do not edit manually. - */ - -#include "hal.h" -#include "stm32_gpio.h" - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/** - * @brief Type of STM32 GPIO port setup. - */ -typedef struct { - uint32_t moder; - uint32_t otyper; - uint32_t ospeedr; - uint32_t pupdr; - uint32_t odr; - uint32_t afrl; - uint32_t afrh; -} gpio_setup_t; - -/** - * @brief Type of STM32 GPIO initialization data. - */ -typedef struct { -#if STM32_HAS_GPIOA || defined(__DOXYGEN__) - gpio_setup_t PAData; -#endif -#if STM32_HAS_GPIOB || defined(__DOXYGEN__) - gpio_setup_t PBData; -#endif -#if STM32_HAS_GPIOC || defined(__DOXYGEN__) - gpio_setup_t PCData; -#endif -#if STM32_HAS_GPIOD || defined(__DOXYGEN__) - gpio_setup_t PDData; -#endif -#if STM32_HAS_GPIOE || defined(__DOXYGEN__) - gpio_setup_t PEData; -#endif -#if STM32_HAS_GPIOF || defined(__DOXYGEN__) - gpio_setup_t PFData; -#endif -#if STM32_HAS_GPIOG || defined(__DOXYGEN__) - gpio_setup_t PGData; -#endif -#if STM32_HAS_GPIOH || defined(__DOXYGEN__) - gpio_setup_t PHData; -#endif -#if STM32_HAS_GPIOI || defined(__DOXYGEN__) - gpio_setup_t PIData; -#endif -#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) - gpio_setup_t PJData; -#endif -#if STM32_HAS_GPIOK || defined(__DOXYGEN__) - gpio_setup_t PKData; -#endif -} gpio_config_t; - -/** - * @brief STM32 GPIO static initialization data. - */ -static const gpio_config_t gpio_default_config = { -#if STM32_HAS_GPIOA - {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, -#endif -#if STM32_HAS_GPIOB - {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, -#endif -#if STM32_HAS_GPIOC - {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, -#endif -#if STM32_HAS_GPIOD - {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, -#endif -#if STM32_HAS_GPIOE - {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, -#endif -#if STM32_HAS_GPIOF - {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, -#endif -#if STM32_HAS_GPIOG - {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, -#endif -#if STM32_HAS_GPIOH - {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, -#endif -#if STM32_HAS_GPIOI - {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, -#endif -#if STM32_HAS_GPIOJ - {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, -#endif -#if STM32_HAS_GPIOK - {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} -#endif -}; - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { - gpiop->OTYPER = config->otyper; - gpiop->OSPEEDR = config->ospeedr; - gpiop->PUPDR = config->pupdr; - gpiop->ODR = config->odr; - gpiop->AFRL = config->afrl; - gpiop->AFRH = config->afrh; - gpiop->MODER = config->moder; -} - -static void stm32_gpio_init(void) { - /* Enabling GPIO-related clocks, the mask comes from the - registry header file.*/ - rccResetAHB(STM32_GPIO_EN_MASK); - rccEnableAHB(STM32_GPIO_EN_MASK, true); - - /* Initializing all the defined GPIO ports.*/ -#if STM32_HAS_GPIOA - gpio_init(GPIOA, &gpio_default_config.PAData); -#endif -#if STM32_HAS_GPIOB - gpio_init(GPIOB, &gpio_default_config.PBData); -#endif -#if STM32_HAS_GPIOC - gpio_init(GPIOC, &gpio_default_config.PCData); -#endif -#if STM32_HAS_GPIOD - gpio_init(GPIOD, &gpio_default_config.PDData); -#endif -#if STM32_HAS_GPIOE - gpio_init(GPIOE, &gpio_default_config.PEData); -#endif -#if STM32_HAS_GPIOF - gpio_init(GPIOF, &gpio_default_config.PFData); -#endif -#if STM32_HAS_GPIOG - gpio_init(GPIOG, &gpio_default_config.PGData); -#endif -#if STM32_HAS_GPIOH - gpio_init(GPIOH, &gpio_default_config.PHData); -#endif -#if STM32_HAS_GPIOI - gpio_init(GPIOI, &gpio_default_config.PIData); -#endif -#if STM32_HAS_GPIOJ - gpio_init(GPIOJ, &gpio_default_config.PJData); -#endif -#if STM32_HAS_GPIOK - gpio_init(GPIOK, &gpio_default_config.PKData); -#endif -} - -void enter_bootloader_mode_if_requested(void); - -/** - * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. - */ -void __early_init(void) { - enter_bootloader_mode_if_requested(); - - stm32_gpio_init(); - stm32_clock_init(); -} - -#if HAL_USE_SDC || defined(__DOXYGEN__) -/** - * @brief SDC card detection. - */ -bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { - (void)sdcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief SDC card write protection detection. - */ -bool sdc_lld_is_write_protected(SDCDriver *sdcp) { - (void)sdcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif /* HAL_USE_SDC */ - -#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) -/** - * @brief MMC_SPI card detection. - */ -bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { - (void)mmcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief MMC_SPI card write protection detection. - */ -bool mmc_lld_is_write_protected(MMCDriver *mmcp) { - (void)mmcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif - -/** - * @brief Board-specific initialization code. - * @todo Add your board-specific code, if any. - */ -void boardInit(void) {} diff --git a/drivers/boards/GENERIC_STM32_F303XC/board.h b/drivers/boards/GENERIC_STM32_F303XC/board.h deleted file mode 100644 index 3579c8277..000000000 --- a/drivers/boards/GENERIC_STM32_F303XC/board.h +++ /dev/null @@ -1,475 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef _BOARD_H_ -#define _BOARD_H_ - -/* - * Setup for Generic STM32_F303 Board - */ - -/* - * Board identifier. - */ -#define BOARD_GENERIC_STM32_F303XC -#define BOARD_NAME "STM32_F303" - -/* - * Board oscillators-related settings. - * NOTE: LSE not fitted. - */ -#if !defined(STM32_LSECLK) -# define STM32_LSECLK 0U -#endif - -#define STM32_LSEDRV (3U << 3U) - -#if !defined(STM32_HSECLK) -# define STM32_HSECLK 8000000U -#endif - -// #define STM32_HSE_BYPASS - -/* - * MCU type as defined in the ST header. - */ -#define STM32F303xC - -/* - * IO pins assignments. - */ -#define GPIOA_PIN0 0U -#define GPIOA_PIN1 1U -#define GPIOA_PIN2 2U -#define GPIOA_PIN3 3U -#define GPIOA_PIN4 4U -#define GPIOA_PIN5 5U -#define GPIOA_PIN6 6U -#define GPIOA_PIN7 7U -#define GPIOA_PIN8 8U -#define GPIOA_PIN9 9U -#define GPIOA_PIN10 10U -#define GPIOA_USB_DM 11U -#define GPIOA_USB_DP 12U -#define GPIOA_SWDIO 13U -#define GPIOA_SWCLK 14U -#define GPIOA_PIN15 15U - -#define GPIOB_PIN0 0U -#define GPIOB_PIN1 1U -#define GPIOB_PIN2 2U -#define GPIOB_PIN3 3U -#define GPIOB_PIN4 4U -#define GPIOB_PIN5 5U -#define GPIOB_PIN6 6U -#define GPIOB_PIN7 7U -#define GPIOB_PIN8 8U -#define GPIOB_PIN9 9U -#define GPIOB_PIN10 10U -#define GPIOB_PIN11 11U -#define GPIOB_PIN12 12U -#define GPIOB_PIN13 13U -#define GPIOB_PIN14 14U -#define GPIOB_PIN15 15U - -#define GPIOC_PIN0 0U -#define GPIOC_PIN1 1U -#define GPIOC_PIN2 2U -#define GPIOC_PIN3 3U -#define GPIOC_PIN4 4U -#define GPIOC_PIN5 5U -#define GPIOC_PIN6 6U -#define GPIOC_PIN7 7U -#define GPIOC_PIN8 8U -#define GPIOC_PIN9 9U -#define GPIOC_PIN10 10U -#define GPIOC_PIN11 11U -#define GPIOC_PIN12 12U -#define GPIOC_PIN13 13U -#define GPIOC_PIN14 14U -#define GPIOC_PIN15 15U - -#define GPIOD_PIN0 0U -#define GPIOD_PIN1 1U -#define GPIOD_PIN2 2U -#define GPIOD_PIN3 3U -#define GPIOD_PIN4 4U -#define GPIOD_PIN5 5U -#define GPIOD_PIN6 6U -#define GPIOD_PIN7 7U -#define GPIOD_PIN8 8U -#define GPIOD_PIN9 9U -#define GPIOD_PIN10 10U -#define GPIOD_PIN11 11U -#define GPIOD_PIN12 12U -#define GPIOD_PIN13 13U -#define GPIOD_PIN14 14U -#define GPIOD_PIN15 15U - -#define GPIOE_PIN0 0U -#define GPIOE_PIN1 1U -#define GPIOE_PIN2 2U -#define GPIOE_PIN3 3U -#define GPIOE_PIN4 4U -#define GPIOE_PIN5 5U -#define GPIOE_PIN6 6U -#define GPIOE_PIN7 7U -#define GPIOE_PIN8 8U -#define GPIOE_PIN9 9U -#define GPIOE_PIN10 10U -#define GPIOE_PIN11 11U -#define GPIOE_PIN12 12U -#define GPIOE_PIN13 13U -#define GPIOE_PIN14 14U -#define GPIOE_PIN15 15U - -#define GPIOF_I2C2_SDA 0U -#define GPIOF_I2C2_SCL 1U -#define GPIOF_PIN2 2U -#define GPIOF_PIN3 3U -#define GPIOF_PIN4 4U -#define GPIOF_PIN5 5U -#define GPIOF_PIN6 6U -#define GPIOF_PIN7 7U -#define GPIOF_PIN8 8U -#define GPIOF_PIN9 9U -#define GPIOF_PIN10 10U -#define GPIOF_PIN11 11U -#define GPIOF_PIN12 12U -#define GPIOF_PIN13 13U -#define GPIOF_PIN14 14U -#define GPIOF_PIN15 15U - -#define GPIOG_PIN0 0U -#define GPIOG_PIN1 1U -#define GPIOG_PIN2 2U -#define GPIOG_PIN3 3U -#define GPIOG_PIN4 4U -#define GPIOG_PIN5 5U -#define GPIOG_PIN6 6U -#define GPIOG_PIN7 7U -#define GPIOG_PIN8 8U -#define GPIOG_PIN9 9U -#define GPIOG_PIN10 10U -#define GPIOG_PIN11 11U -#define GPIOG_PIN12 12U -#define GPIOG_PIN13 13U -#define GPIOG_PIN14 14U -#define GPIOG_PIN15 15U - -#define GPIOH_PIN0 0U -#define GPIOH_PIN1 1U -#define GPIOH_PIN2 2U -#define GPIOH_PIN3 3U -#define GPIOH_PIN4 4U -#define GPIOH_PIN5 5U -#define GPIOH_PIN6 6U -#define GPIOH_PIN7 7U -#define GPIOH_PIN8 8U -#define GPIOH_PIN9 9U -#define GPIOH_PIN10 10U -#define GPIOH_PIN11 11U -#define GPIOH_PIN12 12U -#define GPIOH_PIN13 13U -#define GPIOH_PIN14 14U -#define GPIOH_PIN15 15U - -/* - * IO lines assignments. - */ -#define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U) -#define LINE_USB_DM PAL_LINE(GPIOA, 11U) -#define LINE_USB_DP PAL_LINE(GPIOA, 12U) -#define LINE_SWDIO PAL_LINE(GPIOA, 13U) -#define LINE_SWCLK PAL_LINE(GPIOA, 14U) - -#define LINE_PIN6 PAL_LINE(GPIOF, 0U) -#define LINE_PIN7 PAL_LINE(GPIOF, 1U) - -#define LINE_CAPS_LOCK PAL_LINE(GPIOB, 7U) - -/* - * I/O ports initial setup, this configuration is established soon after reset - * in the initialization code. - * Please refer to the STM32 Reference Manual for details. - */ -#define PIN_MODE_INPUT(n) (0U << ((n)*2U)) -#define PIN_MODE_OUTPUT(n) (1U << ((n)*2U)) -#define PIN_MODE_ALTERNATE(n) (2U << ((n)*2U)) -#define PIN_MODE_ANALOG(n) (3U << ((n)*2U)) -#define PIN_ODR_LOW(n) (0U << (n)) -#define PIN_ODR_HIGH(n) (1U << (n)) -#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) -#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) -#define PIN_OSPEED_VERYLOW(n) (0U << ((n)*2U)) -#define PIN_OSPEED_LOW(n) (1U << ((n)*2U)) -#define PIN_OSPEED_MEDIUM(n) (2U << ((n)*2U)) -#define PIN_OSPEED_HIGH(n) (3U << ((n)*2U)) -#define PIN_PUPDR_FLOATING(n) (0U << ((n)*2U)) -#define PIN_PUPDR_PULLUP(n) (1U << ((n)*2U)) -#define PIN_PUPDR_PULLDOWN(n) (2U << ((n)*2U)) -#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) - -/* - * GPIOA setup: - * - * PA0 - NC - * PA1 - NC - * PA2 - COL1 - * PA3 - COL2 - * PA4 - SPEAKER1 - * PA5 - SPEAKER2 - * PA6 - COL3 - * PA7 - COL8 - * PA8 - COL6 - * PA9 - COL7 - * PA10 - ROW5 - * PA11 - USB_DM (alternate 14). - * PA12 - USB_DP (alternate 14). - * PA13 - SWDIO (alternate 0). - * PA14 - SWCLK (alternate 0). - * PA15 - ROW4 - */ -#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | PIN_MODE_ALTERNATE(GPIOA_PIN1) | PIN_MODE_INPUT(GPIOA_PIN2) | PIN_MODE_INPUT(GPIOA_PIN3) | PIN_MODE_INPUT(GPIOA_PIN4) | PIN_MODE_INPUT(GPIOA_PIN5) | PIN_MODE_INPUT(GPIOA_PIN6) | PIN_MODE_INPUT(GPIOA_PIN7) | PIN_MODE_INPUT(GPIOA_PIN8) | PIN_MODE_INPUT(GPIOA_PIN9) | PIN_MODE_INPUT(GPIOA_PIN10) | PIN_MODE_ALTERNATE(GPIOA_USB_DM) | PIN_MODE_ALTERNATE(GPIOA_USB_DP) | PIN_MODE_ALTERNATE(GPIOA_SWDIO) | PIN_MODE_ALTERNATE(GPIOA_SWCLK) | PIN_MODE_INPUT(GPIOA_PIN15)) -#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) -#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | PIN_OSPEED_HIGH(GPIOA_PIN1) | PIN_OSPEED_VERYLOW(GPIOA_PIN2) | PIN_OSPEED_VERYLOW(GPIOA_PIN3) | PIN_OSPEED_VERYLOW(GPIOA_PIN4) | PIN_OSPEED_VERYLOW(GPIOA_PIN5) | PIN_OSPEED_VERYLOW(GPIOA_PIN6) | PIN_OSPEED_VERYLOW(GPIOA_PIN7) | PIN_OSPEED_VERYLOW(GPIOA_PIN8) | PIN_OSPEED_VERYLOW(GPIOA_PIN9) | PIN_OSPEED_VERYLOW(GPIOA_PIN10) | PIN_OSPEED_HIGH(GPIOA_USB_DM) | PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | PIN_OSPEED_HIGH(GPIOA_SWDIO) | PIN_OSPEED_HIGH(GPIOA_SWCLK) | PIN_OSPEED_VERYLOW(GPIOA_PIN15)) -#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_PIN0) | PIN_PUPDR_FLOATING(GPIOA_PIN1) | PIN_PUPDR_PULLUP(GPIOA_PIN2) | PIN_PUPDR_PULLUP(GPIOA_PIN3) | PIN_PUPDR_PULLUP(GPIOA_PIN4) | PIN_PUPDR_PULLUP(GPIOA_PIN5) | PIN_PUPDR_PULLUP(GPIOA_PIN6) | PIN_PUPDR_FLOATING(GPIOA_PIN7) | PIN_PUPDR_PULLUP(GPIOA_PIN8) | PIN_PUPDR_PULLUP(GPIOA_PIN9) | PIN_PUPDR_PULLUP(GPIOA_PIN10) | PIN_PUPDR_FLOATING(GPIOA_USB_DM) | PIN_PUPDR_FLOATING(GPIOA_USB_DP) | PIN_PUPDR_PULLUP(GPIOA_SWDIO) | PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | PIN_PUPDR_PULLUP(GPIOA_PIN15)) -#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | PIN_ODR_HIGH(GPIOA_PIN1) | PIN_ODR_HIGH(GPIOA_PIN2) | PIN_ODR_HIGH(GPIOA_PIN3) | PIN_ODR_HIGH(GPIOA_PIN4) | PIN_ODR_HIGH(GPIOA_PIN5) | PIN_ODR_HIGH(GPIOA_PIN6) | PIN_ODR_HIGH(GPIOA_PIN7) | PIN_ODR_HIGH(GPIOA_PIN8) | PIN_ODR_HIGH(GPIOA_PIN9) | PIN_ODR_HIGH(GPIOA_PIN10) | PIN_ODR_HIGH(GPIOA_USB_DM) | PIN_ODR_HIGH(GPIOA_USB_DP) | PIN_ODR_HIGH(GPIOA_SWDIO) | PIN_ODR_HIGH(GPIOA_SWCLK) | PIN_ODR_HIGH(GPIOA_PIN15)) -#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | PIN_AFIO_AF(GPIOA_PIN1, 1) | PIN_AFIO_AF(GPIOA_PIN2, 0) | PIN_AFIO_AF(GPIOA_PIN3, 0) | PIN_AFIO_AF(GPIOA_PIN4, 0) | PIN_AFIO_AF(GPIOA_PIN5, 5) | PIN_AFIO_AF(GPIOA_PIN6, 5) | PIN_AFIO_AF(GPIOA_PIN7, 5)) -#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | PIN_AFIO_AF(GPIOA_PIN9, 0) | PIN_AFIO_AF(GPIOA_PIN10, 0) | PIN_AFIO_AF(GPIOA_USB_DM, 14) | PIN_AFIO_AF(GPIOA_USB_DP, 14) | PIN_AFIO_AF(GPIOA_SWDIO, 0) | PIN_AFIO_AF(GPIOA_SWCLK, 0) | PIN_AFIO_AF(GPIOA_PIN15, 0)) - -/* - * GPIOB setup: - * - * PB0 - PIN0 (input pullup). - * PB1 - PIN1 (input pullup). - * PB2 - PIN2 (input pullup). - * PB3 - PIN3 (alternate 0). - * PB4 - PIN4 (input pullup). - * PB5 - PIN5 (input pullup). - * PB6 - PIN6 LSM303DLHC_SCL (alternate 4). - * PB7 - PIN7 LSM303DLHC_SDA (alternate 4). - * PB8 - PIN8 (input pullup). - * PB9 - PIN9 (input pullup). - * PB10 - PIN10 (input pullup). - * PB11 - PIN11 (input pullup). - * PB12 - PIN12 (input pullup). - * PB13 - PIN13 (input pullup). - * PB14 - PIN14 (input pullup). - * PB15 - PIN15 (input pullup). - */ -#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | PIN_MODE_INPUT(GPIOB_PIN1) | PIN_MODE_INPUT(GPIOB_PIN2) | PIN_MODE_ALTERNATE(GPIOB_PIN3) | PIN_MODE_INPUT(GPIOB_PIN4) | PIN_MODE_INPUT(GPIOB_PIN5) | PIN_MODE_ALTERNATE(GPIOB_PIN6) | PIN_MODE_OUTPUT(GPIOB_PIN7) | PIN_MODE_INPUT(GPIOB_PIN8) | PIN_MODE_INPUT(GPIOB_PIN9) | PIN_MODE_INPUT(GPIOB_PIN10) | PIN_MODE_INPUT(GPIOB_PIN11) | PIN_MODE_INPUT(GPIOB_PIN12) | PIN_MODE_INPUT(GPIOB_PIN13) | PIN_MODE_INPUT(GPIOB_PIN14) | PIN_MODE_INPUT(GPIOB_PIN15)) -#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | PIN_OTYPE_OPENDRAIN(GPIOB_PIN6) | PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) -#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | PIN_OSPEED_VERYLOW(GPIOB_PIN1) | PIN_OSPEED_VERYLOW(GPIOB_PIN2) | PIN_OSPEED_HIGH(GPIOB_PIN3) | PIN_OSPEED_VERYLOW(GPIOB_PIN4) | PIN_OSPEED_VERYLOW(GPIOB_PIN5) | PIN_OSPEED_HIGH(GPIOB_PIN6) | PIN_OSPEED_VERYLOW(GPIOB_PIN7) | PIN_OSPEED_VERYLOW(GPIOB_PIN8) | PIN_OSPEED_VERYLOW(GPIOB_PIN9) | PIN_OSPEED_VERYLOW(GPIOB_PIN10) | PIN_OSPEED_VERYLOW(GPIOB_PIN11) | PIN_OSPEED_VERYLOW(GPIOB_PIN12) | PIN_OSPEED_VERYLOW(GPIOB_PIN13) | PIN_OSPEED_VERYLOW(GPIOB_PIN14) | PIN_OSPEED_VERYLOW(GPIOB_PIN15)) -#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | PIN_PUPDR_PULLUP(GPIOB_PIN1) | PIN_PUPDR_PULLUP(GPIOB_PIN2) | PIN_PUPDR_FLOATING(GPIOB_PIN3) | PIN_PUPDR_PULLUP(GPIOB_PIN4) | PIN_PUPDR_PULLUP(GPIOB_PIN5) | PIN_PUPDR_FLOATING(GPIOB_PIN6) | PIN_PUPDR_PULLDOWN(GPIOB_PIN7) | PIN_PUPDR_PULLUP(GPIOB_PIN8) | PIN_PUPDR_PULLUP(GPIOB_PIN9) | PIN_PUPDR_PULLUP(GPIOB_PIN10) | PIN_PUPDR_PULLUP(GPIOB_PIN11) | PIN_PUPDR_PULLUP(GPIOB_PIN12) | PIN_PUPDR_PULLUP(GPIOB_PIN13) | PIN_PUPDR_PULLUP(GPIOB_PIN14) | PIN_PUPDR_PULLUP(GPIOB_PIN15)) -#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | PIN_ODR_HIGH(GPIOB_PIN1) | PIN_ODR_HIGH(GPIOB_PIN2) | PIN_ODR_HIGH(GPIOB_PIN3) | PIN_ODR_HIGH(GPIOB_PIN4) | PIN_ODR_HIGH(GPIOB_PIN5) | PIN_ODR_HIGH(GPIOB_PIN6) | PIN_ODR_LOW(GPIOB_PIN7) | PIN_ODR_HIGH(GPIOB_PIN8) | PIN_ODR_HIGH(GPIOB_PIN9) | PIN_ODR_HIGH(GPIOB_PIN10) | PIN_ODR_HIGH(GPIOB_PIN11) | PIN_ODR_HIGH(GPIOB_PIN12) | PIN_ODR_HIGH(GPIOB_PIN13) | PIN_ODR_HIGH(GPIOB_PIN14) | PIN_ODR_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | PIN_AFIO_AF(GPIOB_PIN1, 0) | PIN_AFIO_AF(GPIOB_PIN2, 0) | PIN_AFIO_AF(GPIOB_PIN3, 0) | PIN_AFIO_AF(GPIOB_PIN4, 0) | PIN_AFIO_AF(GPIOB_PIN5, 0) | PIN_AFIO_AF(GPIOB_PIN6, 4) | PIN_AFIO_AF(GPIOB_PIN7, 0)) -#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | PIN_AFIO_AF(GPIOB_PIN9, 0) | PIN_AFIO_AF(GPIOB_PIN10, 0) | PIN_AFIO_AF(GPIOB_PIN11, 0) | PIN_AFIO_AF(GPIOB_PIN12, 0) | PIN_AFIO_AF(GPIOB_PIN13, 0) | PIN_AFIO_AF(GPIOB_PIN14, 0) | PIN_AFIO_AF(GPIOB_PIN15, 0)) - -/* - * GPIOC setup: - * - * PC0 - PIN0 (input pullup). - * PC1 - PIN1 (input pullup). - * PC2 - PIN2 (input pullup). - * PC3 - PIN3 (input pullup). - * PC4 - PIN4 (input pullup). - * PC5 - PIN5 (input pullup). - * PC6 - PIN6 (input pullup). - * PC7 - PIN7 (input pullup). - * PC8 - PIN8 (input pullup). - * PC9 - PIN9 (input pullup). - * PC10 - PIN10 (input pullup). - * PC11 - PIN11 (input pullup). - * PC12 - PIN12 (input pullup). - * PC13 - PIN13 (input pullup). - * PC14 - PIN14 (input floating). - * PC15 - PIN15 (input floating). - */ -#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | PIN_MODE_INPUT(GPIOC_PIN1) | PIN_MODE_INPUT(GPIOC_PIN2) | PIN_MODE_INPUT(GPIOC_PIN3) | PIN_MODE_INPUT(GPIOC_PIN4) | PIN_MODE_INPUT(GPIOC_PIN5) | PIN_MODE_INPUT(GPIOC_PIN6) | PIN_MODE_INPUT(GPIOC_PIN7) | PIN_MODE_INPUT(GPIOC_PIN8) | PIN_MODE_INPUT(GPIOC_PIN9) | PIN_MODE_INPUT(GPIOC_PIN10) | PIN_MODE_INPUT(GPIOC_PIN11) | PIN_MODE_INPUT(GPIOC_PIN12) | PIN_MODE_INPUT(GPIOC_PIN13) | PIN_MODE_INPUT(GPIOC_PIN14) | PIN_MODE_INPUT(GPIOC_PIN15)) -#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) -#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOC_PIN0) | PIN_OSPEED_VERYLOW(GPIOC_PIN1) | PIN_OSPEED_VERYLOW(GPIOC_PIN2) | PIN_OSPEED_VERYLOW(GPIOC_PIN3) | PIN_OSPEED_VERYLOW(GPIOC_PIN4) | PIN_OSPEED_VERYLOW(GPIOC_PIN5) | PIN_OSPEED_VERYLOW(GPIOC_PIN6) | PIN_OSPEED_VERYLOW(GPIOC_PIN7) | PIN_OSPEED_VERYLOW(GPIOC_PIN8) | PIN_OSPEED_VERYLOW(GPIOC_PIN9) | PIN_OSPEED_VERYLOW(GPIOC_PIN10) | PIN_OSPEED_VERYLOW(GPIOC_PIN11) | PIN_OSPEED_VERYLOW(GPIOC_PIN12) | PIN_OSPEED_VERYLOW(GPIOC_PIN13) | PIN_OSPEED_HIGH(GPIOC_PIN14) | PIN_OSPEED_HIGH(GPIOC_PIN15)) -#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | PIN_PUPDR_PULLUP(GPIOC_PIN1) | PIN_PUPDR_PULLUP(GPIOC_PIN2) | PIN_PUPDR_PULLUP(GPIOC_PIN3) | PIN_PUPDR_PULLUP(GPIOC_PIN4) | PIN_PUPDR_PULLUP(GPIOC_PIN5) | PIN_PUPDR_PULLUP(GPIOC_PIN6) | PIN_PUPDR_PULLUP(GPIOC_PIN7) | PIN_PUPDR_PULLUP(GPIOC_PIN8) | PIN_PUPDR_PULLUP(GPIOC_PIN9) | PIN_PUPDR_PULLUP(GPIOC_PIN10) | PIN_PUPDR_PULLUP(GPIOC_PIN11) | PIN_PUPDR_PULLUP(GPIOC_PIN12) | PIN_PUPDR_PULLUP(GPIOC_PIN13) | PIN_PUPDR_FLOATING(GPIOC_PIN14) | PIN_PUPDR_FLOATING(GPIOC_PIN15)) -#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | PIN_ODR_HIGH(GPIOC_PIN1) | PIN_ODR_HIGH(GPIOC_PIN2) | PIN_ODR_HIGH(GPIOC_PIN3) | PIN_ODR_HIGH(GPIOC_PIN4) | PIN_ODR_HIGH(GPIOC_PIN5) | PIN_ODR_HIGH(GPIOC_PIN6) | PIN_ODR_HIGH(GPIOC_PIN7) | PIN_ODR_HIGH(GPIOC_PIN8) | PIN_ODR_HIGH(GPIOC_PIN9) | PIN_ODR_HIGH(GPIOC_PIN10) | PIN_ODR_HIGH(GPIOC_PIN11) | PIN_ODR_HIGH(GPIOC_PIN12) | PIN_ODR_HIGH(GPIOC_PIN13) | PIN_ODR_HIGH(GPIOC_PIN14) | PIN_ODR_HIGH(GPIOC_PIN15)) -#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | PIN_AFIO_AF(GPIOC_PIN1, 0) | PIN_AFIO_AF(GPIOC_PIN2, 0) | PIN_AFIO_AF(GPIOC_PIN3, 0) | PIN_AFIO_AF(GPIOC_PIN4, 0) | PIN_AFIO_AF(GPIOC_PIN5, 0) | PIN_AFIO_AF(GPIOC_PIN6, 0) | PIN_AFIO_AF(GPIOC_PIN7, 0)) -#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | PIN_AFIO_AF(GPIOC_PIN9, 0) | PIN_AFIO_AF(GPIOC_PIN10, 0) | PIN_AFIO_AF(GPIOC_PIN11, 0) | PIN_AFIO_AF(GPIOC_PIN12, 0) | PIN_AFIO_AF(GPIOC_PIN13, 0) | PIN_AFIO_AF(GPIOC_PIN14, 0) | PIN_AFIO_AF(GPIOC_PIN15, 0)) - -/* - * GPIOD setup: - * - * PD0 - PIN0 (input pullup). - * PD1 - PIN1 (input pullup). - * PD2 - PIN2 (input pullup). - * PD3 - PIN3 (input pullup). - * PD4 - PIN4 (input pullup). - * PD5 - PIN5 (input pullup). - * PD6 - PIN6 (input pullup). - * PD7 - PIN7 (input pullup). - * PD8 - PIN8 (input pullup). - * PD9 - PIN9 (input pullup). - * PD11 - PIN10 (input pullup). - * PD11 - PIN11 (input pullup). - * PD12 - PIN12 (input pullup). - * PD13 - PIN13 (input pullup). - * PD14 - PIN14 (input pullup). - * PD15 - PIN15 (input pullup). - */ -#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | PIN_MODE_INPUT(GPIOD_PIN1) | PIN_MODE_INPUT(GPIOD_PIN2) | PIN_MODE_INPUT(GPIOD_PIN3) | PIN_MODE_INPUT(GPIOD_PIN4) | PIN_MODE_INPUT(GPIOD_PIN5) | PIN_MODE_INPUT(GPIOD_PIN6) | PIN_MODE_INPUT(GPIOD_PIN7) | PIN_MODE_INPUT(GPIOD_PIN8) | PIN_MODE_INPUT(GPIOD_PIN9) | PIN_MODE_INPUT(GPIOD_PIN10) | PIN_MODE_INPUT(GPIOD_PIN11) | PIN_MODE_INPUT(GPIOD_PIN12) | PIN_MODE_INPUT(GPIOD_PIN13) | PIN_MODE_INPUT(GPIOD_PIN14) | PIN_MODE_INPUT(GPIOD_PIN15)) -#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) -#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | PIN_OSPEED_VERYLOW(GPIOD_PIN1) | PIN_OSPEED_VERYLOW(GPIOD_PIN2) | PIN_OSPEED_VERYLOW(GPIOD_PIN3) | PIN_OSPEED_VERYLOW(GPIOD_PIN4) | PIN_OSPEED_VERYLOW(GPIOD_PIN5) | PIN_OSPEED_VERYLOW(GPIOD_PIN6) | PIN_OSPEED_VERYLOW(GPIOD_PIN7) | PIN_OSPEED_VERYLOW(GPIOD_PIN8) | PIN_OSPEED_VERYLOW(GPIOD_PIN9) | PIN_OSPEED_VERYLOW(GPIOD_PIN10) | PIN_OSPEED_VERYLOW(GPIOD_PIN11) | PIN_OSPEED_VERYLOW(GPIOD_PIN12) | PIN_OSPEED_VERYLOW(GPIOD_PIN13) | PIN_OSPEED_VERYLOW(GPIOD_PIN14) | PIN_OSPEED_VERYLOW(GPIOD_PIN15)) -#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | PIN_PUPDR_PULLUP(GPIOD_PIN1) | PIN_PUPDR_PULLUP(GPIOD_PIN2) | PIN_PUPDR_PULLUP(GPIOD_PIN3) | PIN_PUPDR_PULLUP(GPIOD_PIN4) | PIN_PUPDR_PULLUP(GPIOD_PIN5) | PIN_PUPDR_PULLUP(GPIOD_PIN6) | PIN_PUPDR_PULLUP(GPIOD_PIN7) | PIN_PUPDR_PULLUP(GPIOD_PIN8) | PIN_PUPDR_PULLUP(GPIOD_PIN9) | PIN_PUPDR_PULLUP(GPIOD_PIN10) | PIN_PUPDR_PULLUP(GPIOD_PIN11) | PIN_PUPDR_PULLUP(GPIOD_PIN12) | PIN_PUPDR_PULLUP(GPIOD_PIN13) | PIN_PUPDR_PULLUP(GPIOD_PIN14) | PIN_PUPDR_PULLUP(GPIOD_PIN15)) -#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | PIN_ODR_HIGH(GPIOD_PIN1) | PIN_ODR_HIGH(GPIOD_PIN2) | PIN_ODR_HIGH(GPIOD_PIN3) | PIN_ODR_HIGH(GPIOD_PIN4) | PIN_ODR_HIGH(GPIOD_PIN5) | PIN_ODR_HIGH(GPIOD_PIN6) | PIN_ODR_HIGH(GPIOD_PIN7) | PIN_ODR_HIGH(GPIOD_PIN8) | PIN_ODR_HIGH(GPIOD_PIN9) | PIN_ODR_HIGH(GPIOD_PIN10) | PIN_ODR_HIGH(GPIOD_PIN11) | PIN_ODR_HIGH(GPIOD_PIN12) | PIN_ODR_HIGH(GPIOD_PIN13) | PIN_ODR_HIGH(GPIOD_PIN14) | PIN_ODR_HIGH(GPIOD_PIN15)) -#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | PIN_AFIO_AF(GPIOD_PIN1, 0) | PIN_AFIO_AF(GPIOD_PIN2, 0) | PIN_AFIO_AF(GPIOD_PIN3, 0) | PIN_AFIO_AF(GPIOD_PIN4, 0) | PIN_AFIO_AF(GPIOD_PIN5, 0) | PIN_AFIO_AF(GPIOD_PIN6, 0) | PIN_AFIO_AF(GPIOD_PIN7, 0)) -#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | PIN_AFIO_AF(GPIOD_PIN9, 0) | PIN_AFIO_AF(GPIOD_PIN10, 0) | PIN_AFIO_AF(GPIOD_PIN11, 0) | PIN_AFIO_AF(GPIOD_PIN12, 0) | PIN_AFIO_AF(GPIOD_PIN13, 0) | PIN_AFIO_AF(GPIOD_PIN14, 0) | PIN_AFIO_AF(GPIOD_PIN15, 0)) - -/* - * GPIOE setup: - * - * PE0 - PIN0 (input pullup). - * PE1 - PIN1 (input pullup). - * PE2 - PIN2 (input pullup). - * PE3 - PIN3 L3GD20_CS (output pushpull maximum). - * PE4 - PIN4 (input pullup). - * PE5 - PIN5 (input pullup). - * PE6 - PIN6 (input pullup). - * PE7 - PIN7 (input pullup). - * PE8 - PIN8 (output pushpull maximum). - * PE9 - PIN9 (output pushpull maximum). - * PE10 - PIN10 (output pushpull maximum). - * PE11 - PIN11 (output pushpull maximum). - * PE12 - PIN12 (output pushpull maximum). - * PE13 - PIN13 (output pushpull maximum). - * PE14 - PIN14 (output pushpull maximum). - * PE15 - PIN15 (output pushpull maximum). - */ -#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | PIN_MODE_INPUT(GPIOE_PIN1) | PIN_MODE_INPUT(GPIOE_PIN2) | PIN_MODE_OUTPUT(GPIOE_PIN3) | PIN_MODE_INPUT(GPIOE_PIN4) | PIN_MODE_INPUT(GPIOE_PIN5) | PIN_MODE_INPUT(GPIOE_PIN6) | PIN_MODE_INPUT(GPIOE_PIN7) | PIN_MODE_OUTPUT(GPIOE_PIN8) | PIN_MODE_OUTPUT(GPIOE_PIN9) | PIN_MODE_OUTPUT(GPIOE_PIN10) | PIN_MODE_OUTPUT(GPIOE_PIN11) | PIN_MODE_OUTPUT(GPIOE_PIN12) | PIN_MODE_OUTPUT(GPIOE_PIN13) | PIN_MODE_OUTPUT(GPIOE_PIN14) | PIN_MODE_OUTPUT(GPIOE_PIN15)) -#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) -#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) | PIN_OSPEED_VERYLOW(GPIOE_PIN1) | PIN_OSPEED_VERYLOW(GPIOE_PIN2) | PIN_OSPEED_HIGH(GPIOE_PIN3) | PIN_OSPEED_VERYLOW(GPIOE_PIN4) | PIN_OSPEED_VERYLOW(GPIOE_PIN5) | PIN_OSPEED_VERYLOW(GPIOE_PIN6) | PIN_OSPEED_VERYLOW(GPIOE_PIN7) | PIN_OSPEED_HIGH(GPIOE_PIN8) | PIN_OSPEED_HIGH(GPIOE_PIN9) | PIN_OSPEED_HIGH(GPIOE_PIN10) | PIN_OSPEED_HIGH(GPIOE_PIN11) | PIN_OSPEED_HIGH(GPIOE_PIN12) | PIN_OSPEED_HIGH(GPIOE_PIN13) | PIN_OSPEED_HIGH(GPIOE_PIN14) | PIN_OSPEED_HIGH(GPIOE_PIN15)) -#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | PIN_PUPDR_PULLUP(GPIOE_PIN1) | PIN_PUPDR_PULLUP(GPIOE_PIN2) | PIN_PUPDR_FLOATING(GPIOE_PIN3) | PIN_PUPDR_PULLUP(GPIOE_PIN4) | PIN_PUPDR_PULLUP(GPIOE_PIN5) | PIN_PUPDR_PULLUP(GPIOE_PIN6) | PIN_PUPDR_PULLUP(GPIOE_PIN7) | PIN_PUPDR_PULLUP(GPIOE_PIN8) | PIN_PUPDR_PULLUP(GPIOE_PIN9) | PIN_PUPDR_PULLUP(GPIOE_PIN10) | PIN_PUPDR_FLOATING(GPIOE_PIN11) | PIN_PUPDR_PULLUP(GPIOE_PIN12) | PIN_PUPDR_FLOATING(GPIOE_PIN13) | PIN_PUPDR_FLOATING(GPIOE_PIN14) | PIN_PUPDR_FLOATING(GPIOE_PIN15)) -#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | PIN_ODR_HIGH(GPIOE_PIN1) | PIN_ODR_HIGH(GPIOE_PIN2) | PIN_ODR_HIGH(GPIOE_PIN3) | PIN_ODR_HIGH(GPIOE_PIN4) | PIN_ODR_HIGH(GPIOE_PIN5) | PIN_ODR_HIGH(GPIOE_PIN6) | PIN_ODR_HIGH(GPIOE_PIN7) | PIN_ODR_LOW(GPIOE_PIN8) | PIN_ODR_LOW(GPIOE_PIN9) | PIN_ODR_LOW(GPIOE_PIN10) | PIN_ODR_LOW(GPIOE_PIN11) | PIN_ODR_LOW(GPIOE_PIN12) | PIN_ODR_LOW(GPIOE_PIN13) | PIN_ODR_LOW(GPIOE_PIN14) | PIN_ODR_LOW(GPIOE_PIN15)) -#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0) | PIN_AFIO_AF(GPIOE_PIN1, 0) | PIN_AFIO_AF(GPIOE_PIN2, 0) | PIN_AFIO_AF(GPIOE_PIN3, 0) | PIN_AFIO_AF(GPIOE_PIN4, 0) | PIN_AFIO_AF(GPIOE_PIN5, 0) | PIN_AFIO_AF(GPIOE_PIN6, 0) | PIN_AFIO_AF(GPIOE_PIN7, 0)) -#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | PIN_AFIO_AF(GPIOE_PIN9, 0) | PIN_AFIO_AF(GPIOE_PIN10, 0) | PIN_AFIO_AF(GPIOE_PIN11, 0) | PIN_AFIO_AF(GPIOE_PIN12, 0) | PIN_AFIO_AF(GPIOE_PIN13, 0) | PIN_AFIO_AF(GPIOE_PIN14, 0) | PIN_AFIO_AF(GPIOE_PIN15, 0)) - -/* - * GPIOF setup: - * - * PF0 - I2C2_SDA (input floating). - * PF1 - I2C2_SCL (input floating). - * PF2 - PIN2 (input pullup). - * PF3 - PIN3 (input pullup). - * PF4 - PIN4 (input pullup). - * PF5 - PIN5 (input pullup). - * PF6 - PIN6 (input pullup). - * PF7 - PIN7 (input pullup). - * PF8 - PIN8 (input pullup). - * PF9 - PIN9 (input pullup). - * PF10 - PIN10 (input pullup). - * PF11 - PIN11 (input pullup). - * PF12 - PIN12 (input pullup). - * PF13 - PIN13 (input pullup). - * PF14 - PIN14 (input pullup). - * PF15 - PIN15 (input pullup). - */ -#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_I2C2_SDA) | PIN_MODE_INPUT(GPIOF_I2C2_SCL) | PIN_MODE_INPUT(GPIOF_PIN2) | PIN_MODE_INPUT(GPIOF_PIN3) | PIN_MODE_INPUT(GPIOF_PIN4) | PIN_MODE_INPUT(GPIOF_PIN5) | PIN_MODE_INPUT(GPIOF_PIN6) | PIN_MODE_INPUT(GPIOF_PIN7) | PIN_MODE_INPUT(GPIOF_PIN8) | PIN_MODE_INPUT(GPIOF_PIN9) | PIN_MODE_INPUT(GPIOF_PIN10) | PIN_MODE_INPUT(GPIOF_PIN11) | PIN_MODE_INPUT(GPIOF_PIN12) | PIN_MODE_INPUT(GPIOF_PIN13) | PIN_MODE_INPUT(GPIOF_PIN14) | PIN_MODE_INPUT(GPIOF_PIN15)) -#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SDA) | PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SCL) | PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) -#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_I2C2_SDA) | PIN_OSPEED_HIGH(GPIOF_I2C2_SCL) | PIN_OSPEED_VERYLOW(GPIOF_PIN2) | PIN_OSPEED_VERYLOW(GPIOF_PIN3) | PIN_OSPEED_VERYLOW(GPIOF_PIN4) | PIN_OSPEED_VERYLOW(GPIOF_PIN5) | PIN_OSPEED_VERYLOW(GPIOF_PIN6) | PIN_OSPEED_VERYLOW(GPIOF_PIN7) | PIN_OSPEED_VERYLOW(GPIOF_PIN8) | PIN_OSPEED_VERYLOW(GPIOF_PIN9) | PIN_OSPEED_VERYLOW(GPIOF_PIN10) | PIN_OSPEED_VERYLOW(GPIOF_PIN11) | PIN_OSPEED_VERYLOW(GPIOF_PIN12) | PIN_OSPEED_VERYLOW(GPIOF_PIN13) | PIN_OSPEED_VERYLOW(GPIOF_PIN14) | PIN_OSPEED_VERYLOW(GPIOF_PIN15)) -#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_I2C2_SDA) | PIN_PUPDR_FLOATING(GPIOF_I2C2_SCL) | PIN_PUPDR_PULLUP(GPIOF_PIN2) | PIN_PUPDR_PULLUP(GPIOF_PIN3) | PIN_PUPDR_PULLUP(GPIOF_PIN4) | PIN_PUPDR_PULLUP(GPIOF_PIN5) | PIN_PUPDR_PULLUP(GPIOF_PIN6) | PIN_PUPDR_PULLUP(GPIOF_PIN7) | PIN_PUPDR_PULLUP(GPIOF_PIN8) | PIN_PUPDR_PULLUP(GPIOF_PIN9) | PIN_PUPDR_PULLUP(GPIOF_PIN10) | PIN_PUPDR_PULLUP(GPIOF_PIN11) | PIN_PUPDR_PULLUP(GPIOF_PIN12) | PIN_PUPDR_PULLUP(GPIOF_PIN13) | PIN_PUPDR_PULLUP(GPIOF_PIN14) | PIN_PUPDR_PULLUP(GPIOF_PIN15)) -#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_I2C2_SDA) | PIN_ODR_HIGH(GPIOF_I2C2_SCL) | PIN_ODR_HIGH(GPIOF_PIN2) | PIN_ODR_HIGH(GPIOF_PIN3) | PIN_ODR_HIGH(GPIOF_PIN4) | PIN_ODR_HIGH(GPIOF_PIN5) | PIN_ODR_HIGH(GPIOF_PIN6) | PIN_ODR_HIGH(GPIOF_PIN7) | PIN_ODR_HIGH(GPIOF_PIN8) | PIN_ODR_HIGH(GPIOF_PIN9) | PIN_ODR_HIGH(GPIOF_PIN10) | PIN_ODR_HIGH(GPIOF_PIN11) | PIN_ODR_HIGH(GPIOF_PIN12) | PIN_ODR_HIGH(GPIOF_PIN13) | PIN_ODR_HIGH(GPIOF_PIN14) | PIN_ODR_HIGH(GPIOF_PIN15)) -#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_I2C2_SDA, 0) | PIN_AFIO_AF(GPIOF_I2C2_SCL, 0) | PIN_AFIO_AF(GPIOF_PIN2, 0) | PIN_AFIO_AF(GPIOF_PIN3, 0) | PIN_AFIO_AF(GPIOF_PIN4, 0) | PIN_AFIO_AF(GPIOF_PIN5, 0) | PIN_AFIO_AF(GPIOF_PIN6, 0) | PIN_AFIO_AF(GPIOF_PIN7, 0)) -#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | PIN_AFIO_AF(GPIOF_PIN9, 0) | PIN_AFIO_AF(GPIOF_PIN10, 0) | PIN_AFIO_AF(GPIOF_PIN11, 0) | PIN_AFIO_AF(GPIOF_PIN12, 0) | PIN_AFIO_AF(GPIOF_PIN13, 0) | PIN_AFIO_AF(GPIOF_PIN14, 0) | PIN_AFIO_AF(GPIOF_PIN15, 0)) - -/* - * GPIOG setup: - * - * PG0 - PIN0 (input pullup). - * PG1 - PIN1 (input pullup). - * PG2 - PIN2 (input pullup). - * PG3 - PIN3 (input pullup). - * PG4 - PIN4 (input pullup). - * PG5 - PIN5 (input pullup). - * PG6 - PIN6 (input pullup). - * PG7 - PIN7 (input pullup). - * PG8 - PIN8 (input pullup). - * PG9 - PIN9 (input pullup). - * PG10 - PIN10 (input pullup). - * PG11 - PIN11 (input pullup). - * PG12 - PIN12 (input pullup). - * PG13 - PIN13 (input pullup). - * PG14 - PIN14 (input pullup). - * PG15 - PIN15 (input pullup). - */ -#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | PIN_MODE_INPUT(GPIOG_PIN1) | PIN_MODE_INPUT(GPIOG_PIN2) | PIN_MODE_INPUT(GPIOG_PIN3) | PIN_MODE_INPUT(GPIOG_PIN4) | PIN_MODE_INPUT(GPIOG_PIN5) | PIN_MODE_INPUT(GPIOG_PIN6) | PIN_MODE_INPUT(GPIOG_PIN7) | PIN_MODE_INPUT(GPIOG_PIN8) | PIN_MODE_INPUT(GPIOG_PIN9) | PIN_MODE_INPUT(GPIOG_PIN10) | PIN_MODE_INPUT(GPIOG_PIN11) | PIN_MODE_INPUT(GPIOG_PIN12) | PIN_MODE_INPUT(GPIOG_PIN13) | PIN_MODE_INPUT(GPIOG_PIN14) | PIN_MODE_INPUT(GPIOG_PIN15)) -#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) -#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_PIN0) | PIN_OSPEED_VERYLOW(GPIOG_PIN1) | PIN_OSPEED_VERYLOW(GPIOG_PIN2) | PIN_OSPEED_VERYLOW(GPIOG_PIN3) | PIN_OSPEED_VERYLOW(GPIOG_PIN4) | PIN_OSPEED_VERYLOW(GPIOG_PIN5) | PIN_OSPEED_VERYLOW(GPIOG_PIN6) | PIN_OSPEED_VERYLOW(GPIOG_PIN7) | PIN_OSPEED_VERYLOW(GPIOG_PIN8) | PIN_OSPEED_VERYLOW(GPIOG_PIN9) | PIN_OSPEED_VERYLOW(GPIOG_PIN10) | PIN_OSPEED_VERYLOW(GPIOG_PIN11) | PIN_OSPEED_VERYLOW(GPIOG_PIN12) | PIN_OSPEED_VERYLOW(GPIOG_PIN13) | PIN_OSPEED_VERYLOW(GPIOG_PIN14) | PIN_OSPEED_VERYLOW(GPIOG_PIN15)) -#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | PIN_PUPDR_PULLUP(GPIOG_PIN1) | PIN_PUPDR_PULLUP(GPIOG_PIN2) | PIN_PUPDR_PULLUP(GPIOG_PIN3) | PIN_PUPDR_PULLUP(GPIOG_PIN4) | PIN_PUPDR_PULLUP(GPIOG_PIN5) | PIN_PUPDR_PULLUP(GPIOG_PIN6) | PIN_PUPDR_PULLUP(GPIOG_PIN7) | PIN_PUPDR_PULLUP(GPIOG_PIN8) | PIN_PUPDR_PULLUP(GPIOG_PIN9) | PIN_PUPDR_PULLUP(GPIOG_PIN10) | PIN_PUPDR_PULLUP(GPIOG_PIN11) | PIN_PUPDR_PULLUP(GPIOG_PIN12) | PIN_PUPDR_PULLUP(GPIOG_PIN13) | PIN_PUPDR_PULLUP(GPIOG_PIN14) | PIN_PUPDR_PULLUP(GPIOG_PIN15)) -#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | PIN_ODR_HIGH(GPIOG_PIN1) | PIN_ODR_HIGH(GPIOG_PIN2) | PIN_ODR_HIGH(GPIOG_PIN3) | PIN_ODR_HIGH(GPIOG_PIN4) | PIN_ODR_HIGH(GPIOG_PIN5) | PIN_ODR_HIGH(GPIOG_PIN6) | PIN_ODR_HIGH(GPIOG_PIN7) | PIN_ODR_HIGH(GPIOG_PIN8) | PIN_ODR_HIGH(GPIOG_PIN9) | PIN_ODR_HIGH(GPIOG_PIN10) | PIN_ODR_HIGH(GPIOG_PIN11) | PIN_ODR_HIGH(GPIOG_PIN12) | PIN_ODR_HIGH(GPIOG_PIN13) | PIN_ODR_HIGH(GPIOG_PIN14) | PIN_ODR_HIGH(GPIOG_PIN15)) -#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | PIN_AFIO_AF(GPIOG_PIN1, 0) | PIN_AFIO_AF(GPIOG_PIN2, 0) | PIN_AFIO_AF(GPIOG_PIN3, 0) | PIN_AFIO_AF(GPIOG_PIN4, 0) | PIN_AFIO_AF(GPIOG_PIN5, 0) | PIN_AFIO_AF(GPIOG_PIN6, 0) | PIN_AFIO_AF(GPIOG_PIN7, 0)) -#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | PIN_AFIO_AF(GPIOG_PIN9, 0) | PIN_AFIO_AF(GPIOG_PIN10, 0) | PIN_AFIO_AF(GPIOG_PIN11, 0) | PIN_AFIO_AF(GPIOG_PIN12, 0) | PIN_AFIO_AF(GPIOG_PIN13, 0) | PIN_AFIO_AF(GPIOG_PIN14, 0) | PIN_AFIO_AF(GPIOG_PIN15, 0)) - -/* - * GPIOH setup: - * - * PH0 - PIN0 (input pullup). - * PH1 - PIN1 (input pullup). - * PH2 - PIN2 (input pullup). - * PH3 - PIN3 (input pullup). - * PH4 - PIN4 (input pullup). - * PH5 - PIN5 (input pullup). - * PH6 - PIN6 (input pullup). - * PH7 - PIN7 (input pullup). - * PH8 - PIN8 (input pullup). - * PH9 - PIN9 (input pullup). - * PH10 - PIN10 (input pullup). - * PH11 - PIN11 (input pullup). - * PH12 - PIN12 (input pullup). - * PH13 - PIN13 (input pullup). - * PH14 - PIN14 (input pullup). - * PH15 - PIN15 (input pullup). - */ -#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_PIN0) | PIN_MODE_INPUT(GPIOH_PIN1) | PIN_MODE_INPUT(GPIOH_PIN2) | PIN_MODE_INPUT(GPIOH_PIN3) | PIN_MODE_INPUT(GPIOH_PIN4) | PIN_MODE_INPUT(GPIOH_PIN5) | PIN_MODE_INPUT(GPIOH_PIN6) | PIN_MODE_INPUT(GPIOH_PIN7) | PIN_MODE_INPUT(GPIOH_PIN8) | PIN_MODE_INPUT(GPIOH_PIN9) | PIN_MODE_INPUT(GPIOH_PIN10) | PIN_MODE_INPUT(GPIOH_PIN11) | PIN_MODE_INPUT(GPIOH_PIN12) | PIN_MODE_INPUT(GPIOH_PIN13) | PIN_MODE_INPUT(GPIOH_PIN14) | PIN_MODE_INPUT(GPIOH_PIN15)) -#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_PIN0) | PIN_OTYPE_PUSHPULL(GPIOH_PIN1) | PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) -#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOH_PIN0) | PIN_OSPEED_VERYLOW(GPIOH_PIN1) | PIN_OSPEED_VERYLOW(GPIOH_PIN2) | PIN_OSPEED_VERYLOW(GPIOH_PIN3) | PIN_OSPEED_VERYLOW(GPIOH_PIN4) | PIN_OSPEED_VERYLOW(GPIOH_PIN5) | PIN_OSPEED_VERYLOW(GPIOH_PIN6) | PIN_OSPEED_VERYLOW(GPIOH_PIN7) | PIN_OSPEED_VERYLOW(GPIOH_PIN8) | PIN_OSPEED_VERYLOW(GPIOH_PIN9) | PIN_OSPEED_VERYLOW(GPIOH_PIN10) | PIN_OSPEED_VERYLOW(GPIOH_PIN11) | PIN_OSPEED_VERYLOW(GPIOH_PIN12) | PIN_OSPEED_VERYLOW(GPIOH_PIN13) | PIN_OSPEED_VERYLOW(GPIOH_PIN14) | PIN_OSPEED_VERYLOW(GPIOH_PIN15)) -#define VAL_GPIOH_PUPDR (PIN_PUPDR_PULLUP(GPIOH_PIN0) | PIN_PUPDR_PULLUP(GPIOH_PIN1) | PIN_PUPDR_PULLUP(GPIOH_PIN2) | PIN_PUPDR_PULLUP(GPIOH_PIN3) | PIN_PUPDR_PULLUP(GPIOH_PIN4) | PIN_PUPDR_PULLUP(GPIOH_PIN5) | PIN_PUPDR_PULLUP(GPIOH_PIN6) | PIN_PUPDR_PULLUP(GPIOH_PIN7) | PIN_PUPDR_PULLUP(GPIOH_PIN8) | PIN_PUPDR_PULLUP(GPIOH_PIN9) | PIN_PUPDR_PULLUP(GPIOH_PIN10) | PIN_PUPDR_PULLUP(GPIOH_PIN11) | PIN_PUPDR_PULLUP(GPIOH_PIN12) | PIN_PUPDR_PULLUP(GPIOH_PIN13) | PIN_PUPDR_PULLUP(GPIOH_PIN14) | PIN_PUPDR_PULLUP(GPIOH_PIN15)) -#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_PIN0) | PIN_ODR_HIGH(GPIOH_PIN1) | PIN_ODR_HIGH(GPIOH_PIN2) | PIN_ODR_HIGH(GPIOH_PIN3) | PIN_ODR_HIGH(GPIOH_PIN4) | PIN_ODR_HIGH(GPIOH_PIN5) | PIN_ODR_HIGH(GPIOH_PIN6) | PIN_ODR_HIGH(GPIOH_PIN7) | PIN_ODR_HIGH(GPIOH_PIN8) | PIN_ODR_HIGH(GPIOH_PIN9) | PIN_ODR_HIGH(GPIOH_PIN10) | PIN_ODR_HIGH(GPIOH_PIN11) | PIN_ODR_HIGH(GPIOH_PIN12) | PIN_ODR_HIGH(GPIOH_PIN13) | PIN_ODR_HIGH(GPIOH_PIN14) | PIN_ODR_HIGH(GPIOH_PIN15)) -#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_PIN0, 0) | PIN_AFIO_AF(GPIOH_PIN1, 0) | PIN_AFIO_AF(GPIOH_PIN2, 0) | PIN_AFIO_AF(GPIOH_PIN3, 0) | PIN_AFIO_AF(GPIOH_PIN4, 0) | PIN_AFIO_AF(GPIOH_PIN5, 0) | PIN_AFIO_AF(GPIOH_PIN6, 0) | PIN_AFIO_AF(GPIOH_PIN7, 0)) -#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | PIN_AFIO_AF(GPIOH_PIN9, 0) | PIN_AFIO_AF(GPIOH_PIN10, 0) | PIN_AFIO_AF(GPIOH_PIN11, 0) | PIN_AFIO_AF(GPIOH_PIN12, 0) | PIN_AFIO_AF(GPIOH_PIN13, 0) | PIN_AFIO_AF(GPIOH_PIN14, 0) | PIN_AFIO_AF(GPIOH_PIN15, 0)) - -/* - * USB bus activation macro, required by the USB driver. - */ -// #define usb_lld_connect_bus(usbp) -#define usb_lld_connect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_ALTERNATE(14))) -// #define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT) -/* - * USB bus de-activation macro, required by the USB driver. - */ -// #define usb_lld_disconnect_bus(usbp) -#define usb_lld_disconnect_bus(usbp) \ - (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_OUTPUT_PUSHPULL)); \ - palClearPad(GPIOA, GPIOA_USB_DP) -// #define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12) - -#if !defined(_FROM_ASM_) -# ifdef __cplusplus -extern "C" { -# endif -void boardInit(void); -# ifdef __cplusplus -} -# endif -#endif /* _FROM_ASM_ */ - -#endif /* _BOARD_H_ */ diff --git a/drivers/boards/GENERIC_STM32_F303XC/board.mk b/drivers/boards/GENERIC_STM32_F303XC/board.mk deleted file mode 100644 index 43377629a..000000000 --- a/drivers/boards/GENERIC_STM32_F303XC/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files. -BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC/board.c - -# Required include directories -BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC diff --git a/drivers/boards/GENERIC_STM32_F303XC/bootloader_defs.h b/drivers/boards/GENERIC_STM32_F303XC/bootloader_defs.h deleted file mode 100644 index 3b0e9d20a..000000000 --- a/drivers/boards/GENERIC_STM32_F303XC/bootloader_defs.h +++ /dev/null @@ -1,7 +0,0 @@ -/* Address for jumping to bootloader on STM32 chips. */ -/* It is chip dependent, the correct number can be looked up here: - * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf - * This also requires a patch to chibios: - * /tmk_core/tool/chibios/ch-bootloader-jump.patch - */ -#define STM32_BOOTLOADER_ADDRESS 0x1FFFD800 diff --git a/drivers/boards/IC_TEENSY_3_1/board.c b/drivers/boards/IC_TEENSY_3_1/board.c deleted file mode 100644 index 63e3f6492..000000000 --- a/drivers/boards/IC_TEENSY_3_1/board.c +++ /dev/null @@ -1,146 +0,0 @@ -/* - ChibiOS - Copyright (C) 2015 RedoX https://github.com/RedoXyde - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ -#include "hal.h" - -#if HAL_USE_PAL || defined(__DOXYGEN__) -/** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. - */ -const PALConfig pal_default_config = { - .ports = - { - { - /* - * PORTA setup. - * - * PTA4 - PIN33 - * PTA5 - PIN24 - * PTA12 - PIN3 - * PTA13 - PIN4 - * - * PTA18/19 crystal - * PTA0/3 SWD - */ - .port = IOPORT1, - .pads = - { - PAL_MODE_ALTERNATIVE_7, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_ALTERNATIVE_7, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_INPUT_ANALOG, PAL_MODE_INPUT_ANALOG, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, - }, - }, - { - /* - * PORTB setup. - * - * PTB0 - PIN16 - * PTB1 - PIN17 - * PTB2 - PIN19 - * PTB3 - PIN18 - * PTB16 - PIN0 - UART0_TX - * PTB17 - PIN1 - UART0_RX - * PTB18 - PIN32 - * PTB19 - PIN25 - */ - .port = IOPORT2, - .pads = - { - PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_ALTERNATIVE_3, PAL_MODE_ALTERNATIVE_3, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, - }, - }, - { - /* - * PORTC setup. - * - * PTC0 - PIN15 - * PTC1 - PIN22 - * PTC2 - PIN23 - * PTC3 - PIN9 - * PTC4 - PIN10 - * PTC5 - PIN13 - * PTC6 - PIN11 - * PTC7 - PIN12 - * PTC8 - PIN28 - * PTC9 - PIN27 - * PTC10 - PIN29 - * PTC11 - PIN30 - */ - .port = IOPORT3, - .pads = - { - PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, - }, - }, - { - /* - * PORTD setup. - * - * PTD0 - PIN2 - * PTD1 - PIN14 - * PTD2 - PIN7 - * PTD3 - PIN8 - * PTD4 - PIN6 - * PTD5 - PIN20 - * PTD6 - PIN21 - * PTD7 - PIN5 - */ - .port = IOPORT4, - .pads = - { - PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, - }, - }, - { - /* - * PORTE setup. - * - * PTE0 - PIN31 - * PTE1 - PIN26 - */ - .port = IOPORT5, - .pads = - { - PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, - }, - }, - }, -}; -#endif - -// NOTE: This value comes from kiibohd/controller and is the location of a value -// which needs to be checked before disabling the watchdog (which happens in -// k20x_clock_init) -#define WDOG_TMROUTL *(volatile uint16_t *)0x40052012 - -/** - * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. - */ -void __early_init(void) { - // This is a dirty hack and should only be used as a temporary fix until this - // is upstreamed. - while (WDOG_TMROUTL < 2) - ; // Must wait for WDOG timer if already running, before jumping - - k20x_clock_init(); -} - -/** - * @brief Board-specific initialization code. - * @todo Add your board-specific code, if any. - */ -void boardInit(void) {} diff --git a/drivers/boards/IC_TEENSY_3_1/board.h b/drivers/boards/IC_TEENSY_3_1/board.h deleted file mode 100644 index c8259ab0c..000000000 --- a/drivers/boards/IC_TEENSY_3_1/board.h +++ /dev/null @@ -1,295 +0,0 @@ -/* - ChibiOS - Copyright (C) 2015 RedoX https://github.com/RedoXyde - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef _BOARD_H_ -#define _BOARD_H_ - -/* - * Setup for the PJRC Teensy 3.1 board. - */ - -/* - * Board identifier. - */ -#define BOARD_PJRC_TEENSY_3_1 -#define BOARD_NAME "PJRC Teensy 3.1" - -/* External 16 MHz crystal */ -#define KINETIS_XTAL_FREQUENCY 16000000UL - -/* Use internal capacitors for the crystal */ -#define KINETIS_BOARD_OSCILLATOR_SETTING OSC_CR_SC8P | OSC_CR_SC2P - -/* - * MCU type - */ -#define K20x7 - -/* - * IO pins assignments. - */ -#define PORTA_PIN0 0 -#define PORTA_PIN1 1 -#define PORTA_PIN2 2 -#define PORTA_PIN3 3 -#define TEENSY_PIN33 4 -#define TEENSY_PIN24 5 -#define PORTA_PIN6 6 -#define PORTA_PIN7 7 -#define PORTA_PIN8 8 -#define PORTA_PIN9 9 -#define PORTA_PIN10 10 -#define PORTA_PIN11 11 -#define TEENSY_PIN3 12 -#define TEENSY_PIN4 13 -#define PORTA_PIN14 14 -#define PORTA_PIN15 15 -#define PORTA_PIN16 16 -#define PORTA_PIN17 17 -#define PORTA_PIN18 18 -#define PORTA_PIN19 19 -#define PORTA_PIN20 20 -#define PORTA_PIN21 21 -#define PORTA_PIN22 22 -#define PORTA_PIN23 23 -#define PORTA_PIN24 24 -#define PORTA_PIN25 25 -#define PORTA_PIN26 26 -#define PORTA_PIN27 27 -#define PORTA_PIN28 28 -#define PORTA_PIN29 29 -#define PORTA_PIN30 30 -#define PORTA_PIN31 31 - -#define TEENSY_PIN3_IOPORT IOPORT1 -#define TEENSY_PIN4_IOPORT IOPORT1 -#define TEENSY_PIN24_IOPORT IOPORT1 -#define TEENSY_PIN33_IOPORT IOPORT1 - -#define TEENSY_PIN16 0 -#define TEENSY_PIN17 1 -#define TEENSY_PIN19 2 -#define TEENSY_PIN18 3 -#define PORTB_PIN4 4 -#define PORTB_PIN5 5 -#define PORTB_PIN6 6 -#define PORTB_PIN7 7 -#define PORTB_PIN8 8 -#define PORTB_PIN9 9 -#define PORTB_PIN10 10 -#define PORTB_PIN11 11 -#define PORTB_PIN12 12 -#define PORTB_PIN13 13 -#define PORTB_PIN14 14 -#define PORTB_PIN15 15 -#define TEENSY_PIN0 16 -#define TEENSY_PIN1 17 -#define TEENSY_PIN32 18 -#define TEENSY_PIN25 19 -#define PORTB_PIN20 20 -#define PORTB_PIN21 21 -#define PORTB_PIN22 22 -#define PORTB_PIN23 23 -#define PORTB_PIN24 24 -#define PORTB_PIN25 25 -#define PORTB_PIN26 26 -#define PORTB_PIN27 27 -#define PORTB_PIN28 28 -#define PORTB_PIN29 29 -#define PORTB_PIN30 30 -#define PORTB_PIN31 31 - -#define TEENSY_PIN0_IOPORT IOPORT2 -#define TEENSY_PIN1_IOPORT IOPORT2 -#define TEENSY_PIN16_IOPORT IOPORT2 -#define TEENSY_PIN17_IOPORT IOPORT2 -#define TEENSY_PIN18_IOPORT IOPORT2 -#define TEENSY_PIN19_IOPORT IOPORT2 -#define TEENSY_PIN25_IOPORT IOPORT2 -#define TEENSY_PIN32_IOPORT IOPORT2 - -#define TEENSY_PIN15 0 -#define TEENSY_PIN22 1 -#define TEENSY_PIN23 2 -#define TEENSY_PIN9 3 -#define TEENSY_PIN10 4 -#define TEENSY_PIN13 5 -#define TEENSY_PIN11 6 -#define TEENSY_PIN12 7 -#define TEENSY_PIN28 8 -#define TEENSY_PIN27 9 -#define TEENSY_PIN29 10 -#define TEENSY_PIN30 11 -#define PORTC_PIN12 12 -#define PORTC_PIN13 13 -#define PORTC_PIN14 14 -#define PORTC_PIN15 15 -#define PORTC_PIN16 16 -#define PORTC_PIN17 17 -#define PORTC_PIN18 18 -#define PORTC_PIN19 19 -#define PORTC_PIN20 20 -#define PORTC_PIN21 21 -#define PORTC_PIN22 22 -#define PORTC_PIN23 23 -#define PORTC_PIN24 24 -#define PORTC_PIN25 25 -#define PORTC_PIN26 26 -#define PORTC_PIN27 27 -#define PORTC_PIN28 28 -#define PORTC_PIN29 29 -#define PORTC_PIN30 30 -#define PORTC_PIN31 31 - -#define TEENSY_PIN9_IOPORT IOPORT3 -#define TEENSY_PIN10_IOPORT IOPORT3 -#define TEENSY_PIN11_IOPORT IOPORT3 -#define TEENSY_PIN12_IOPORT IOPORT3 -#define TEENSY_PIN13_IOPORT IOPORT3 -#define TEENSY_PIN15_IOPORT IOPORT3 -#define TEENSY_PIN22_IOPORT IOPORT3 -#define TEENSY_PIN23_IOPORT IOPORT3 -#define TEENSY_PIN27_IOPORT IOPORT3 -#define TEENSY_PIN28_IOPORT IOPORT3 -#define TEENSY_PIN29_IOPORT IOPORT3 -#define TEENSY_PIN30_IOPORT IOPORT3 - -#define TEENSY_PIN2 0 -#define TEENSY_PIN14 1 -#define TEENSY_PIN7 2 -#define TEENSY_PIN8 3 -#define TEENSY_PIN6 4 -#define TEENSY_PIN20 5 -#define TEENSY_PIN21 6 -#define TEENSY_PIN5 7 -#define PORTD_PIN8 8 -#define PORTD_PIN9 9 -#define PORTD_PIN10 10 -#define PORTD_PIN11 11 -#define PORTD_PIN12 12 -#define PORTD_PIN13 13 -#define PORTD_PIN14 14 -#define PORTD_PIN15 15 -#define PORTD_PIN16 16 -#define PORTD_PIN17 17 -#define PORTD_PIN18 18 -#define PORTD_PIN19 19 -#define PORTD_PIN20 20 -#define PORTD_PIN21 21 -#define PORTD_PIN22 22 -#define PORTD_PIN23 23 -#define PORTD_PIN24 24 -#define PORTD_PIN25 25 -#define PORTD_PIN26 26 -#define PORTD_PIN27 27 -#define PORTD_PIN28 28 -#define PORTD_PIN29 29 -#define PORTD_PIN30 30 -#define PORTD_PIN31 31 - -#define TEENSY_PIN2_IOPORT IOPORT4 -#define TEENSY_PIN5_IOPORT IOPORT4 -#define TEENSY_PIN6_IOPORT IOPORT4 -#define TEENSY_PIN7_IOPORT IOPORT4 -#define TEENSY_PIN8_IOPORT IOPORT4 -#define TEENSY_PIN14_IOPORT IOPORT4 -#define TEENSY_PIN20_IOPORT IOPORT4 -#define TEENSY_PIN21_IOPORT IOPORT4 - -#define TEENSY_PIN31 0 -#define TEENSY_PIN26 1 -#define PORTE_PIN2 2 -#define PORTE_PIN3 3 -#define PORTE_PIN4 4 -#define PORTE_PIN5 5 -#define PORTE_PIN6 6 -#define PORTE_PIN7 7 -#define PORTE_PIN8 8 -#define PORTE_PIN9 9 -#define PORTE_PIN10 10 -#define PORTE_PIN11 11 -#define PORTE_PIN12 12 -#define PORTE_PIN13 13 -#define PORTE_PIN14 14 -#define PORTE_PIN15 15 -#define PORTE_PIN16 16 -#define PORTE_PIN17 17 -#define PORTE_PIN18 18 -#define PORTE_PIN19 19 -#define PORTE_PIN20 20 -#define PORTE_PIN21 21 -#define PORTE_PIN22 22 -#define PORTE_PIN23 23 -#define PORTE_PIN24 24 -#define PORTE_PIN25 25 -#define PORTE_PIN26 26 -#define PORTE_PIN27 27 -#define PORTE_PIN28 28 -#define PORTE_PIN29 29 -#define PORTE_PIN30 30 -#define PORTE_PIN31 31 - -#define TEENSY_PIN26_IOPORT IOPORT5 -#define TEENSY_PIN31_IOPORT IOPORT5 - -#define LINE_PIN1 PAL_LINE(TEENSY_PIN1_IOPORT, TEENSY_PIN1) -#define LINE_PIN2 PAL_LINE(TEENSY_PIN2_IOPORT, TEENSY_PIN2) -#define LINE_PIN3 PAL_LINE(TEENSY_PIN3_IOPORT, TEENSY_PIN3) -#define LINE_PIN4 PAL_LINE(TEENSY_PIN4_IOPORT, TEENSY_PIN4) -#define LINE_PIN5 PAL_LINE(TEENSY_PIN5_IOPORT, TEENSY_PIN5) -#define LINE_PIN6 PAL_LINE(TEENSY_PIN6_IOPORT, TEENSY_PIN6) -#define LINE_PIN7 PAL_LINE(TEENSY_PIN7_IOPORT, TEENSY_PIN7) -#define LINE_PIN8 PAL_LINE(TEENSY_PIN8_IOPORT, TEENSY_PIN8) -#define LINE_PIN9 PAL_LINE(TEENSY_PIN9_IOPORT, TEENSY_PIN9) -#define LINE_PIN10 PAL_LINE(TEENSY_PIN10_IOPORT, TEENSY_PIN10) -#define LINE_PIN11 PAL_LINE(TEENSY_PIN11_IOPORT, TEENSY_PIN11) -#define LINE_PIN12 PAL_LINE(TEENSY_PIN12_IOPORT, TEENSY_PIN12) -#define LINE_PIN13 PAL_LINE(TEENSY_PIN13_IOPORT, TEENSY_PIN13) -#define LINE_PIN14 PAL_LINE(TEENSY_PIN14_IOPORT, TEENSY_PIN14) -#define LINE_PIN15 PAL_LINE(TEENSY_PIN15_IOPORT, TEENSY_PIN15) -#define LINE_PIN16 PAL_LINE(TEENSY_PIN16_IOPORT, TEENSY_PIN16) -#define LINE_PIN17 PAL_LINE(TEENSY_PIN17_IOPORT, TEENSY_PIN17) -#define LINE_PIN18 PAL_LINE(TEENSY_PIN18_IOPORT, TEENSY_PIN18) -#define LINE_PIN19 PAL_LINE(TEENSY_PIN19_IOPORT, TEENSY_PIN19) -#define LINE_PIN20 PAL_LINE(TEENSY_PIN20_IOPORT, TEENSY_PIN20) -#define LINE_PIN21 PAL_LINE(TEENSY_PIN21_IOPORT, TEENSY_PIN21) -#define LINE_PIN22 PAL_LINE(TEENSY_PIN22_IOPORT, TEENSY_PIN22) -#define LINE_PIN23 PAL_LINE(TEENSY_PIN23_IOPORT, TEENSY_PIN23) -#define LINE_PIN24 PAL_LINE(TEENSY_PIN24_IOPORT, TEENSY_PIN24) -#define LINE_PIN25 PAL_LINE(TEENSY_PIN25_IOPORT, TEENSY_PIN25) -#define LINE_PIN25 PAL_LINE(TEENSY_PIN25_IOPORT, TEENSY_PIN25) -#define LINE_PIN26 PAL_LINE(TEENSY_PIN26_IOPORT, TEENSY_PIN26) -#define LINE_PIN27 PAL_LINE(TEENSY_PIN27_IOPORT, TEENSY_PIN27) -#define LINE_PIN28 PAL_LINE(TEENSY_PIN28_IOPORT, TEENSY_PIN28) -#define LINE_PIN29 PAL_LINE(TEENSY_PIN29_IOPORT, TEENSY_PIN29) -#define LINE_PIN30 PAL_LINE(TEENSY_PIN30_IOPORT, TEENSY_PIN30) -#define LINE_PIN31 PAL_LINE(TEENSY_PIN31_IOPORT, TEENSY_PIN31) -#define LINE_PIN32 PAL_LINE(TEENSY_PIN32_IOPORT, TEENSY_PIN32) -#define LINE_PIN33 PAL_LINE(TEENSY_PIN33_IOPORT, TEENSY_PIN33) - -#define LINE_LED LINE_PIN13 - -#if !defined(_FROM_ASM_) -# ifdef __cplusplus -extern "C" { -# endif -void boardInit(void); -# ifdef __cplusplus -} -# endif -#endif /* _FROM_ASM_ */ - -#endif /* _BOARD_H_ */ diff --git a/drivers/boards/IC_TEENSY_3_1/board.mk b/drivers/boards/IC_TEENSY_3_1/board.mk deleted file mode 100644 index 62f5b751c..000000000 --- a/drivers/boards/IC_TEENSY_3_1/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files. -BOARDSRC = $(BOARD_PATH)/boards/IC_TEENSY_3_1/board.c - -# Required include directories -BOARDINC = $(BOARD_PATH)/boards/IC_TEENSY_3_1 diff --git a/drivers/boards/STM32_F103_STM32DUINO/board.c b/drivers/boards/STM32_F103_STM32DUINO/board.c deleted file mode 100644 index 8c5a87f35..000000000 --- a/drivers/boards/STM32_F103_STM32DUINO/board.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include "hal.h" - -// Value to place in RTC backup register 10 for persistent bootloader mode -#define RTC_BOOTLOADER_FLAG 0x424C - -/** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. - */ -#if HAL_USE_PAL || defined(__DOXYGEN__) -const PALConfig pal_default_config = -{ - {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH}, - {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH}, - {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH}, - {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH}, - {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH}, -}; -#endif - -/* - * Early initialization code. - * This initialization must be performed just after stack setup and before - * any other initialization. - */ -void __early_init(void) { - - stm32_clock_init(); -} - -/* - * Board-specific initialization code. - */ -void boardInit(void) { - //JTAG-DP Disabled and SW-DP Enabled - AFIO->MAPR |= AFIO_MAPR_SWJ_CFG_JTAGDISABLE; - //Set backup register DR10 to enter bootloader on reset - BKP->DR10 = RTC_BOOTLOADER_FLAG; -} diff --git a/drivers/boards/STM32_F103_STM32DUINO/board.h b/drivers/boards/STM32_F103_STM32DUINO/board.h deleted file mode 100644 index 09d182d6c..000000000 --- a/drivers/boards/STM32_F103_STM32DUINO/board.h +++ /dev/null @@ -1,166 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef _BOARD_H_ -#define _BOARD_H_ - -/* - * Setup for a Generic STM32F103 board. - */ - -/* - * Board identifier. - */ -#define BOARD_STM32_F103_STM32DUINO -#define BOARD_NAME "GENERIC STM32F103C8T6 board - stm32duino bootloader" - -/* - * Board frequencies. - */ -#define STM32_LSECLK 32768 -#define STM32_HSECLK 8000000 - -/* - * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h. - */ -#define STM32F103xB - -/* - * IO pins assignments - */ - -/* on-board */ - -#define GPIOA_LED 8 -#define GPIOD_OSC_IN 0 -#define GPIOD_OSC_OUT 1 - -/* In case your board has a "USB enable" hardware - controlled by a pin, define it here. (It could be just - a 1.5k resistor connected to D+ line.) -*/ -/* -#define GPIOB_USB_DISC 10 -*/ - -/* - * I/O ports initial setup, this configuration is established soon after reset - * in the initialization code. - * - * The digits have the following meaning: - * 0 - Analog input. - * 1 - Push Pull output 10MHz. - * 2 - Push Pull output 2MHz. - * 3 - Push Pull output 50MHz. - * 4 - Digital input. - * 5 - Open Drain output 10MHz. - * 6 - Open Drain output 2MHz. - * 7 - Open Drain output 50MHz. - * 8 - Digital input with PullUp or PullDown resistor depending on ODR. - * 9 - Alternate Push Pull output 10MHz. - * A - Alternate Push Pull output 2MHz. - * B - Alternate Push Pull output 50MHz. - * C - Reserved. - * D - Alternate Open Drain output 10MHz. - * E - Alternate Open Drain output 2MHz. - * F - Alternate Open Drain output 50MHz. - * Please refer to the STM32 Reference Manual for details. - */ - -/* - * Port A setup. - * Everything input with pull-up except: - * PA2 - Alternate output (USART2 TX). - * PA3 - Normal input (USART2 RX). - * PA9 - Alternate output (USART1 TX). - * PA10 - Normal input (USART1 RX). - */ -#define VAL_GPIOACRL 0x88884B88 /* PA7...PA0 */ -#define VAL_GPIOACRH 0x888884B8 /* PA15...PA8 */ -#define VAL_GPIOAODR 0xFFFFFFFF - -/* - * Port B setup. - * Everything input with pull-up except: - * PB10 - Push Pull output (USB switch). - */ -#define VAL_GPIOBCRL 0x88888888 /* PB7...PB0 */ -#define VAL_GPIOBCRH 0x88888388 /* PB15...PB8 */ -#define VAL_GPIOBODR 0xFFFFFFFF - -/* - * Port C setup. - * Everything input with pull-up except: - * PC13 - Push Pull output (LED). - */ -#define VAL_GPIOCCRL 0x88888888 /* PC7...PC0 */ -#define VAL_GPIOCCRH 0x88388888 /* PC15...PC8 */ -#define VAL_GPIOCODR 0xFFFFFFFF - -/* - * Port D setup. - * Everything input with pull-up except: - * PD0 - Normal input (XTAL). - * PD1 - Normal input (XTAL). - */ -#define VAL_GPIODCRL 0x88888844 /* PD7...PD0 */ -#define VAL_GPIODCRH 0x88888888 /* PD15...PD8 */ -#define VAL_GPIODODR 0xFFFFFFFF - -/* - * Port E setup. - * Everything input with pull-up except: - */ -#define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */ -#define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */ -#define VAL_GPIOEODR 0xFFFFFFFF - -/* - * USB bus activation macro, required by the USB driver. - */ -/* The point is that most of the generic STM32F103* boards - have a 1.5k resistor connected on one end to the D+ line - and on the other end to some pin. Or even a slightly more - complicated "USB enable" circuit, controlled by a pin. - That should go here. - - However on some boards (e.g. one that I have), there's no - such hardware. In which case it's better to not do anything. -*/ -/* -#define usb_lld_connect_bus(usbp) palClearPad(GPIOB, GPIOB_USB_DISC) -*/ -#define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT); - -/* - * USB bus de-activation macro, required by the USB driver. - */ -/* -#define usb_lld_disconnect_bus(usbp) palSetPad(GPIOB, GPIOB_USB_DISC) -*/ -#define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12); - -#if !defined(_FROM_ASM_) -#ifdef __cplusplus -extern "C" { -#endif - void boardInit(void); -#ifdef __cplusplus -} -#endif -#endif /* _FROM_ASM_ */ - -#endif /* _BOARD_H_ */ diff --git a/drivers/boards/STM32_F103_STM32DUINO/board.mk b/drivers/boards/STM32_F103_STM32DUINO/board.mk deleted file mode 100644 index 81141bdfd..000000000 --- a/drivers/boards/STM32_F103_STM32DUINO/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files. -BOARDSRC = $(BOARD_PATH)/boards/STM32_F103_STM32DUINO/board.c - -# Required include directories -BOARDINC = $(BOARD_PATH)/boards/STM32_F103_STM32DUINO diff --git a/drivers/boards/ld/MKL26Z64.ld b/drivers/boards/ld/MKL26Z64.ld deleted file mode 100644 index c4ca8b874..000000000 --- a/drivers/boards/ld/MKL26Z64.ld +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com - * (C) 2016 flabbergast - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -/* - * KL26Z64 memory setup. - */ -MEMORY -{ - flash0 : org = 0x00000000, len = 0x100 - flash1 : org = 0x00000400, len = 0x10 - flash2 : org = 0x00000410, len = 62k - 0x410 - flash3 : org = 0x0000F800, len = 2k - flash4 : org = 0x00000000, len = 0 - flash5 : org = 0x00000000, len = 0 - flash6 : org = 0x00000000, len = 0 - flash7 : org = 0x00000000, len = 0 - ram0 : org = 0x1FFFF800, len = 8k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* Flash region for the configuration bytes.*/ -SECTIONS -{ - .cfmprotect : ALIGN(4) SUBALIGN(4) - { - KEEP(*(.cfmconfig)) - } > flash1 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash2); -REGION_ALIAS("XTORS_FLASH_LMA", flash2); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash2); -REGION_ALIAS("TEXT_FLASH_LMA", flash2); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash2); -REGION_ALIAS("RODATA_FLASH_LMA", flash2); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash2); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash2); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash2); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -__eeprom_workarea_start__ = ORIGIN(flash3); -__eeprom_workarea_size__ = LENGTH(flash3); -__eeprom_workarea_end__ = __eeprom_workarea_start__ + __eeprom_workarea_size__; - -/* Generic rules inclusion.*/ -INCLUDE rules.ld diff --git a/drivers/boards/ld/STM32F103x8_stm32duino_bootloader.ld b/drivers/boards/ld/STM32F103x8_stm32duino_bootloader.ld deleted file mode 100644 index d0688ef60..000000000 --- a/drivers/boards/ld/STM32F103x8_stm32duino_bootloader.ld +++ /dev/null @@ -1,88 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * ST32F103xB memory setup for use with the maplemini bootloader. - * You will have to - * #define CORTEX_VTOR_INIT 0x5000 - * in your projects chconf.h - */ -MEMORY -{ - flash0 : org = 0x08002000, len = 64k - 0x2000 - flash1 : org = 0x00000000, len = 0 - flash2 : org = 0x00000000, len = 0 - flash3 : org = 0x00000000, len = 0 - flash4 : org = 0x00000000, len = 0 - flash5 : org = 0x00000000, len = 0 - flash6 : org = 0x00000000, len = 0 - flash7 : org = 0x00000000, len = 0 - ram0 : org = 0x20000000, len = 20k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash0); -REGION_ALIAS("XTORS_FLASH_LMA", flash0); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash0); -REGION_ALIAS("TEXT_FLASH_LMA", flash0); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash0); -REGION_ALIAS("RODATA_FLASH_LMA", flash0); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash0); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -/* Generic rules inclusion.*/ -INCLUDE rules.ld diff --git a/keyboards/handwired/onekey/blackpill_f401/chconf.h b/keyboards/handwired/onekey/blackpill_f401/chconf.h deleted file mode 100644 index 7dc4f84a8..000000000 --- a/keyboards/handwired/onekey/blackpill_f401/chconf.h +++ /dev/null @@ -1,714 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file rt/templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef CHCONF_H -#define CHCONF_H - -#define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_6_0_ - -/*===========================================================================*/ -/** - * @name System timers settings - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System time counter resolution. - * @note Allowed values are 16 or 32 bits. - */ -#if !defined(CH_CFG_ST_RESOLUTION) -#define CH_CFG_ST_RESOLUTION 32 -#endif - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_CFG_ST_FREQUENCY) -#define CH_CFG_ST_FREQUENCY 10000 -#endif - -/** - * @brief Time intervals data size. - * @note Allowed values are 16, 32 or 64 bits. - */ -#if !defined(CH_CFG_INTERVALS_SIZE) -#define CH_CFG_INTERVALS_SIZE 32 -#endif - -/** - * @brief Time types data size. - * @note Allowed values are 16 or 32 bits. - */ -#if !defined(CH_CFG_TIME_TYPES_SIZE) -#define CH_CFG_TIME_TYPES_SIZE 32 -#endif - -/** - * @brief Time delta constant for the tick-less mode. - * @note If this value is zero then the system uses the classic - * periodic tick. This value represents the minimum number - * of ticks that is safe to specify in a timeout directive. - * The value one is not valid, timeouts are rounded up to - * this value. - */ -#if !defined(CH_CFG_ST_TIMEDELTA) -#define CH_CFG_ST_TIMEDELTA 2 -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - * @note The round robin preemption is not supported in tickless mode and - * must be set to zero in that case. - */ -#if !defined(CH_CFG_TIME_QUANTUM) -#define CH_CFG_TIME_QUANTUM 0 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_CFG_USE_MEMCORE. - */ -#if !defined(CH_CFG_MEMCORE_SIZE) -#define CH_CFG_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread. The application @p main() - * function becomes the idle thread and must implement an - * infinite loop. - */ -#if !defined(CH_CFG_NO_IDLE_THREAD) -#define CH_CFG_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_OPTIMIZE_SPEED) -#define CH_CFG_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Time Measurement APIs. - * @details If enabled then the time measurement APIs are included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_TM) -#define CH_CFG_USE_TM TRUE -#endif - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_REGISTRY) -#define CH_CFG_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_WAITEXIT) -#define CH_CFG_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_SEMAPHORES) -#define CH_CFG_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special - * requirements. - * @note Requires @p CH_CFG_USE_SEMAPHORES. - */ -#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) -#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MUTEXES) -#define CH_CFG_USE_MUTEXES TRUE -#endif - -/** - * @brief Enables recursive behavior on mutexes. - * @note Recursive mutexes are heavier and have an increased - * memory footprint. - * - * @note The default is @p FALSE. - * @note Requires @p CH_CFG_USE_MUTEXES. - */ -#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) -#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_MUTEXES. - */ -#if !defined(CH_CFG_USE_CONDVARS) -#define CH_CFG_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_CONDVARS. - */ -#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) -#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_EVENTS) -#define CH_CFG_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_EVENTS. - */ -#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) -#define CH_CFG_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MESSAGES) -#define CH_CFG_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special - * requirements. - * @note Requires @p CH_CFG_USE_MESSAGES. - */ -#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) -#define CH_CFG_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_SEMAPHORES. - */ -#if !defined(CH_CFG_USE_MAILBOXES) -#define CH_CFG_USE_MAILBOXES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MEMCORE) -#define CH_CFG_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or - * @p CH_CFG_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_CFG_USE_HEAP) -#define CH_CFG_USE_HEAP TRUE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MEMPOOLS) -#define CH_CFG_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Objects FIFOs APIs. - * @details If enabled then the objects FIFOs APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_OBJ_FIFOS) -#define CH_CFG_USE_OBJ_FIFOS TRUE -#endif - -/** - * @brief Pipes APIs. - * @details If enabled then the pipes APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_PIPES) -#define CH_CFG_USE_PIPES TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_WAITEXIT. - * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. - */ -#if !defined(CH_CFG_USE_DYNAMIC) -#define CH_CFG_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Objects factory options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Objects Factory APIs. - * @details If enabled then the objects factory APIs are included in the - * kernel. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_CFG_USE_FACTORY) -#define CH_CFG_USE_FACTORY TRUE -#endif - -/** - * @brief Maximum length for object names. - * @details If the specified length is zero then the name is stored by - * pointer but this could have unintended side effects. - */ -#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) -#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 -#endif - -/** - * @brief Enables the registry of generic objects. - */ -#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) -#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE -#endif - -/** - * @brief Enables factory for generic buffers. - */ -#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) -#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE -#endif - -/** - * @brief Enables factory for semaphores. - */ -#if !defined(CH_CFG_FACTORY_SEMAPHORES) -#define CH_CFG_FACTORY_SEMAPHORES TRUE -#endif - -/** - * @brief Enables factory for mailboxes. - */ -#if !defined(CH_CFG_FACTORY_MAILBOXES) -#define CH_CFG_FACTORY_MAILBOXES TRUE -#endif - -/** - * @brief Enables factory for objects FIFOs. - */ -#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) -#define CH_CFG_FACTORY_OBJ_FIFOS TRUE -#endif - -/** - * @brief Enables factory for Pipes. - */ -#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) -#define CH_CFG_FACTORY_PIPES TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, kernel statistics. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_STATISTICS) -#define CH_DBG_STATISTICS FALSE -#endif - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the trace buffer is activated. - * - * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. - */ -#if !defined(CH_DBG_TRACE_MASK) -#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED -#endif - -/** - * @brief Trace buffer entries. - * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is - * different from @p CH_DBG_TRACE_MASK_DISABLED. - */ -#if !defined(CH_DBG_TRACE_BUFFER_SIZE) -#define CH_DBG_TRACE_BUFFER_SIZE 128 -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p thread_t structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p FALSE. - * @note This debug option is not currently compatible with the - * tickless mode. - */ -#if !defined(CH_DBG_THREADS_PROFILING) -#define CH_DBG_THREADS_PROFILING FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System structure extension. - * @details User fields added to the end of the @p ch_system_t structure. - */ -#define CH_CFG_SYSTEM_EXTRA_FIELDS \ - /* Add threads custom fields here.*/ - -/** - * @brief System initialization hook. - * @details User initialization code added to the @p chSysInit() function - * just before interrupts are enabled globally. - */ -#define CH_CFG_SYSTEM_INIT_HOOK() { \ - /* Add threads initialization code here.*/ \ -} - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p thread_t structure. - */ -#define CH_CFG_THREAD_EXTRA_FIELDS \ - /* Add threads custom fields here.*/ - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p _thread_init() function. - * - * @note It is invoked from within @p _thread_init() and implicitly from all - * the threads creation APIs. - */ -#define CH_CFG_THREAD_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - */ -#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* Context switch code here.*/ \ -} - -/** - * @brief ISR enter hook. - */ -#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ - /* IRQ prologue code here.*/ \ -} - -/** - * @brief ISR exit hook. - */ -#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ - /* IRQ epilogue code here.*/ \ -} - -/** - * @brief Idle thread enter hook. - * @note This hook is invoked within a critical zone, no OS functions - * should be invoked from here. - * @note This macro can be used to activate a power saving mode. - */ -#define CH_CFG_IDLE_ENTER_HOOK() { \ - /* Idle-enter code here.*/ \ -} - -/** - * @brief Idle thread leave hook. - * @note This hook is invoked within a critical zone, no OS functions - * should be invoked from here. - * @note This macro can be used to deactivate a power saving mode. - */ -#define CH_CFG_IDLE_LEAVE_HOOK() { \ - /* Idle-leave code here.*/ \ -} - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#define CH_CFG_IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#define CH_CFG_SYSTEM_TICK_HOOK() { \ - /* System tick event code here.*/ \ -} - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ - /* System halt code here.*/ \ -} - -/** - * @brief Trace hook. - * @details This hook is invoked each time a new record is written in the - * trace buffer. - */ -#define CH_CFG_TRACE_HOOK(tep) { \ - /* Trace code here.*/ \ -} - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* CHCONF_H */ - -/** @} */ diff --git a/keyboards/handwired/onekey/blackpill_f401/halconf.h b/keyboards/handwired/onekey/blackpill_f401/halconf.h index a8db392aa..d73c214ec 100644 --- a/keyboards/handwired/onekey/blackpill_f401/halconf.h +++ b/keyboards/handwired/onekey/blackpill_f401/halconf.h @@ -1,525 +1,20 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. +/* Copyright 2020 Nick Brassel (tzarc) * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef HALCONF_H -#define HALCONF_H - -#define _CHIBIOS_HAL_CONF_ -#define _CHIBIOS_HAL_CONF_VER_7_0_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the cryptographic subsystem. - */ -#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) -#define HAL_USE_CRY FALSE -#endif - -/** - * @brief Enables the DAC subsystem. - */ -#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) -#define HAL_USE_DAC FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the I2S subsystem. - */ -#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) -#define HAL_USE_I2S FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SIO subsystem. - */ -#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) -#define HAL_USE_SIO FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the TRNG subsystem. - */ -#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) -#define HAL_USE_TRNG FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB TRUE -#endif - -/** - * @brief Enables the WDG subsystem. - */ -#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) -#define HAL_USE_WDG FALSE -#endif - -/** - * @brief Enables the WSPI subsystem. - */ -#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) -#define HAL_USE_WSPI FALSE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) -#define PAL_USE_CALLBACKS FALSE -#endif - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) -#define PAL_USE_WAIT FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/** - * @brief Enforces the driver to use direct callbacks rather than OSAL events. - */ -#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) -#define CAN_ENFORCE_USE_CALLBACKS FALSE -#endif - -/*===========================================================================*/ -/* CRY driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the SW fall-back of the cryptographic driver. - * @details When enabled, this option, activates a fall-back software - * implementation for algorithms not supported by the underlying - * hardware. - * @note Fall-back implementations may not be present for all algorithms. - */ -#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) -#define HAL_CRY_USE_FALLBACK FALSE -#endif - -/** - * @brief Makes the driver forcibly use the fall-back implementations. - */ -#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) -#define HAL_CRY_ENFORCE_FALLBACK FALSE -#endif - -/*===========================================================================*/ -/* DAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) -#define DAC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define DAC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the zero-copy API. - */ -#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE -#endif - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/** - * @brief OCR initialization constant for V20 cards. - */ -#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) -#define SDC_INIT_OCR_V20 0x50FF8000U -#endif - -/** - * @brief OCR initialization constant for non-V20 cards. - */ -#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) -#define SDC_INIT_OCR 0x80100000U -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 16 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SERIAL_USB driver related setting. */ -/*===========================================================================*/ - -/** - * @brief Serial over USB buffers size. - * @details Configuration parameter, the buffer size must be a multiple of - * the USB data endpoint maximum packet size. - * @note The default is 256 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_USB_BUFFERS_SIZE 256 -#endif - -/** - * @brief Serial over USB number of buffers. - * @note The default is 2 buffers. - */ -#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) -#define SERIAL_USB_BUFFERS_NUMBER 2 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables circular transfers APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) -#define SPI_USE_CIRCULAR FALSE -#endif - - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/** - * @brief Handling method for SPI CS line. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) -#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) -#define UART_USE_WAIT FALSE -#endif - -/** - * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define UART_USE_MUTUAL_EXCLUSION FALSE -#endif - -/*===========================================================================*/ -/* USB driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) -#define USB_USE_WAIT TRUE -#endif - -/*===========================================================================*/ -/* WSPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) -#define WSPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . */ -#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define WSPI_USE_MUTUAL_EXCLUSION TRUE -#endif +#pragma once -#endif /* HALCONF_H */ +#define HAL_USE_I2C TRUE -/** @} */ +#include_next "halconf.h" diff --git a/keyboards/handwired/onekey/blackpill_f401/mcuconf.h b/keyboards/handwired/onekey/blackpill_f401/mcuconf.h index ba6e934fe..33e07847b 100644 --- a/keyboards/handwired/onekey/blackpill_f401/mcuconf.h +++ b/keyboards/handwired/onekey/blackpill_f401/mcuconf.h @@ -1,253 +1,21 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef MCUCONF_H -#define MCUCONF_H - -/* - * STM32F4xx drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. +/* Copyright 2020 Nick Brassel (tzarc) * - * IRQ priorities: - * 15...0 Lowest...Highest. + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32F4xx_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_CLOCK48_REQUIRED TRUE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLM_VALUE 25 -#define STM32_PLLN_VALUE 336 -#define STM32_PLLP_VALUE 4 -#define STM32_PLLQ_VALUE 7 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV4 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_RTCSEL STM32_RTCSEL_LSI -#define STM32_RTCPRE_VALUE 8 -#define STM32_MCO1SEL STM32_MCO1SEL_HSI -#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 -#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK -#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2SSRC_CKIN -#define STM32_PLLI2SN_VALUE 192 -#define STM32_PLLI2SR_VALUE 5 -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_BKPRAM_ENABLE FALSE - -/* - * IRQ system settings. - */ -#define STM32_IRQ_EXTI0_PRIORITY 6 -#define STM32_IRQ_EXTI1_PRIORITY 6 -#define STM32_IRQ_EXTI2_PRIORITY 6 -#define STM32_IRQ_EXTI3_PRIORITY 6 -#define STM32_IRQ_EXTI4_PRIORITY 6 -#define STM32_IRQ_EXTI5_9_PRIORITY 6 -#define STM32_IRQ_EXTI10_15_PRIORITY 6 -#define STM32_IRQ_EXTI16_PRIORITY 6 -#define STM32_IRQ_EXTI17_PRIORITY 15 -#define STM32_IRQ_EXTI18_PRIORITY 6 -#define STM32_IRQ_EXTI19_PRIORITY 6 -#define STM32_IRQ_EXTI20_PRIORITY 6 -#define STM32_IRQ_EXTI21_PRIORITY 15 -#define STM32_IRQ_EXTI22_PRIORITY 15 - -/* - * ADC driver system settings. - */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 -#define STM32_ADC_USE_ADC1 FALSE -#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 6 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM9 FALSE -#define STM32_GPT_USE_TIM11 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM9_IRQ_PRIORITY 7 -#define STM32_GPT_TIM11_IRQ_PRIORITY 7 - -/* - * I2C driver system settings. - */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_BUSY_TIMEOUT 50 -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") - -/* - * I2S driver system settings. - */ -#define STM32_I2S_USE_SPI2 FALSE -#define STM32_I2S_USE_SPI3 FALSE -#define STM32_I2S_SPI2_IRQ_PRIORITY 10 -#define STM32_I2S_SPI3_IRQ_PRIORITY 10 -#define STM32_I2S_SPI2_DMA_PRIORITY 1 -#define STM32_I2S_SPI3_DMA_PRIORITY 1 -#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM9 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM9_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM9 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM9_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) -#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) -#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") - -/* - * ST driver system settings. - */ -#define STM32_ST_IRQ_PRIORITY 8 -#define STM32_ST_USE_TIMER 2 - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART6 FALSE -#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) -#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) -#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART6_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART6_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") - -/* - * USB driver system settings. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . */ -#define STM32_USB_USE_OTG1 TRUE -#define STM32_USB_OTG1_IRQ_PRIORITY 14 -#define STM32_USB_OTG1_RX_FIFO_SIZE 512 -#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1 -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 -#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 +#pragma once -/* - * WDG driver system settings. - */ -#define STM32_WDG_USE_IWDG FALSE +#include_next "mcuconf.h" -#endif /* MCUCONF_H */ +#undef STM32_I2C_USE_I2C1 +#define STM32_I2C_USE_I2C1 TRUE diff --git a/keyboards/handwired/onekey/blackpill_f411/chconf.h b/keyboards/handwired/onekey/blackpill_f411/chconf.h deleted file mode 100644 index 7dc4f84a8..000000000 --- a/keyboards/handwired/onekey/blackpill_f411/chconf.h +++ /dev/null @@ -1,714 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file rt/templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef CHCONF_H -#define CHCONF_H - -#define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_6_0_ - -/*===========================================================================*/ -/** - * @name System timers settings - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System time counter resolution. - * @note Allowed values are 16 or 32 bits. - */ -#if !defined(CH_CFG_ST_RESOLUTION) -#define CH_CFG_ST_RESOLUTION 32 -#endif - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_CFG_ST_FREQUENCY) -#define CH_CFG_ST_FREQUENCY 10000 -#endif - -/** - * @brief Time intervals data size. - * @note Allowed values are 16, 32 or 64 bits. - */ -#if !defined(CH_CFG_INTERVALS_SIZE) -#define CH_CFG_INTERVALS_SIZE 32 -#endif - -/** - * @brief Time types data size. - * @note Allowed values are 16 or 32 bits. - */ -#if !defined(CH_CFG_TIME_TYPES_SIZE) -#define CH_CFG_TIME_TYPES_SIZE 32 -#endif - -/** - * @brief Time delta constant for the tick-less mode. - * @note If this value is zero then the system uses the classic - * periodic tick. This value represents the minimum number - * of ticks that is safe to specify in a timeout directive. - * The value one is not valid, timeouts are rounded up to - * this value. - */ -#if !defined(CH_CFG_ST_TIMEDELTA) -#define CH_CFG_ST_TIMEDELTA 2 -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - * @note The round robin preemption is not supported in tickless mode and - * must be set to zero in that case. - */ -#if !defined(CH_CFG_TIME_QUANTUM) -#define CH_CFG_TIME_QUANTUM 0 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_CFG_USE_MEMCORE. - */ -#if !defined(CH_CFG_MEMCORE_SIZE) -#define CH_CFG_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread. The application @p main() - * function becomes the idle thread and must implement an - * infinite loop. - */ -#if !defined(CH_CFG_NO_IDLE_THREAD) -#define CH_CFG_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_OPTIMIZE_SPEED) -#define CH_CFG_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Time Measurement APIs. - * @details If enabled then the time measurement APIs are included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_TM) -#define CH_CFG_USE_TM TRUE -#endif - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_REGISTRY) -#define CH_CFG_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_WAITEXIT) -#define CH_CFG_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_SEMAPHORES) -#define CH_CFG_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special - * requirements. - * @note Requires @p CH_CFG_USE_SEMAPHORES. - */ -#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) -#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MUTEXES) -#define CH_CFG_USE_MUTEXES TRUE -#endif - -/** - * @brief Enables recursive behavior on mutexes. - * @note Recursive mutexes are heavier and have an increased - * memory footprint. - * - * @note The default is @p FALSE. - * @note Requires @p CH_CFG_USE_MUTEXES. - */ -#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) -#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_MUTEXES. - */ -#if !defined(CH_CFG_USE_CONDVARS) -#define CH_CFG_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_CONDVARS. - */ -#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) -#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_EVENTS) -#define CH_CFG_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_EVENTS. - */ -#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) -#define CH_CFG_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MESSAGES) -#define CH_CFG_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special - * requirements. - * @note Requires @p CH_CFG_USE_MESSAGES. - */ -#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) -#define CH_CFG_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_SEMAPHORES. - */ -#if !defined(CH_CFG_USE_MAILBOXES) -#define CH_CFG_USE_MAILBOXES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MEMCORE) -#define CH_CFG_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or - * @p CH_CFG_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_CFG_USE_HEAP) -#define CH_CFG_USE_HEAP TRUE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MEMPOOLS) -#define CH_CFG_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Objects FIFOs APIs. - * @details If enabled then the objects FIFOs APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_OBJ_FIFOS) -#define CH_CFG_USE_OBJ_FIFOS TRUE -#endif - -/** - * @brief Pipes APIs. - * @details If enabled then the pipes APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_PIPES) -#define CH_CFG_USE_PIPES TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_WAITEXIT. - * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. - */ -#if !defined(CH_CFG_USE_DYNAMIC) -#define CH_CFG_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Objects factory options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Objects Factory APIs. - * @details If enabled then the objects factory APIs are included in the - * kernel. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_CFG_USE_FACTORY) -#define CH_CFG_USE_FACTORY TRUE -#endif - -/** - * @brief Maximum length for object names. - * @details If the specified length is zero then the name is stored by - * pointer but this could have unintended side effects. - */ -#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) -#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 -#endif - -/** - * @brief Enables the registry of generic objects. - */ -#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) -#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE -#endif - -/** - * @brief Enables factory for generic buffers. - */ -#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) -#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE -#endif - -/** - * @brief Enables factory for semaphores. - */ -#if !defined(CH_CFG_FACTORY_SEMAPHORES) -#define CH_CFG_FACTORY_SEMAPHORES TRUE -#endif - -/** - * @brief Enables factory for mailboxes. - */ -#if !defined(CH_CFG_FACTORY_MAILBOXES) -#define CH_CFG_FACTORY_MAILBOXES TRUE -#endif - -/** - * @brief Enables factory for objects FIFOs. - */ -#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) -#define CH_CFG_FACTORY_OBJ_FIFOS TRUE -#endif - -/** - * @brief Enables factory for Pipes. - */ -#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) -#define CH_CFG_FACTORY_PIPES TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, kernel statistics. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_STATISTICS) -#define CH_DBG_STATISTICS FALSE -#endif - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the trace buffer is activated. - * - * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. - */ -#if !defined(CH_DBG_TRACE_MASK) -#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED -#endif - -/** - * @brief Trace buffer entries. - * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is - * different from @p CH_DBG_TRACE_MASK_DISABLED. - */ -#if !defined(CH_DBG_TRACE_BUFFER_SIZE) -#define CH_DBG_TRACE_BUFFER_SIZE 128 -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p thread_t structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p FALSE. - * @note This debug option is not currently compatible with the - * tickless mode. - */ -#if !defined(CH_DBG_THREADS_PROFILING) -#define CH_DBG_THREADS_PROFILING FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System structure extension. - * @details User fields added to the end of the @p ch_system_t structure. - */ -#define CH_CFG_SYSTEM_EXTRA_FIELDS \ - /* Add threads custom fields here.*/ - -/** - * @brief System initialization hook. - * @details User initialization code added to the @p chSysInit() function - * just before interrupts are enabled globally. - */ -#define CH_CFG_SYSTEM_INIT_HOOK() { \ - /* Add threads initialization code here.*/ \ -} - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p thread_t structure. - */ -#define CH_CFG_THREAD_EXTRA_FIELDS \ - /* Add threads custom fields here.*/ - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p _thread_init() function. - * - * @note It is invoked from within @p _thread_init() and implicitly from all - * the threads creation APIs. - */ -#define CH_CFG_THREAD_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - */ -#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* Context switch code here.*/ \ -} - -/** - * @brief ISR enter hook. - */ -#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ - /* IRQ prologue code here.*/ \ -} - -/** - * @brief ISR exit hook. - */ -#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ - /* IRQ epilogue code here.*/ \ -} - -/** - * @brief Idle thread enter hook. - * @note This hook is invoked within a critical zone, no OS functions - * should be invoked from here. - * @note This macro can be used to activate a power saving mode. - */ -#define CH_CFG_IDLE_ENTER_HOOK() { \ - /* Idle-enter code here.*/ \ -} - -/** - * @brief Idle thread leave hook. - * @note This hook is invoked within a critical zone, no OS functions - * should be invoked from here. - * @note This macro can be used to deactivate a power saving mode. - */ -#define CH_CFG_IDLE_LEAVE_HOOK() { \ - /* Idle-leave code here.*/ \ -} - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#define CH_CFG_IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#define CH_CFG_SYSTEM_TICK_HOOK() { \ - /* System tick event code here.*/ \ -} - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ - /* System halt code here.*/ \ -} - -/** - * @brief Trace hook. - * @details This hook is invoked each time a new record is written in the - * trace buffer. - */ -#define CH_CFG_TRACE_HOOK(tep) { \ - /* Trace code here.*/ \ -} - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* CHCONF_H */ - -/** @} */ diff --git a/keyboards/handwired/onekey/blackpill_f411/halconf.h b/keyboards/handwired/onekey/blackpill_f411/halconf.h index a8db392aa..d73c214ec 100644 --- a/keyboards/handwired/onekey/blackpill_f411/halconf.h +++ b/keyboards/handwired/onekey/blackpill_f411/halconf.h @@ -1,525 +1,20 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. +/* Copyright 2020 Nick Brassel (tzarc) * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef HALCONF_H -#define HALCONF_H - -#define _CHIBIOS_HAL_CONF_ -#define _CHIBIOS_HAL_CONF_VER_7_0_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the cryptographic subsystem. - */ -#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) -#define HAL_USE_CRY FALSE -#endif - -/** - * @brief Enables the DAC subsystem. - */ -#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) -#define HAL_USE_DAC FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the I2S subsystem. - */ -#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) -#define HAL_USE_I2S FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SIO subsystem. - */ -#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) -#define HAL_USE_SIO FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the TRNG subsystem. - */ -#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) -#define HAL_USE_TRNG FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB TRUE -#endif - -/** - * @brief Enables the WDG subsystem. - */ -#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) -#define HAL_USE_WDG FALSE -#endif - -/** - * @brief Enables the WSPI subsystem. - */ -#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) -#define HAL_USE_WSPI FALSE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) -#define PAL_USE_CALLBACKS FALSE -#endif - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) -#define PAL_USE_WAIT FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/** - * @brief Enforces the driver to use direct callbacks rather than OSAL events. - */ -#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) -#define CAN_ENFORCE_USE_CALLBACKS FALSE -#endif - -/*===========================================================================*/ -/* CRY driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the SW fall-back of the cryptographic driver. - * @details When enabled, this option, activates a fall-back software - * implementation for algorithms not supported by the underlying - * hardware. - * @note Fall-back implementations may not be present for all algorithms. - */ -#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) -#define HAL_CRY_USE_FALLBACK FALSE -#endif - -/** - * @brief Makes the driver forcibly use the fall-back implementations. - */ -#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) -#define HAL_CRY_ENFORCE_FALLBACK FALSE -#endif - -/*===========================================================================*/ -/* DAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) -#define DAC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define DAC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the zero-copy API. - */ -#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE -#endif - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/** - * @brief OCR initialization constant for V20 cards. - */ -#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) -#define SDC_INIT_OCR_V20 0x50FF8000U -#endif - -/** - * @brief OCR initialization constant for non-V20 cards. - */ -#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) -#define SDC_INIT_OCR 0x80100000U -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 16 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SERIAL_USB driver related setting. */ -/*===========================================================================*/ - -/** - * @brief Serial over USB buffers size. - * @details Configuration parameter, the buffer size must be a multiple of - * the USB data endpoint maximum packet size. - * @note The default is 256 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_USB_BUFFERS_SIZE 256 -#endif - -/** - * @brief Serial over USB number of buffers. - * @note The default is 2 buffers. - */ -#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) -#define SERIAL_USB_BUFFERS_NUMBER 2 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables circular transfers APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) -#define SPI_USE_CIRCULAR FALSE -#endif - - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/** - * @brief Handling method for SPI CS line. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) -#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) -#define UART_USE_WAIT FALSE -#endif - -/** - * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define UART_USE_MUTUAL_EXCLUSION FALSE -#endif - -/*===========================================================================*/ -/* USB driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) -#define USB_USE_WAIT TRUE -#endif - -/*===========================================================================*/ -/* WSPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) -#define WSPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . */ -#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define WSPI_USE_MUTUAL_EXCLUSION TRUE -#endif +#pragma once -#endif /* HALCONF_H */ +#define HAL_USE_I2C TRUE -/** @} */ +#include_next "halconf.h" diff --git a/keyboards/handwired/onekey/blackpill_f411/mcuconf.h b/keyboards/handwired/onekey/blackpill_f411/mcuconf.h index 0394ff56b..33e07847b 100644 --- a/keyboards/handwired/onekey/blackpill_f411/mcuconf.h +++ b/keyboards/handwired/onekey/blackpill_f411/mcuconf.h @@ -1,253 +1,21 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef MCUCONF_H -#define MCUCONF_H - -/* - * STM32F4xx drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. +/* Copyright 2020 Nick Brassel (tzarc) * - * IRQ priorities: - * 15...0 Lowest...Highest. + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32F4xx_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_CLOCK48_REQUIRED TRUE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLM_VALUE 25 -#define STM32_PLLN_VALUE 384 -#define STM32_PLLP_VALUE 4 -#define STM32_PLLQ_VALUE 8 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV4 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_RTCSEL STM32_RTCSEL_LSI -#define STM32_RTCPRE_VALUE 8 -#define STM32_MCO1SEL STM32_MCO1SEL_HSI -#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 -#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK -#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2SSRC_CKIN -#define STM32_PLLI2SN_VALUE 192 -#define STM32_PLLI2SR_VALUE 5 -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_BKPRAM_ENABLE FALSE - -/* - * IRQ system settings. - */ -#define STM32_IRQ_EXTI0_PRIORITY 6 -#define STM32_IRQ_EXTI1_PRIORITY 6 -#define STM32_IRQ_EXTI2_PRIORITY 6 -#define STM32_IRQ_EXTI3_PRIORITY 6 -#define STM32_IRQ_EXTI4_PRIORITY 6 -#define STM32_IRQ_EXTI5_9_PRIORITY 6 -#define STM32_IRQ_EXTI10_15_PRIORITY 6 -#define STM32_IRQ_EXTI16_PRIORITY 6 -#define STM32_IRQ_EXTI17_PRIORITY 15 -#define STM32_IRQ_EXTI18_PRIORITY 6 -#define STM32_IRQ_EXTI19_PRIORITY 6 -#define STM32_IRQ_EXTI20_PRIORITY 6 -#define STM32_IRQ_EXTI21_PRIORITY 15 -#define STM32_IRQ_EXTI22_PRIORITY 15 - -/* - * ADC driver system settings. - */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 -#define STM32_ADC_USE_ADC1 FALSE -#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 6 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM9 FALSE -#define STM32_GPT_USE_TIM11 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM9_IRQ_PRIORITY 7 -#define STM32_GPT_TIM11_IRQ_PRIORITY 7 - -/* - * I2C driver system settings. - */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_BUSY_TIMEOUT 50 -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") - -/* - * I2S driver system settings. - */ -#define STM32_I2S_USE_SPI2 FALSE -#define STM32_I2S_USE_SPI3 FALSE -#define STM32_I2S_SPI2_IRQ_PRIORITY 10 -#define STM32_I2S_SPI3_IRQ_PRIORITY 10 -#define STM32_I2S_SPI2_DMA_PRIORITY 1 -#define STM32_I2S_SPI3_DMA_PRIORITY 1 -#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM9 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM9_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM9 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM9_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) -#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) -#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") - -/* - * ST driver system settings. - */ -#define STM32_ST_IRQ_PRIORITY 8 -#define STM32_ST_USE_TIMER 2 - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART6 FALSE -#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) -#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) -#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART6_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART6_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") - -/* - * USB driver system settings. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . */ -#define STM32_USB_USE_OTG1 TRUE -#define STM32_USB_OTG1_IRQ_PRIORITY 14 -#define STM32_USB_OTG1_RX_FIFO_SIZE 512 -#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1 -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 -#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 +#pragma once -/* - * WDG driver system settings. - */ -#define STM32_WDG_USE_IWDG FALSE +#include_next "mcuconf.h" -#endif /* MCUCONF_H */ +#undef STM32_I2C_USE_I2C1 +#define STM32_I2C_USE_I2C1 TRUE diff --git a/keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.c b/keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.c deleted file mode 100644 index 754dc5c4d..000000000 --- a/keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.c +++ /dev/null @@ -1,268 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * This file has been automatically generated using ChibiStudio board - * generator plugin. Do not edit manually. - */ - -#include "hal.h" -#include "stm32_gpio.h" - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/** - * @brief Type of STM32 GPIO port setup. - */ -typedef struct { - uint32_t moder; - uint32_t otyper; - uint32_t ospeedr; - uint32_t pupdr; - uint32_t odr; - uint32_t afrl; - uint32_t afrh; -} gpio_setup_t; - -/** - * @brief Type of STM32 GPIO initialization data. - */ -typedef struct { -#if STM32_HAS_GPIOA || defined(__DOXYGEN__) - gpio_setup_t PAData; -#endif -#if STM32_HAS_GPIOB || defined(__DOXYGEN__) - gpio_setup_t PBData; -#endif -#if STM32_HAS_GPIOC || defined(__DOXYGEN__) - gpio_setup_t PCData; -#endif -#if STM32_HAS_GPIOD || defined(__DOXYGEN__) - gpio_setup_t PDData; -#endif -#if STM32_HAS_GPIOE || defined(__DOXYGEN__) - gpio_setup_t PEData; -#endif -#if STM32_HAS_GPIOF || defined(__DOXYGEN__) - gpio_setup_t PFData; -#endif -#if STM32_HAS_GPIOG || defined(__DOXYGEN__) - gpio_setup_t PGData; -#endif -#if STM32_HAS_GPIOH || defined(__DOXYGEN__) - gpio_setup_t PHData; -#endif -#if STM32_HAS_GPIOI || defined(__DOXYGEN__) - gpio_setup_t PIData; -#endif -#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) - gpio_setup_t PJData; -#endif -#if STM32_HAS_GPIOK || defined(__DOXYGEN__) - gpio_setup_t PKData; -#endif -} gpio_config_t; - -/** - * @brief STM32 GPIO static initialization data. - */ -static const gpio_config_t gpio_default_config = { -#if STM32_HAS_GPIOA - {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, - VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, -#endif -#if STM32_HAS_GPIOB - {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, - VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, -#endif -#if STM32_HAS_GPIOC - {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, - VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, -#endif -#if STM32_HAS_GPIOD - {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, - VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, -#endif -#if STM32_HAS_GPIOE - {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, - VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, -#endif -#if STM32_HAS_GPIOF - {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, - VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, -#endif -#if STM32_HAS_GPIOG - {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, - VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, -#endif -#if STM32_HAS_GPIOH - {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, - VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, -#endif -#if STM32_HAS_GPIOI - {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, -#endif -#if STM32_HAS_GPIOJ - {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, - VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, -#endif -#if STM32_HAS_GPIOK - {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, - VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} -#endif -}; - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { - - gpiop->OTYPER = config->otyper; - gpiop->OSPEEDR = config->ospeedr; - gpiop->PUPDR = config->pupdr; - gpiop->ODR = config->odr; - gpiop->AFRL = config->afrl; - gpiop->AFRH = config->afrh; - gpiop->MODER = config->moder; -} - -static void stm32_gpio_init(void) { - - /* Enabling GPIO-related clocks, the mask comes from the - registry header file.*/ - rccResetAHB(STM32_GPIO_EN_MASK); - rccEnableAHB(STM32_GPIO_EN_MASK, true); - - /* Initializing all the defined GPIO ports.*/ -#if STM32_HAS_GPIOA - gpio_init(GPIOA, &gpio_default_config.PAData); -#endif -#if STM32_HAS_GPIOB - gpio_init(GPIOB, &gpio_default_config.PBData); -#endif -#if STM32_HAS_GPIOC - gpio_init(GPIOC, &gpio_default_config.PCData); -#endif -#if STM32_HAS_GPIOD - gpio_init(GPIOD, &gpio_default_config.PDData); -#endif -#if STM32_HAS_GPIOE - gpio_init(GPIOE, &gpio_default_config.PEData); -#endif -#if STM32_HAS_GPIOF - gpio_init(GPIOF, &gpio_default_config.PFData); -#endif -#if STM32_HAS_GPIOG - gpio_init(GPIOG, &gpio_default_config.PGData); -#endif -#if STM32_HAS_GPIOH - gpio_init(GPIOH, &gpio_default_config.PHData); -#endif -#if STM32_HAS_GPIOI - gpio_init(GPIOI, &gpio_default_config.PIData); -#endif -#if STM32_HAS_GPIOJ - gpio_init(GPIOJ, &gpio_default_config.PJData); -#endif -#if STM32_HAS_GPIOK - gpio_init(GPIOK, &gpio_default_config.PKData); -#endif -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Early initialization code. - * @details GPIO ports and system clocks are initialized before everything - * else. - */ -void __early_init(void) { - extern void enter_bootloader_mode_if_requested(void); - enter_bootloader_mode_if_requested(); - - stm32_gpio_init(); - stm32_clock_init(); -} - -#if HAL_USE_SDC || defined(__DOXYGEN__) -/** - * @brief SDC card detection. - */ -bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief SDC card write protection detection. - */ -bool sdc_lld_is_write_protected(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif /* HAL_USE_SDC */ - -#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) -/** - * @brief MMC_SPI card detection. - */ -bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief MMC_SPI card write protection detection. - */ -bool mmc_lld_is_write_protected(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif - -/** - * @brief Board-specific initialization code. - * @todo Add your board-specific code, if any. - */ -void boardInit(void) { - -} diff --git a/keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.h b/keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.h deleted file mode 100644 index ee9d31e04..000000000 --- a/keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.h +++ /dev/null @@ -1,896 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ -#ifndef _BOARD_H -#define _BOARD_H - -/* - * Setup for STMicroelectronics STM32 Nucleo32-F042K6 board. - */ - -/* - * Board identifier. - */ -#define BOARD_GENERIC_STM32_F042X6 -#define BOARD_NAME "Generic STM32F042 PCB" - -/* - * Board oscillators-related settings. - * NOTE: LSE not fitted. - * NOTE: HSE not fitted. - */ -#if !defined(STM32_LSECLK) -#define STM32_LSECLK 0U -#endif - -#define STM32_LSEDRV (3U << 3U) - -#if !defined(STM32_HSECLK) -#define STM32_HSECLK 0U -#endif - -/* - * MCU type as defined in the ST header. - */ -#define STM32F042x6 - -/* - * IO pins assignments. - */ -#define GPIOA_PIN0 0U -#define GPIOA_PIN1 1U -#define GPIOA_PIN2 2U -#define GPIOA_PIN3 3U -#define GPIOA_PIN4 4U -#define GPIOA_PIN5 5U -#define GPIOA_PIN6 6U -#define GPIOA_PIN7 7U -#define GPIOA_PIN8 8U -#define GPIOA_PIN9 9U -#define GPIOA_PIN10 10U -#define GPIOA_PIN11 11U -#define GPIOA_PIN12 12U -#define GPIOA_PIN13 13U -#define GPIOA_PIN14 14U -#define GPIOA_PIN15 15U - -#define GPIOB_PIN0 0U -#define GPIOB_PIN1 1U -#define GPIOB_PIN2 2U -#define GPIOB_PIN3 3U -#define GPIOB_PIN4 4U -#define GPIOB_PIN5 5U -#define GPIOB_PIN6 6U -#define GPIOB_PIN7 7U -#define GPIOB_PIN8 8U -#define GPIOB_PIN9 9U -#define GPIOB_PIN10 10U -#define GPIOB_PIN11 11U -#define GPIOB_PIN12 12U -#define GPIOB_PIN13 13U -#define GPIOB_PIN14 14U -#define GPIOB_PIN15 15U - -#define GPIOC_PIN0 0U -#define GPIOC_PIN1 1U -#define GPIOC_PIN2 2U -#define GPIOC_PIN3 3U -#define GPIOC_PIN4 4U -#define GPIOC_PIN5 5U -#define GPIOC_PIN6 6U -#define GPIOC_PIN7 7U -#define GPIOC_PIN8 8U -#define GPIOC_PIN9 9U -#define GPIOC_PIN10 10U -#define GPIOC_PIN11 11U -#define GPIOC_PIN12 12U -#define GPIOC_PIN13 13U -#define GPIOC_PIN14 14U -#define GPIOC_PIN15 15U - -#define GPIOD_PIN0 0U -#define GPIOD_PIN1 1U -#define GPIOD_PIN2 2U -#define GPIOD_PIN3 3U -#define GPIOD_PIN4 4U -#define GPIOD_PIN5 5U -#define GPIOD_PIN6 6U -#define GPIOD_PIN7 7U -#define GPIOD_PIN8 8U -#define GPIOD_PIN9 9U -#define GPIOD_PIN10 10U -#define GPIOD_PIN11 11U -#define GPIOD_PIN12 12U -#define GPIOD_PIN13 13U -#define GPIOD_PIN14 14U -#define GPIOD_PIN15 15U - -#define GPIOE_PIN0 0U -#define GPIOE_PIN1 1U -#define GPIOE_PIN2 2U -#define GPIOE_PIN3 3U -#define GPIOE_PIN4 4U -#define GPIOE_PIN5 5U -#define GPIOE_PIN6 6U -#define GPIOE_PIN7 7U -#define GPIOE_PIN8 8U -#define GPIOE_PIN9 9U -#define GPIOE_PIN10 10U -#define GPIOE_PIN11 11U -#define GPIOE_PIN12 12U -#define GPIOE_PIN13 13U -#define GPIOE_PIN14 14U -#define GPIOE_PIN15 15U - -#define GPIOF_PIN0 0U -#define GPIOF_PIN1 1U -#define GPIOF_PIN2 2U -#define GPIOF_PIN3 3U -#define GPIOF_PIN4 4U -#define GPIOF_PIN5 5U -#define GPIOF_PIN6 6U -#define GPIOF_PIN7 7U -#define GPIOF_PIN8 8U -#define GPIOF_PIN9 9U -#define GPIOF_PIN10 10U -#define GPIOF_PIN11 11U -#define GPIOF_PIN12 12U -#define GPIOF_PIN13 13U -#define GPIOF_PIN14 14U -#define GPIOF_PIN15 15U - -/* - * IO lines assignments. - */ - -#define LINE_BOOT0 PAL_LINE(GPIOB, 8U) -#define LINE_SWCLK PAL_LINE(GPIOA, 14U) -#define LINE_SWDIO PAL_LINE(GPIOA, 13U) - -/* - * I/O ports initial setup, this configuration is established soon after reset - * in the initialization code. - * Please refer to the STM32 Reference Manual for details. - */ -#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) -#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) -#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) -#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) -#define PIN_ODR_LOW(n) (0U << (n)) -#define PIN_ODR_HIGH(n) (1U << (n)) -#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) -#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) -#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) -#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) -#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) -#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) -#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) -#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) -#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) -#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) - -/* - * GPIOA setup: - * - * PA0 - COL5 - * PA1 - COL4 - * PA2 - COL3 - * PA3 - COL2 - * PA4 - COL1 - * PA5 - COL0 - * PA6 - ROW4 - * PA7 - ROW3 - * PA8 - NC - * PA9 - ROW1 - * PA10 - ROW0 - * PA11 - USB_DM - * PA12 - USB_DP - * PA13 - COL15/SWDIO (for now, COL15) - * PA14 - COL14/SWCLK (for now, COL14) - * PA15 - COL13 - */ -#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \ - PIN_MODE_INPUT(GPIOA_PIN1) | \ - PIN_MODE_INPUT(GPIOA_PIN2) | \ - PIN_MODE_INPUT(GPIOA_PIN3) | \ - PIN_MODE_INPUT(GPIOA_PIN4) | \ - PIN_MODE_INPUT(GPIOA_PIN5) | \ - PIN_MODE_INPUT(GPIOA_PIN6) | \ - PIN_MODE_INPUT(GPIOA_PIN7) | \ - PIN_MODE_INPUT(GPIOA_PIN8) | \ - PIN_MODE_INPUT(GPIOA_PIN9) | \ - PIN_MODE_INPUT(GPIOA_PIN10) | \ - PIN_MODE_INPUT(GPIOA_PIN11) | \ - PIN_MODE_INPUT(GPIOA_PIN12) | \ - PIN_MODE_INPUT(GPIOA_PIN13) | \ - PIN_MODE_INPUT(GPIOA_PIN14) | \ - PIN_MODE_INPUT(GPIOA_PIN15)) -#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) -#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \ - PIN_OSPEED_HIGH(GPIOA_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN15)) -#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOA_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOA_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN15)) -#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \ - PIN_ODR_HIGH(GPIOA_PIN1) | \ - PIN_ODR_HIGH(GPIOA_PIN2) | \ - PIN_ODR_HIGH(GPIOA_PIN3) | \ - PIN_ODR_HIGH(GPIOA_PIN4) | \ - PIN_ODR_HIGH(GPIOA_PIN5) | \ - PIN_ODR_HIGH(GPIOA_PIN6) | \ - PIN_ODR_HIGH(GPIOA_PIN7) | \ - PIN_ODR_HIGH(GPIOA_PIN8) | \ - PIN_ODR_HIGH(GPIOA_PIN9) | \ - PIN_ODR_HIGH(GPIOA_PIN10) | \ - PIN_ODR_HIGH(GPIOA_PIN11) | \ - PIN_ODR_HIGH(GPIOA_PIN12) | \ - PIN_ODR_HIGH(GPIOA_PIN13) | \ - PIN_ODR_HIGH(GPIOA_PIN14) | \ - PIN_ODR_HIGH(GPIOA_PIN15)) -#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN1, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN2, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN3, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN4, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN5, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN6, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN7, 0U)) -#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN9, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN10, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN11, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN12, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN13, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN14, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN15, 0U)) - -/* - * GPIOB setup: - * - * PB0 - ROW2 - * PB1 - RGB_D - * PB2 - PIN2 (input pullup). - * PB3 - COL12 - * PB4 - COL11 - * PB5 - COL10 - * PB6 - COL9 - * PB7 - COL8 - * PB8 - BOOT0 (set as output for STM32F042) - * PB9 - PIN9 (input pullup). - * PB10 - PIN10 (input pullup). - * PB11 - PIN11 (input pullup). - * PB12 - PIN12 (input pullup). - * PB13 - PIN13 (input pullup). - * PB14 - PIN14 (input pullup). - * PB15 - PIN15 (input pullup). - */ -#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \ - PIN_MODE_OUTPUT(GPIOB_PIN1) | \ - PIN_MODE_INPUT(GPIOB_PIN2) | \ - PIN_MODE_INPUT(GPIOB_PIN3) | \ - PIN_MODE_INPUT(GPIOB_PIN4) | \ - PIN_MODE_INPUT(GPIOB_PIN5) | \ - PIN_MODE_INPUT(GPIOB_PIN6) | \ - PIN_MODE_INPUT(GPIOB_PIN7) | \ - PIN_MODE_OUTPUT(GPIOB_PIN8) | \ - PIN_MODE_INPUT(GPIOB_PIN9) | \ - PIN_MODE_INPUT(GPIOB_PIN10) | \ - PIN_MODE_INPUT(GPIOB_PIN11) | \ - PIN_MODE_INPUT(GPIOB_PIN12) | \ - PIN_MODE_INPUT(GPIOB_PIN13) | \ - PIN_MODE_INPUT(GPIOB_PIN14) | \ - PIN_MODE_INPUT(GPIOB_PIN15)) -#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) -#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \ - PIN_OSPEED_HIGH(GPIOB_PIN1) | \ - PIN_OSPEED_HIGH(GPIOB_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \ - PIN_OSPEED_HIGH(GPIOB_PIN9) | \ - PIN_OSPEED_HIGH(GPIOB_PIN10) | \ - PIN_OSPEED_HIGH(GPIOB_PIN11) | \ - PIN_OSPEED_HIGH(GPIOB_PIN12) | \ - PIN_OSPEED_HIGH(GPIOB_PIN13) | \ - PIN_OSPEED_HIGH(GPIOB_PIN14) | \ - PIN_OSPEED_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN7) | \ - PIN_PUPDR_PULLDOWN(GPIOB_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN15)) -#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \ - PIN_ODR_HIGH(GPIOB_PIN1) | \ - PIN_ODR_HIGH(GPIOB_PIN2) | \ - PIN_ODR_HIGH(GPIOB_PIN3) | \ - PIN_ODR_HIGH(GPIOB_PIN4) | \ - PIN_ODR_HIGH(GPIOB_PIN5) | \ - PIN_ODR_HIGH(GPIOB_PIN6) | \ - PIN_ODR_HIGH(GPIOB_PIN7) | \ - PIN_ODR_HIGH(GPIOB_PIN8) | \ - PIN_ODR_HIGH(GPIOB_PIN9) | \ - PIN_ODR_HIGH(GPIOB_PIN10) | \ - PIN_ODR_HIGH(GPIOB_PIN11) | \ - PIN_ODR_HIGH(GPIOB_PIN12) | \ - PIN_ODR_HIGH(GPIOB_PIN13) | \ - PIN_ODR_HIGH(GPIOB_PIN14) | \ - PIN_ODR_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN1, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN2, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN3, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN4, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN5, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN6, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN7, 0U)) -#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN9, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN10, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN11, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN12, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN13, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN14, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN15, 0U)) - -/* - * GPIOC setup: - * - * PC0 - PIN0 (input pullup). - * PC1 - PIN1 (input pullup). - * PC2 - PIN2 (input pullup). - * PC3 - PIN3 (input pullup). - * PC4 - PIN4 (input pullup). - * PC5 - PIN5 (input pullup). - * PC6 - PIN6 (input pullup). - * PC7 - PIN7 (input pullup). - * PC8 - PIN8 (input pullup). - * PC9 - PIN9 (input pullup). - * PC10 - PIN10 (input pullup). - * PC11 - PIN11 (input pullup). - * PC12 - PIN12 (input pullup). - * PC13 - PIN13 (input pullup). - * PC14 - PIN14 (input pullup). - * PC15 - PIN15 (input pullup). - */ -#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \ - PIN_MODE_INPUT(GPIOC_PIN1) | \ - PIN_MODE_INPUT(GPIOC_PIN2) | \ - PIN_MODE_INPUT(GPIOC_PIN3) | \ - PIN_MODE_INPUT(GPIOC_PIN4) | \ - PIN_MODE_INPUT(GPIOC_PIN5) | \ - PIN_MODE_INPUT(GPIOC_PIN6) | \ - PIN_MODE_INPUT(GPIOC_PIN7) | \ - PIN_MODE_INPUT(GPIOC_PIN8) | \ - PIN_MODE_INPUT(GPIOC_PIN9) | \ - PIN_MODE_INPUT(GPIOC_PIN10) | \ - PIN_MODE_INPUT(GPIOC_PIN11) | \ - PIN_MODE_INPUT(GPIOC_PIN12) | \ - PIN_MODE_INPUT(GPIOC_PIN13) | \ - PIN_MODE_INPUT(GPIOC_PIN14) | \ - PIN_MODE_INPUT(GPIOC_PIN15)) -#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) -#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_PIN0) | \ - PIN_OSPEED_HIGH(GPIOC_PIN1) | \ - PIN_OSPEED_HIGH(GPIOC_PIN2) | \ - PIN_OSPEED_HIGH(GPIOC_PIN3) | \ - PIN_OSPEED_HIGH(GPIOC_PIN4) | \ - PIN_OSPEED_HIGH(GPIOC_PIN5) | \ - PIN_OSPEED_HIGH(GPIOC_PIN6) | \ - PIN_OSPEED_HIGH(GPIOC_PIN7) | \ - PIN_OSPEED_HIGH(GPIOC_PIN8) | \ - PIN_OSPEED_HIGH(GPIOC_PIN9) | \ - PIN_OSPEED_HIGH(GPIOC_PIN10) | \ - PIN_OSPEED_HIGH(GPIOC_PIN11) | \ - PIN_OSPEED_HIGH(GPIOC_PIN12) | \ - PIN_OSPEED_HIGH(GPIOC_PIN13) | \ - PIN_OSPEED_HIGH(GPIOC_PIN14) | \ - PIN_OSPEED_HIGH(GPIOC_PIN15)) -#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN15)) -#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \ - PIN_ODR_HIGH(GPIOC_PIN1) | \ - PIN_ODR_HIGH(GPIOC_PIN2) | \ - PIN_ODR_HIGH(GPIOC_PIN3) | \ - PIN_ODR_HIGH(GPIOC_PIN4) | \ - PIN_ODR_HIGH(GPIOC_PIN5) | \ - PIN_ODR_HIGH(GPIOC_PIN6) | \ - PIN_ODR_HIGH(GPIOC_PIN7) | \ - PIN_ODR_HIGH(GPIOC_PIN8) | \ - PIN_ODR_HIGH(GPIOC_PIN9) | \ - PIN_ODR_HIGH(GPIOC_PIN10) | \ - PIN_ODR_HIGH(GPIOC_PIN11) | \ - PIN_ODR_HIGH(GPIOC_PIN12) | \ - PIN_ODR_HIGH(GPIOC_PIN13) | \ - PIN_ODR_HIGH(GPIOC_PIN14) | \ - PIN_ODR_HIGH(GPIOC_PIN15)) -#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN1, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN2, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN3, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN4, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN5, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN6, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN7, 0U)) -#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN9, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN10, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN11, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN12, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN13, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN14, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN15, 0U)) - -/* - * GPIOD setup: - * - * PD0 - PIN0 (input pullup). - * PD1 - PIN1 (input pullup). - * PD2 - PIN2 (input pullup). - * PD3 - PIN3 (input pullup). - * PD4 - PIN4 (input pullup). - * PD5 - PIN5 (input pullup). - * PD6 - PIN6 (input pullup). - * PD7 - PIN7 (input pullup). - * PD8 - PIN8 (input pullup). - * PD9 - PIN9 (input pullup). - * PD10 - PIN10 (input pullup). - * PD11 - PIN11 (input pullup). - * PD12 - PIN12 (input pullup). - * PD13 - PIN13 (input pullup). - * PD14 - PIN14 (input pullup). - * PD15 - PIN15 (input pullup). - */ -#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ - PIN_MODE_INPUT(GPIOD_PIN1) | \ - PIN_MODE_INPUT(GPIOD_PIN2) | \ - PIN_MODE_INPUT(GPIOD_PIN3) | \ - PIN_MODE_INPUT(GPIOD_PIN4) | \ - PIN_MODE_INPUT(GPIOD_PIN5) | \ - PIN_MODE_INPUT(GPIOD_PIN6) | \ - PIN_MODE_INPUT(GPIOD_PIN7) | \ - PIN_MODE_INPUT(GPIOD_PIN8) | \ - PIN_MODE_INPUT(GPIOD_PIN9) | \ - PIN_MODE_INPUT(GPIOD_PIN10) | \ - PIN_MODE_INPUT(GPIOD_PIN11) | \ - PIN_MODE_INPUT(GPIOD_PIN12) | \ - PIN_MODE_INPUT(GPIOD_PIN13) | \ - PIN_MODE_INPUT(GPIOD_PIN14) | \ - PIN_MODE_INPUT(GPIOD_PIN15)) -#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) -#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \ - PIN_OSPEED_HIGH(GPIOD_PIN1) | \ - PIN_OSPEED_HIGH(GPIOD_PIN2) | \ - PIN_OSPEED_HIGH(GPIOD_PIN3) | \ - PIN_OSPEED_HIGH(GPIOD_PIN4) | \ - PIN_OSPEED_HIGH(GPIOD_PIN5) | \ - PIN_OSPEED_HIGH(GPIOD_PIN6) | \ - PIN_OSPEED_HIGH(GPIOD_PIN7) | \ - PIN_OSPEED_HIGH(GPIOD_PIN8) | \ - PIN_OSPEED_HIGH(GPIOD_PIN9) | \ - PIN_OSPEED_HIGH(GPIOD_PIN10) | \ - PIN_OSPEED_HIGH(GPIOD_PIN11) | \ - PIN_OSPEED_HIGH(GPIOD_PIN12) | \ - PIN_OSPEED_HIGH(GPIOD_PIN13) | \ - PIN_OSPEED_HIGH(GPIOD_PIN14) | \ - PIN_OSPEED_HIGH(GPIOD_PIN15)) -#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN15)) -#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ - PIN_ODR_HIGH(GPIOD_PIN1) | \ - PIN_ODR_HIGH(GPIOD_PIN2) | \ - PIN_ODR_HIGH(GPIOD_PIN3) | \ - PIN_ODR_HIGH(GPIOD_PIN4) | \ - PIN_ODR_HIGH(GPIOD_PIN5) | \ - PIN_ODR_HIGH(GPIOD_PIN6) | \ - PIN_ODR_HIGH(GPIOD_PIN7) | \ - PIN_ODR_HIGH(GPIOD_PIN8) | \ - PIN_ODR_HIGH(GPIOD_PIN9) | \ - PIN_ODR_HIGH(GPIOD_PIN10) | \ - PIN_ODR_HIGH(GPIOD_PIN11) | \ - PIN_ODR_HIGH(GPIOD_PIN12) | \ - PIN_ODR_HIGH(GPIOD_PIN13) | \ - PIN_ODR_HIGH(GPIOD_PIN14) | \ - PIN_ODR_HIGH(GPIOD_PIN15)) -#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN1, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN2, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN3, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN4, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN5, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN6, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN7, 0U)) -#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN9, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN10, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN11, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN12, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN13, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN14, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN15, 0U)) - -/* - * GPIOE setup: - * - * PE0 - PIN0 (input pullup). - * PE1 - PIN1 (input pullup). - * PE2 - PIN2 (input pullup). - * PE3 - PIN3 (input pullup). - * PE4 - PIN4 (input pullup). - * PE5 - PIN5 (input pullup). - * PE6 - PIN6 (input pullup). - * PE7 - PIN7 (input pullup). - * PE8 - PIN8 (input pullup). - * PE9 - PIN9 (input pullup). - * PE10 - PIN10 (input pullup). - * PE11 - PIN11 (input pullup). - * PE12 - PIN12 (input pullup). - * PE13 - PIN13 (input pullup). - * PE14 - PIN14 (input pullup). - * PE15 - PIN15 (input pullup). - */ -#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \ - PIN_MODE_INPUT(GPIOE_PIN1) | \ - PIN_MODE_INPUT(GPIOE_PIN2) | \ - PIN_MODE_INPUT(GPIOE_PIN3) | \ - PIN_MODE_INPUT(GPIOE_PIN4) | \ - PIN_MODE_INPUT(GPIOE_PIN5) | \ - PIN_MODE_INPUT(GPIOE_PIN6) | \ - PIN_MODE_INPUT(GPIOE_PIN7) | \ - PIN_MODE_INPUT(GPIOE_PIN8) | \ - PIN_MODE_INPUT(GPIOE_PIN9) | \ - PIN_MODE_INPUT(GPIOE_PIN10) | \ - PIN_MODE_INPUT(GPIOE_PIN11) | \ - PIN_MODE_INPUT(GPIOE_PIN12) | \ - PIN_MODE_INPUT(GPIOE_PIN13) | \ - PIN_MODE_INPUT(GPIOE_PIN14) | \ - PIN_MODE_INPUT(GPIOE_PIN15)) -#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) -#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_PIN0) | \ - PIN_OSPEED_HIGH(GPIOE_PIN1) | \ - PIN_OSPEED_HIGH(GPIOE_PIN2) | \ - PIN_OSPEED_HIGH(GPIOE_PIN3) | \ - PIN_OSPEED_HIGH(GPIOE_PIN4) | \ - PIN_OSPEED_HIGH(GPIOE_PIN5) | \ - PIN_OSPEED_HIGH(GPIOE_PIN6) | \ - PIN_OSPEED_HIGH(GPIOE_PIN7) | \ - PIN_OSPEED_HIGH(GPIOE_PIN8) | \ - PIN_OSPEED_HIGH(GPIOE_PIN9) | \ - PIN_OSPEED_HIGH(GPIOE_PIN10) | \ - PIN_OSPEED_HIGH(GPIOE_PIN11) | \ - PIN_OSPEED_HIGH(GPIOE_PIN12) | \ - PIN_OSPEED_HIGH(GPIOE_PIN13) | \ - PIN_OSPEED_HIGH(GPIOE_PIN14) | \ - PIN_OSPEED_HIGH(GPIOE_PIN15)) -#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN15)) -#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \ - PIN_ODR_HIGH(GPIOE_PIN1) | \ - PIN_ODR_HIGH(GPIOE_PIN2) | \ - PIN_ODR_HIGH(GPIOE_PIN3) | \ - PIN_ODR_HIGH(GPIOE_PIN4) | \ - PIN_ODR_HIGH(GPIOE_PIN5) | \ - PIN_ODR_HIGH(GPIOE_PIN6) | \ - PIN_ODR_HIGH(GPIOE_PIN7) | \ - PIN_ODR_HIGH(GPIOE_PIN8) | \ - PIN_ODR_HIGH(GPIOE_PIN9) | \ - PIN_ODR_HIGH(GPIOE_PIN10) | \ - PIN_ODR_HIGH(GPIOE_PIN11) | \ - PIN_ODR_HIGH(GPIOE_PIN12) | \ - PIN_ODR_HIGH(GPIOE_PIN13) | \ - PIN_ODR_HIGH(GPIOE_PIN14) | \ - PIN_ODR_HIGH(GPIOE_PIN15)) -#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN1, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN2, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN3, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN4, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN5, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN6, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN7, 0U)) -#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN9, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN10, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN11, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN12, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN13, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN14, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN15, 0U)) - -/* - * GPIOF setup: - * - * PF0 - COL7 - * PF1 - COL6 - * PF2 - PIN2 (input pullup). - * PF3 - PIN3 (input pullup). - * PF4 - PIN4 (input pullup). - * PF5 - PIN5 (input pullup). - * PF6 - PIN6 (input pullup). - * PF7 - PIN7 (input pullup). - * PF8 - PIN8 (input pullup). - * PF9 - PIN9 (input pullup). - * PF10 - PIN10 (input pullup). - * PF11 - PIN11 (input pullup). - * PF12 - PIN12 (input pullup). - * PF13 - PIN13 (input pullup). - * PF14 - PIN14 (input pullup). - * PF15 - PIN15 (input pullup). - */ -#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \ - PIN_MODE_INPUT(GPIOF_PIN1) | \ - PIN_MODE_INPUT(GPIOF_PIN2) | \ - PIN_MODE_INPUT(GPIOF_PIN3) | \ - PIN_MODE_INPUT(GPIOF_PIN4) | \ - PIN_MODE_INPUT(GPIOF_PIN5) | \ - PIN_MODE_INPUT(GPIOF_PIN6) | \ - PIN_MODE_INPUT(GPIOF_PIN7) | \ - PIN_MODE_INPUT(GPIOF_PIN8) | \ - PIN_MODE_INPUT(GPIOF_PIN9) | \ - PIN_MODE_INPUT(GPIOF_PIN10) | \ - PIN_MODE_INPUT(GPIOF_PIN11) | \ - PIN_MODE_INPUT(GPIOF_PIN12) | \ - PIN_MODE_INPUT(GPIOF_PIN13) | \ - PIN_MODE_INPUT(GPIOF_PIN14) | \ - PIN_MODE_INPUT(GPIOF_PIN15)) -#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) -#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOF_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN1) | \ - PIN_OSPEED_HIGH(GPIOF_PIN2) | \ - PIN_OSPEED_HIGH(GPIOF_PIN3) | \ - PIN_OSPEED_HIGH(GPIOF_PIN4) | \ - PIN_OSPEED_HIGH(GPIOF_PIN5) | \ - PIN_OSPEED_HIGH(GPIOF_PIN6) | \ - PIN_OSPEED_HIGH(GPIOF_PIN7) | \ - PIN_OSPEED_HIGH(GPIOF_PIN8) | \ - PIN_OSPEED_HIGH(GPIOF_PIN9) | \ - PIN_OSPEED_HIGH(GPIOF_PIN10) | \ - PIN_OSPEED_HIGH(GPIOF_PIN11) | \ - PIN_OSPEED_HIGH(GPIOF_PIN12) | \ - PIN_OSPEED_HIGH(GPIOF_PIN13) | \ - PIN_OSPEED_HIGH(GPIOF_PIN14) | \ - PIN_OSPEED_HIGH(GPIOF_PIN15)) -#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN15)) -#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | \ - PIN_ODR_HIGH(GPIOF_PIN1) | \ - PIN_ODR_HIGH(GPIOF_PIN2) | \ - PIN_ODR_HIGH(GPIOF_PIN3) | \ - PIN_ODR_HIGH(GPIOF_PIN4) | \ - PIN_ODR_HIGH(GPIOF_PIN5) | \ - PIN_ODR_HIGH(GPIOF_PIN6) | \ - PIN_ODR_HIGH(GPIOF_PIN7) | \ - PIN_ODR_HIGH(GPIOF_PIN8) | \ - PIN_ODR_HIGH(GPIOF_PIN9) | \ - PIN_ODR_HIGH(GPIOF_PIN10) | \ - PIN_ODR_HIGH(GPIOF_PIN11) | \ - PIN_ODR_HIGH(GPIOF_PIN12) | \ - PIN_ODR_HIGH(GPIOF_PIN13) | \ - PIN_ODR_HIGH(GPIOF_PIN14) | \ - PIN_ODR_HIGH(GPIOF_PIN15)) -#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN1, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN2, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN3, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN4, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN5, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN6, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN7, 0U)) -#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN9, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN10, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN11, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN12, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN13, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN15, 0U)) - -#if !defined(_FROM_ASM_) -#ifdef __cplusplus -extern "C" { -#endif - void boardInit(void); -#ifdef __cplusplus -} -#endif -#endif /* _FROM_ASM_ */ - -#endif /* _BOARD_H */ diff --git a/keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.mk b/keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.mk deleted file mode 100644 index bbeb5bbff..000000000 --- a/keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files. -BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F042X6/board.c - -# Required include directories -BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F042X6 diff --git a/keyboards/peiorisboards/ixora/bootloader_defs.h b/keyboards/peiorisboards/ixora/bootloader_defs.h deleted file mode 100644 index 4994be9c2..000000000 --- a/keyboards/peiorisboards/ixora/bootloader_defs.h +++ /dev/null @@ -1,7 +0,0 @@ -/* Address for jumping to bootloader on STM32 chips. */ -/* It is chip dependent, the correct number can be looked up here: - * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf - * This also requires a patch to chibios: - * /tmk_core/tool/chibios/ch-bootloader-jump.patch - */ -#define STM32_BOOTLOADER_ADDRESS 0x1FFFC400 \ No newline at end of file diff --git a/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.c b/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.c deleted file mode 100644 index 754dc5c4d..000000000 --- a/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.c +++ /dev/null @@ -1,268 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * This file has been automatically generated using ChibiStudio board - * generator plugin. Do not edit manually. - */ - -#include "hal.h" -#include "stm32_gpio.h" - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/** - * @brief Type of STM32 GPIO port setup. - */ -typedef struct { - uint32_t moder; - uint32_t otyper; - uint32_t ospeedr; - uint32_t pupdr; - uint32_t odr; - uint32_t afrl; - uint32_t afrh; -} gpio_setup_t; - -/** - * @brief Type of STM32 GPIO initialization data. - */ -typedef struct { -#if STM32_HAS_GPIOA || defined(__DOXYGEN__) - gpio_setup_t PAData; -#endif -#if STM32_HAS_GPIOB || defined(__DOXYGEN__) - gpio_setup_t PBData; -#endif -#if STM32_HAS_GPIOC || defined(__DOXYGEN__) - gpio_setup_t PCData; -#endif -#if STM32_HAS_GPIOD || defined(__DOXYGEN__) - gpio_setup_t PDData; -#endif -#if STM32_HAS_GPIOE || defined(__DOXYGEN__) - gpio_setup_t PEData; -#endif -#if STM32_HAS_GPIOF || defined(__DOXYGEN__) - gpio_setup_t PFData; -#endif -#if STM32_HAS_GPIOG || defined(__DOXYGEN__) - gpio_setup_t PGData; -#endif -#if STM32_HAS_GPIOH || defined(__DOXYGEN__) - gpio_setup_t PHData; -#endif -#if STM32_HAS_GPIOI || defined(__DOXYGEN__) - gpio_setup_t PIData; -#endif -#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) - gpio_setup_t PJData; -#endif -#if STM32_HAS_GPIOK || defined(__DOXYGEN__) - gpio_setup_t PKData; -#endif -} gpio_config_t; - -/** - * @brief STM32 GPIO static initialization data. - */ -static const gpio_config_t gpio_default_config = { -#if STM32_HAS_GPIOA - {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, - VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, -#endif -#if STM32_HAS_GPIOB - {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, - VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, -#endif -#if STM32_HAS_GPIOC - {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, - VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, -#endif -#if STM32_HAS_GPIOD - {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, - VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, -#endif -#if STM32_HAS_GPIOE - {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, - VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, -#endif -#if STM32_HAS_GPIOF - {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, - VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, -#endif -#if STM32_HAS_GPIOG - {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, - VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, -#endif -#if STM32_HAS_GPIOH - {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, - VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, -#endif -#if STM32_HAS_GPIOI - {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, -#endif -#if STM32_HAS_GPIOJ - {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, - VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, -#endif -#if STM32_HAS_GPIOK - {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, - VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} -#endif -}; - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { - - gpiop->OTYPER = config->otyper; - gpiop->OSPEEDR = config->ospeedr; - gpiop->PUPDR = config->pupdr; - gpiop->ODR = config->odr; - gpiop->AFRL = config->afrl; - gpiop->AFRH = config->afrh; - gpiop->MODER = config->moder; -} - -static void stm32_gpio_init(void) { - - /* Enabling GPIO-related clocks, the mask comes from the - registry header file.*/ - rccResetAHB(STM32_GPIO_EN_MASK); - rccEnableAHB(STM32_GPIO_EN_MASK, true); - - /* Initializing all the defined GPIO ports.*/ -#if STM32_HAS_GPIOA - gpio_init(GPIOA, &gpio_default_config.PAData); -#endif -#if STM32_HAS_GPIOB - gpio_init(GPIOB, &gpio_default_config.PBData); -#endif -#if STM32_HAS_GPIOC - gpio_init(GPIOC, &gpio_default_config.PCData); -#endif -#if STM32_HAS_GPIOD - gpio_init(GPIOD, &gpio_default_config.PDData); -#endif -#if STM32_HAS_GPIOE - gpio_init(GPIOE, &gpio_default_config.PEData); -#endif -#if STM32_HAS_GPIOF - gpio_init(GPIOF, &gpio_default_config.PFData); -#endif -#if STM32_HAS_GPIOG - gpio_init(GPIOG, &gpio_default_config.PGData); -#endif -#if STM32_HAS_GPIOH - gpio_init(GPIOH, &gpio_default_config.PHData); -#endif -#if STM32_HAS_GPIOI - gpio_init(GPIOI, &gpio_default_config.PIData); -#endif -#if STM32_HAS_GPIOJ - gpio_init(GPIOJ, &gpio_default_config.PJData); -#endif -#if STM32_HAS_GPIOK - gpio_init(GPIOK, &gpio_default_config.PKData); -#endif -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Early initialization code. - * @details GPIO ports and system clocks are initialized before everything - * else. - */ -void __early_init(void) { - extern void enter_bootloader_mode_if_requested(void); - enter_bootloader_mode_if_requested(); - - stm32_gpio_init(); - stm32_clock_init(); -} - -#if HAL_USE_SDC || defined(__DOXYGEN__) -/** - * @brief SDC card detection. - */ -bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief SDC card write protection detection. - */ -bool sdc_lld_is_write_protected(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif /* HAL_USE_SDC */ - -#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) -/** - * @brief MMC_SPI card detection. - */ -bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief MMC_SPI card write protection detection. - */ -bool mmc_lld_is_write_protected(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif - -/** - * @brief Board-specific initialization code. - * @todo Add your board-specific code, if any. - */ -void boardInit(void) { - -} diff --git a/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.h b/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.h deleted file mode 100644 index 241d566af..000000000 --- a/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.h +++ /dev/null @@ -1,896 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ -#ifndef _BOARD_H -#define _BOARD_H - -/* - * Setup for STMicroelectronics STM32 Nucleo32-F042K6 board. - */ - -/* - * Board identifier. - */ -#define BOARD_GENERIC_STM32_F042X6 -#define BOARD_NAME "Vinta PCB" - -/* - * Board oscillators-related settings. - * NOTE: LSE not fitted. - * NOTE: HSE not fitted. - */ -#if !defined(STM32_LSECLK) -#define STM32_LSECLK 0U -#endif - -#define STM32_LSEDRV (3U << 3U) - -#if !defined(STM32_HSECLK) -#define STM32_HSECLK 0U -#endif - -/* - * MCU type as defined in the ST header. - */ -#define STM32F042x6 - -/* - * IO pins assignments. - */ -#define GPIOA_PIN0 0U -#define GPIOA_PIN1 1U -#define GPIOA_PIN2 2U -#define GPIOA_PIN3 3U -#define GPIOA_PIN4 4U -#define GPIOA_PIN5 5U -#define GPIOA_PIN6 6U -#define GPIOA_PIN7 7U -#define GPIOA_PIN8 8U -#define GPIOA_PIN9 9U -#define GPIOA_PIN10 10U -#define GPIOA_PIN11 11U -#define GPIOA_PIN12 12U -#define GPIOA_PIN13 13U -#define GPIOA_PIN14 14U -#define GPIOA_PIN15 15U - -#define GPIOB_PIN0 0U -#define GPIOB_PIN1 1U -#define GPIOB_PIN2 2U -#define GPIOB_PIN3 3U -#define GPIOB_PIN4 4U -#define GPIOB_PIN5 5U -#define GPIOB_PIN6 6U -#define GPIOB_PIN7 7U -#define GPIOB_PIN8 8U -#define GPIOB_PIN9 9U -#define GPIOB_PIN10 10U -#define GPIOB_PIN11 11U -#define GPIOB_PIN12 12U -#define GPIOB_PIN13 13U -#define GPIOB_PIN14 14U -#define GPIOB_PIN15 15U - -#define GPIOC_PIN0 0U -#define GPIOC_PIN1 1U -#define GPIOC_PIN2 2U -#define GPIOC_PIN3 3U -#define GPIOC_PIN4 4U -#define GPIOC_PIN5 5U -#define GPIOC_PIN6 6U -#define GPIOC_PIN7 7U -#define GPIOC_PIN8 8U -#define GPIOC_PIN9 9U -#define GPIOC_PIN10 10U -#define GPIOC_PIN11 11U -#define GPIOC_PIN12 12U -#define GPIOC_PIN13 13U -#define GPIOC_PIN14 14U -#define GPIOC_PIN15 15U - -#define GPIOD_PIN0 0U -#define GPIOD_PIN1 1U -#define GPIOD_PIN2 2U -#define GPIOD_PIN3 3U -#define GPIOD_PIN4 4U -#define GPIOD_PIN5 5U -#define GPIOD_PIN6 6U -#define GPIOD_PIN7 7U -#define GPIOD_PIN8 8U -#define GPIOD_PIN9 9U -#define GPIOD_PIN10 10U -#define GPIOD_PIN11 11U -#define GPIOD_PIN12 12U -#define GPIOD_PIN13 13U -#define GPIOD_PIN14 14U -#define GPIOD_PIN15 15U - -#define GPIOE_PIN0 0U -#define GPIOE_PIN1 1U -#define GPIOE_PIN2 2U -#define GPIOE_PIN3 3U -#define GPIOE_PIN4 4U -#define GPIOE_PIN5 5U -#define GPIOE_PIN6 6U -#define GPIOE_PIN7 7U -#define GPIOE_PIN8 8U -#define GPIOE_PIN9 9U -#define GPIOE_PIN10 10U -#define GPIOE_PIN11 11U -#define GPIOE_PIN12 12U -#define GPIOE_PIN13 13U -#define GPIOE_PIN14 14U -#define GPIOE_PIN15 15U - -#define GPIOF_PIN0 0U -#define GPIOF_PIN1 1U -#define GPIOF_PIN2 2U -#define GPIOF_PIN3 3U -#define GPIOF_PIN4 4U -#define GPIOF_PIN5 5U -#define GPIOF_PIN6 6U -#define GPIOF_PIN7 7U -#define GPIOF_PIN8 8U -#define GPIOF_PIN9 9U -#define GPIOF_PIN10 10U -#define GPIOF_PIN11 11U -#define GPIOF_PIN12 12U -#define GPIOF_PIN13 13U -#define GPIOF_PIN14 14U -#define GPIOF_PIN15 15U - -/* - * IO lines assignments. - */ - -#define LINE_BOOT0 PAL_LINE(GPIOB, 8U) -#define LINE_SWCLK PAL_LINE(GPIOA, 14U) -#define LINE_SWDIO PAL_LINE(GPIOA, 13U) - -/* - * I/O ports initial setup, this configuration is established soon after reset - * in the initialization code. - * Please refer to the STM32 Reference Manual for details. - */ -#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) -#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) -#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) -#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) -#define PIN_ODR_LOW(n) (0U << (n)) -#define PIN_ODR_HIGH(n) (1U << (n)) -#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) -#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) -#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) -#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) -#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) -#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) -#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) -#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) -#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) -#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) - -/* - * GPIOA setup: - * - * PA0 - COL5 - * PA1 - COL4 - * PA2 - COL3 - * PA3 - COL2 - * PA4 - COL1 - * PA5 - COL0 - * PA6 - ROW4 - * PA7 - ROW3 - * PA8 - NC - * PA9 - ROW1 - * PA10 - ROW0 - * PA11 - USB_DM - * PA12 - USB_DP - * PA13 - COL15/SWDIO (for now, COL15) - * PA14 - COL14/SWCLK (for now, COL14) - * PA15 - COL13 - */ -#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \ - PIN_MODE_INPUT(GPIOA_PIN1) | \ - PIN_MODE_INPUT(GPIOA_PIN2) | \ - PIN_MODE_INPUT(GPIOA_PIN3) | \ - PIN_MODE_INPUT(GPIOA_PIN4) | \ - PIN_MODE_INPUT(GPIOA_PIN5) | \ - PIN_MODE_INPUT(GPIOA_PIN6) | \ - PIN_MODE_INPUT(GPIOA_PIN7) | \ - PIN_MODE_INPUT(GPIOA_PIN8) | \ - PIN_MODE_INPUT(GPIOA_PIN9) | \ - PIN_MODE_INPUT(GPIOA_PIN10) | \ - PIN_MODE_INPUT(GPIOA_PIN11) | \ - PIN_MODE_INPUT(GPIOA_PIN12) | \ - PIN_MODE_INPUT(GPIOA_PIN13) | \ - PIN_MODE_INPUT(GPIOA_PIN14) | \ - PIN_MODE_INPUT(GPIOA_PIN15)) -#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) -#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \ - PIN_OSPEED_HIGH(GPIOA_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN15)) -#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOA_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOA_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN15)) -#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \ - PIN_ODR_HIGH(GPIOA_PIN1) | \ - PIN_ODR_HIGH(GPIOA_PIN2) | \ - PIN_ODR_HIGH(GPIOA_PIN3) | \ - PIN_ODR_HIGH(GPIOA_PIN4) | \ - PIN_ODR_HIGH(GPIOA_PIN5) | \ - PIN_ODR_HIGH(GPIOA_PIN6) | \ - PIN_ODR_HIGH(GPIOA_PIN7) | \ - PIN_ODR_HIGH(GPIOA_PIN8) | \ - PIN_ODR_HIGH(GPIOA_PIN9) | \ - PIN_ODR_HIGH(GPIOA_PIN10) | \ - PIN_ODR_HIGH(GPIOA_PIN11) | \ - PIN_ODR_HIGH(GPIOA_PIN12) | \ - PIN_ODR_HIGH(GPIOA_PIN13) | \ - PIN_ODR_HIGH(GPIOA_PIN14) | \ - PIN_ODR_HIGH(GPIOA_PIN15)) -#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN1, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN2, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN3, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN4, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN5, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN6, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN7, 0U)) -#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN9, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN10, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN11, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN12, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN13, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN14, 0U) | \ - PIN_AFIO_AF(GPIOA_PIN15, 0U)) - -/* - * GPIOB setup: - * - * PB0 - ROW2 - * PB1 - RGB_D - * PB2 - PIN2 (input pullup). - * PB3 - COL12 - * PB4 - COL11 - * PB5 - COL10 - * PB6 - COL9 - * PB7 - COL8 - * PB8 - BOOT0 (set as output for STM32F042) - * PB9 - PIN9 (input pullup). - * PB10 - PIN10 (input pullup). - * PB11 - PIN11 (input pullup). - * PB12 - PIN12 (input pullup). - * PB13 - PIN13 (input pullup). - * PB14 - PIN14 (input pullup). - * PB15 - PIN15 (input pullup). - */ -#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \ - PIN_MODE_OUTPUT(GPIOB_PIN1) | \ - PIN_MODE_INPUT(GPIOB_PIN2) | \ - PIN_MODE_INPUT(GPIOB_PIN3) | \ - PIN_MODE_INPUT(GPIOB_PIN4) | \ - PIN_MODE_INPUT(GPIOB_PIN5) | \ - PIN_MODE_INPUT(GPIOB_PIN6) | \ - PIN_MODE_INPUT(GPIOB_PIN7) | \ - PIN_MODE_OUTPUT(GPIOB_PIN8) | \ - PIN_MODE_INPUT(GPIOB_PIN9) | \ - PIN_MODE_INPUT(GPIOB_PIN10) | \ - PIN_MODE_INPUT(GPIOB_PIN11) | \ - PIN_MODE_INPUT(GPIOB_PIN12) | \ - PIN_MODE_INPUT(GPIOB_PIN13) | \ - PIN_MODE_INPUT(GPIOB_PIN14) | \ - PIN_MODE_INPUT(GPIOB_PIN15)) -#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) -#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \ - PIN_OSPEED_HIGH(GPIOB_PIN1) | \ - PIN_OSPEED_HIGH(GPIOB_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \ - PIN_OSPEED_HIGH(GPIOB_PIN9) | \ - PIN_OSPEED_HIGH(GPIOB_PIN10) | \ - PIN_OSPEED_HIGH(GPIOB_PIN11) | \ - PIN_OSPEED_HIGH(GPIOB_PIN12) | \ - PIN_OSPEED_HIGH(GPIOB_PIN13) | \ - PIN_OSPEED_HIGH(GPIOB_PIN14) | \ - PIN_OSPEED_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN7) | \ - PIN_PUPDR_PULLDOWN(GPIOB_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN15)) -#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \ - PIN_ODR_HIGH(GPIOB_PIN1) | \ - PIN_ODR_HIGH(GPIOB_PIN2) | \ - PIN_ODR_HIGH(GPIOB_PIN3) | \ - PIN_ODR_HIGH(GPIOB_PIN4) | \ - PIN_ODR_HIGH(GPIOB_PIN5) | \ - PIN_ODR_HIGH(GPIOB_PIN6) | \ - PIN_ODR_HIGH(GPIOB_PIN7) | \ - PIN_ODR_HIGH(GPIOB_PIN8) | \ - PIN_ODR_HIGH(GPIOB_PIN9) | \ - PIN_ODR_HIGH(GPIOB_PIN10) | \ - PIN_ODR_HIGH(GPIOB_PIN11) | \ - PIN_ODR_HIGH(GPIOB_PIN12) | \ - PIN_ODR_HIGH(GPIOB_PIN13) | \ - PIN_ODR_HIGH(GPIOB_PIN14) | \ - PIN_ODR_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN1, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN2, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN3, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN4, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN5, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN6, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN7, 0U)) -#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN9, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN10, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN11, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN12, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN13, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN14, 0U) | \ - PIN_AFIO_AF(GPIOB_PIN15, 0U)) - -/* - * GPIOC setup: - * - * PC0 - PIN0 (input pullup). - * PC1 - PIN1 (input pullup). - * PC2 - PIN2 (input pullup). - * PC3 - PIN3 (input pullup). - * PC4 - PIN4 (input pullup). - * PC5 - PIN5 (input pullup). - * PC6 - PIN6 (input pullup). - * PC7 - PIN7 (input pullup). - * PC8 - PIN8 (input pullup). - * PC9 - PIN9 (input pullup). - * PC10 - PIN10 (input pullup). - * PC11 - PIN11 (input pullup). - * PC12 - PIN12 (input pullup). - * PC13 - PIN13 (input pullup). - * PC14 - PIN14 (input pullup). - * PC15 - PIN15 (input pullup). - */ -#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \ - PIN_MODE_INPUT(GPIOC_PIN1) | \ - PIN_MODE_INPUT(GPIOC_PIN2) | \ - PIN_MODE_INPUT(GPIOC_PIN3) | \ - PIN_MODE_INPUT(GPIOC_PIN4) | \ - PIN_MODE_INPUT(GPIOC_PIN5) | \ - PIN_MODE_INPUT(GPIOC_PIN6) | \ - PIN_MODE_INPUT(GPIOC_PIN7) | \ - PIN_MODE_INPUT(GPIOC_PIN8) | \ - PIN_MODE_INPUT(GPIOC_PIN9) | \ - PIN_MODE_INPUT(GPIOC_PIN10) | \ - PIN_MODE_INPUT(GPIOC_PIN11) | \ - PIN_MODE_INPUT(GPIOC_PIN12) | \ - PIN_MODE_INPUT(GPIOC_PIN13) | \ - PIN_MODE_INPUT(GPIOC_PIN14) | \ - PIN_MODE_INPUT(GPIOC_PIN15)) -#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) -#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_PIN0) | \ - PIN_OSPEED_HIGH(GPIOC_PIN1) | \ - PIN_OSPEED_HIGH(GPIOC_PIN2) | \ - PIN_OSPEED_HIGH(GPIOC_PIN3) | \ - PIN_OSPEED_HIGH(GPIOC_PIN4) | \ - PIN_OSPEED_HIGH(GPIOC_PIN5) | \ - PIN_OSPEED_HIGH(GPIOC_PIN6) | \ - PIN_OSPEED_HIGH(GPIOC_PIN7) | \ - PIN_OSPEED_HIGH(GPIOC_PIN8) | \ - PIN_OSPEED_HIGH(GPIOC_PIN9) | \ - PIN_OSPEED_HIGH(GPIOC_PIN10) | \ - PIN_OSPEED_HIGH(GPIOC_PIN11) | \ - PIN_OSPEED_HIGH(GPIOC_PIN12) | \ - PIN_OSPEED_HIGH(GPIOC_PIN13) | \ - PIN_OSPEED_HIGH(GPIOC_PIN14) | \ - PIN_OSPEED_HIGH(GPIOC_PIN15)) -#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN15)) -#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \ - PIN_ODR_HIGH(GPIOC_PIN1) | \ - PIN_ODR_HIGH(GPIOC_PIN2) | \ - PIN_ODR_HIGH(GPIOC_PIN3) | \ - PIN_ODR_HIGH(GPIOC_PIN4) | \ - PIN_ODR_HIGH(GPIOC_PIN5) | \ - PIN_ODR_HIGH(GPIOC_PIN6) | \ - PIN_ODR_HIGH(GPIOC_PIN7) | \ - PIN_ODR_HIGH(GPIOC_PIN8) | \ - PIN_ODR_HIGH(GPIOC_PIN9) | \ - PIN_ODR_HIGH(GPIOC_PIN10) | \ - PIN_ODR_HIGH(GPIOC_PIN11) | \ - PIN_ODR_HIGH(GPIOC_PIN12) | \ - PIN_ODR_HIGH(GPIOC_PIN13) | \ - PIN_ODR_HIGH(GPIOC_PIN14) | \ - PIN_ODR_HIGH(GPIOC_PIN15)) -#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN1, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN2, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN3, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN4, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN5, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN6, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN7, 0U)) -#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN9, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN10, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN11, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN12, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN13, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN14, 0U) | \ - PIN_AFIO_AF(GPIOC_PIN15, 0U)) - -/* - * GPIOD setup: - * - * PD0 - PIN0 (input pullup). - * PD1 - PIN1 (input pullup). - * PD2 - PIN2 (input pullup). - * PD3 - PIN3 (input pullup). - * PD4 - PIN4 (input pullup). - * PD5 - PIN5 (input pullup). - * PD6 - PIN6 (input pullup). - * PD7 - PIN7 (input pullup). - * PD8 - PIN8 (input pullup). - * PD9 - PIN9 (input pullup). - * PD10 - PIN10 (input pullup). - * PD11 - PIN11 (input pullup). - * PD12 - PIN12 (input pullup). - * PD13 - PIN13 (input pullup). - * PD14 - PIN14 (input pullup). - * PD15 - PIN15 (input pullup). - */ -#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ - PIN_MODE_INPUT(GPIOD_PIN1) | \ - PIN_MODE_INPUT(GPIOD_PIN2) | \ - PIN_MODE_INPUT(GPIOD_PIN3) | \ - PIN_MODE_INPUT(GPIOD_PIN4) | \ - PIN_MODE_INPUT(GPIOD_PIN5) | \ - PIN_MODE_INPUT(GPIOD_PIN6) | \ - PIN_MODE_INPUT(GPIOD_PIN7) | \ - PIN_MODE_INPUT(GPIOD_PIN8) | \ - PIN_MODE_INPUT(GPIOD_PIN9) | \ - PIN_MODE_INPUT(GPIOD_PIN10) | \ - PIN_MODE_INPUT(GPIOD_PIN11) | \ - PIN_MODE_INPUT(GPIOD_PIN12) | \ - PIN_MODE_INPUT(GPIOD_PIN13) | \ - PIN_MODE_INPUT(GPIOD_PIN14) | \ - PIN_MODE_INPUT(GPIOD_PIN15)) -#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) -#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \ - PIN_OSPEED_HIGH(GPIOD_PIN1) | \ - PIN_OSPEED_HIGH(GPIOD_PIN2) | \ - PIN_OSPEED_HIGH(GPIOD_PIN3) | \ - PIN_OSPEED_HIGH(GPIOD_PIN4) | \ - PIN_OSPEED_HIGH(GPIOD_PIN5) | \ - PIN_OSPEED_HIGH(GPIOD_PIN6) | \ - PIN_OSPEED_HIGH(GPIOD_PIN7) | \ - PIN_OSPEED_HIGH(GPIOD_PIN8) | \ - PIN_OSPEED_HIGH(GPIOD_PIN9) | \ - PIN_OSPEED_HIGH(GPIOD_PIN10) | \ - PIN_OSPEED_HIGH(GPIOD_PIN11) | \ - PIN_OSPEED_HIGH(GPIOD_PIN12) | \ - PIN_OSPEED_HIGH(GPIOD_PIN13) | \ - PIN_OSPEED_HIGH(GPIOD_PIN14) | \ - PIN_OSPEED_HIGH(GPIOD_PIN15)) -#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN15)) -#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ - PIN_ODR_HIGH(GPIOD_PIN1) | \ - PIN_ODR_HIGH(GPIOD_PIN2) | \ - PIN_ODR_HIGH(GPIOD_PIN3) | \ - PIN_ODR_HIGH(GPIOD_PIN4) | \ - PIN_ODR_HIGH(GPIOD_PIN5) | \ - PIN_ODR_HIGH(GPIOD_PIN6) | \ - PIN_ODR_HIGH(GPIOD_PIN7) | \ - PIN_ODR_HIGH(GPIOD_PIN8) | \ - PIN_ODR_HIGH(GPIOD_PIN9) | \ - PIN_ODR_HIGH(GPIOD_PIN10) | \ - PIN_ODR_HIGH(GPIOD_PIN11) | \ - PIN_ODR_HIGH(GPIOD_PIN12) | \ - PIN_ODR_HIGH(GPIOD_PIN13) | \ - PIN_ODR_HIGH(GPIOD_PIN14) | \ - PIN_ODR_HIGH(GPIOD_PIN15)) -#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN1, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN2, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN3, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN4, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN5, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN6, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN7, 0U)) -#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN9, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN10, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN11, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN12, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN13, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN14, 0U) | \ - PIN_AFIO_AF(GPIOD_PIN15, 0U)) - -/* - * GPIOE setup: - * - * PE0 - PIN0 (input pullup). - * PE1 - PIN1 (input pullup). - * PE2 - PIN2 (input pullup). - * PE3 - PIN3 (input pullup). - * PE4 - PIN4 (input pullup). - * PE5 - PIN5 (input pullup). - * PE6 - PIN6 (input pullup). - * PE7 - PIN7 (input pullup). - * PE8 - PIN8 (input pullup). - * PE9 - PIN9 (input pullup). - * PE10 - PIN10 (input pullup). - * PE11 - PIN11 (input pullup). - * PE12 - PIN12 (input pullup). - * PE13 - PIN13 (input pullup). - * PE14 - PIN14 (input pullup). - * PE15 - PIN15 (input pullup). - */ -#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \ - PIN_MODE_INPUT(GPIOE_PIN1) | \ - PIN_MODE_INPUT(GPIOE_PIN2) | \ - PIN_MODE_INPUT(GPIOE_PIN3) | \ - PIN_MODE_INPUT(GPIOE_PIN4) | \ - PIN_MODE_INPUT(GPIOE_PIN5) | \ - PIN_MODE_INPUT(GPIOE_PIN6) | \ - PIN_MODE_INPUT(GPIOE_PIN7) | \ - PIN_MODE_INPUT(GPIOE_PIN8) | \ - PIN_MODE_INPUT(GPIOE_PIN9) | \ - PIN_MODE_INPUT(GPIOE_PIN10) | \ - PIN_MODE_INPUT(GPIOE_PIN11) | \ - PIN_MODE_INPUT(GPIOE_PIN12) | \ - PIN_MODE_INPUT(GPIOE_PIN13) | \ - PIN_MODE_INPUT(GPIOE_PIN14) | \ - PIN_MODE_INPUT(GPIOE_PIN15)) -#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) -#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_PIN0) | \ - PIN_OSPEED_HIGH(GPIOE_PIN1) | \ - PIN_OSPEED_HIGH(GPIOE_PIN2) | \ - PIN_OSPEED_HIGH(GPIOE_PIN3) | \ - PIN_OSPEED_HIGH(GPIOE_PIN4) | \ - PIN_OSPEED_HIGH(GPIOE_PIN5) | \ - PIN_OSPEED_HIGH(GPIOE_PIN6) | \ - PIN_OSPEED_HIGH(GPIOE_PIN7) | \ - PIN_OSPEED_HIGH(GPIOE_PIN8) | \ - PIN_OSPEED_HIGH(GPIOE_PIN9) | \ - PIN_OSPEED_HIGH(GPIOE_PIN10) | \ - PIN_OSPEED_HIGH(GPIOE_PIN11) | \ - PIN_OSPEED_HIGH(GPIOE_PIN12) | \ - PIN_OSPEED_HIGH(GPIOE_PIN13) | \ - PIN_OSPEED_HIGH(GPIOE_PIN14) | \ - PIN_OSPEED_HIGH(GPIOE_PIN15)) -#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN15)) -#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \ - PIN_ODR_HIGH(GPIOE_PIN1) | \ - PIN_ODR_HIGH(GPIOE_PIN2) | \ - PIN_ODR_HIGH(GPIOE_PIN3) | \ - PIN_ODR_HIGH(GPIOE_PIN4) | \ - PIN_ODR_HIGH(GPIOE_PIN5) | \ - PIN_ODR_HIGH(GPIOE_PIN6) | \ - PIN_ODR_HIGH(GPIOE_PIN7) | \ - PIN_ODR_HIGH(GPIOE_PIN8) | \ - PIN_ODR_HIGH(GPIOE_PIN9) | \ - PIN_ODR_HIGH(GPIOE_PIN10) | \ - PIN_ODR_HIGH(GPIOE_PIN11) | \ - PIN_ODR_HIGH(GPIOE_PIN12) | \ - PIN_ODR_HIGH(GPIOE_PIN13) | \ - PIN_ODR_HIGH(GPIOE_PIN14) | \ - PIN_ODR_HIGH(GPIOE_PIN15)) -#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN1, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN2, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN3, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN4, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN5, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN6, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN7, 0U)) -#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN9, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN10, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN11, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN12, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN13, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN14, 0U) | \ - PIN_AFIO_AF(GPIOE_PIN15, 0U)) - -/* - * GPIOF setup: - * - * PF0 - COL7 - * PF1 - COL6 - * PF2 - PIN2 (input pullup). - * PF3 - PIN3 (input pullup). - * PF4 - PIN4 (input pullup). - * PF5 - PIN5 (input pullup). - * PF6 - PIN6 (input pullup). - * PF7 - PIN7 (input pullup). - * PF8 - PIN8 (input pullup). - * PF9 - PIN9 (input pullup). - * PF10 - PIN10 (input pullup). - * PF11 - PIN11 (input pullup). - * PF12 - PIN12 (input pullup). - * PF13 - PIN13 (input pullup). - * PF14 - PIN14 (input pullup). - * PF15 - PIN15 (input pullup). - */ -#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \ - PIN_MODE_INPUT(GPIOF_PIN1) | \ - PIN_MODE_INPUT(GPIOF_PIN2) | \ - PIN_MODE_INPUT(GPIOF_PIN3) | \ - PIN_MODE_INPUT(GPIOF_PIN4) | \ - PIN_MODE_INPUT(GPIOF_PIN5) | \ - PIN_MODE_INPUT(GPIOF_PIN6) | \ - PIN_MODE_INPUT(GPIOF_PIN7) | \ - PIN_MODE_INPUT(GPIOF_PIN8) | \ - PIN_MODE_INPUT(GPIOF_PIN9) | \ - PIN_MODE_INPUT(GPIOF_PIN10) | \ - PIN_MODE_INPUT(GPIOF_PIN11) | \ - PIN_MODE_INPUT(GPIOF_PIN12) | \ - PIN_MODE_INPUT(GPIOF_PIN13) | \ - PIN_MODE_INPUT(GPIOF_PIN14) | \ - PIN_MODE_INPUT(GPIOF_PIN15)) -#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) -#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOF_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN1) | \ - PIN_OSPEED_HIGH(GPIOF_PIN2) | \ - PIN_OSPEED_HIGH(GPIOF_PIN3) | \ - PIN_OSPEED_HIGH(GPIOF_PIN4) | \ - PIN_OSPEED_HIGH(GPIOF_PIN5) | \ - PIN_OSPEED_HIGH(GPIOF_PIN6) | \ - PIN_OSPEED_HIGH(GPIOF_PIN7) | \ - PIN_OSPEED_HIGH(GPIOF_PIN8) | \ - PIN_OSPEED_HIGH(GPIOF_PIN9) | \ - PIN_OSPEED_HIGH(GPIOF_PIN10) | \ - PIN_OSPEED_HIGH(GPIOF_PIN11) | \ - PIN_OSPEED_HIGH(GPIOF_PIN12) | \ - PIN_OSPEED_HIGH(GPIOF_PIN13) | \ - PIN_OSPEED_HIGH(GPIOF_PIN14) | \ - PIN_OSPEED_HIGH(GPIOF_PIN15)) -#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN15)) -#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | \ - PIN_ODR_HIGH(GPIOF_PIN1) | \ - PIN_ODR_HIGH(GPIOF_PIN2) | \ - PIN_ODR_HIGH(GPIOF_PIN3) | \ - PIN_ODR_HIGH(GPIOF_PIN4) | \ - PIN_ODR_HIGH(GPIOF_PIN5) | \ - PIN_ODR_HIGH(GPIOF_PIN6) | \ - PIN_ODR_HIGH(GPIOF_PIN7) | \ - PIN_ODR_HIGH(GPIOF_PIN8) | \ - PIN_ODR_HIGH(GPIOF_PIN9) | \ - PIN_ODR_HIGH(GPIOF_PIN10) | \ - PIN_ODR_HIGH(GPIOF_PIN11) | \ - PIN_ODR_HIGH(GPIOF_PIN12) | \ - PIN_ODR_HIGH(GPIOF_PIN13) | \ - PIN_ODR_HIGH(GPIOF_PIN14) | \ - PIN_ODR_HIGH(GPIOF_PIN15)) -#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN1, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN2, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN3, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN4, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN5, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN6, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN7, 0U)) -#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN9, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN10, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN11, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN12, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN13, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ - PIN_AFIO_AF(GPIOF_PIN15, 0U)) - -#if !defined(_FROM_ASM_) -#ifdef __cplusplus -extern "C" { -#endif - void boardInit(void); -#ifdef __cplusplus -} -#endif -#endif /* _FROM_ASM_ */ - -#endif /* _BOARD_H */ diff --git a/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.mk b/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.mk deleted file mode 100644 index bbeb5bbff..000000000 --- a/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files. -BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F042X6/board.c - -# Required include directories -BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F042X6 diff --git a/keyboards/vinta/bootloader_defs.h b/keyboards/vinta/bootloader_defs.h deleted file mode 100644 index 4994be9c2..000000000 --- a/keyboards/vinta/bootloader_defs.h +++ /dev/null @@ -1,7 +0,0 @@ -/* Address for jumping to bootloader on STM32 chips. */ -/* It is chip dependent, the correct number can be looked up here: - * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf - * This also requires a patch to chibios: - * /tmk_core/tool/chibios/ch-bootloader-jump.patch - */ -#define STM32_BOOTLOADER_ADDRESS 0x1FFFC400 \ No newline at end of file diff --git a/lib/python/qmk/cli/cformat.py b/lib/python/qmk/cli/cformat.py index 600161c5c..6bcd15a11 100644 --- a/lib/python/qmk/cli/cformat.py +++ b/lib/python/qmk/cli/cformat.py @@ -43,8 +43,8 @@ def cformat(cli): # Empty array for files files = [] # Core directories for formatting - core_dirs = ['drivers', 'quantum', 'tests', 'tmk_core'] - ignores = ['tmk_core/protocol/usb_hid', 'quantum/template'] + core_dirs = ['drivers', 'quantum', 'tests', 'tmk_core', 'platforms'] + ignores = ['tmk_core/protocol/usb_hid', 'quantum/template', 'platforms/chibios'] # Find the list of files to format if cli.args.files: files.extend(normpath(file) for file in cli.args.files) diff --git a/platforms/chibios/BLACKPILL_STM32_F401/board/board.mk b/platforms/chibios/BLACKPILL_STM32_F401/board/board.mk new file mode 100644 index 000000000..fddf7dace --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F401/board/board.mk @@ -0,0 +1,9 @@ +# List of all the board related files. +BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_STM32F401C_DISCOVERY/board.c + +# Required include directories +BOARDINC = $(CHIBIOS)/os/hal/boards/ST_STM32F401C_DISCOVERY + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/platforms/chibios/BLACKPILL_STM32_F401/configs/board.h b/platforms/chibios/BLACKPILL_STM32_F401/configs/board.h new file mode 100644 index 000000000..30af6b0c8 --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F401/configs/board.h @@ -0,0 +1,20 @@ +/* Copyright 2020 Nick Brassel (tzarc) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#pragma once + +#include_next "board.h" + +#undef STM32_HSE_BYPASS diff --git a/platforms/chibios/BLACKPILL_STM32_F401/configs/chconf.h b/platforms/chibios/BLACKPILL_STM32_F401/configs/chconf.h new file mode 100644 index 000000000..7dc4f84a8 --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F401/configs/chconf.h @@ -0,0 +1,714 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file rt/templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_6_0_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 10000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 2 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 0 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM TRUE +#endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES TRUE +#endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif + +/** + * @brief Pipes APIs. + * @details If enabled then the pipes APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_PIPES) +#define CH_CFG_USE_PIPES TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif + +/** + * @brief Enables factory for Pipes. + */ +#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) +#define CH_CFG_FACTORY_PIPES TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/platforms/chibios/BLACKPILL_STM32_F401/configs/config.h b/platforms/chibios/BLACKPILL_STM32_F401/configs/config.h new file mode 100644 index 000000000..eb73e72ef --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F401/configs/config.h @@ -0,0 +1,23 @@ +/* Copyright 2020 Nick Brassel (tzarc) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#pragma once + +#define BOARD_OTG_NOVBUSSENS 1 + +#define STM32_LSECLK 32768U +#define STM32_HSECLK 25000000U + +#define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE diff --git a/platforms/chibios/BLACKPILL_STM32_F401/configs/halconf.h b/platforms/chibios/BLACKPILL_STM32_F401/configs/halconf.h new file mode 100644 index 000000000..a8db392aa --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F401/configs/halconf.h @@ -0,0 +1,525 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#define _CHIBIOS_HAL_CONF_ +#define _CHIBIOS_HAL_CONF_VER_7_0_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SIO subsystem. + */ +#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) +#define HAL_USE_SIO FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the TRNG subsystem. + */ +#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) +#define HAL_USE_TRNG FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/** + * @brief Enables the WSPI subsystem. + */ +#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) +#define HAL_USE_WSPI FALSE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +#define PAL_USE_CALLBACKS FALSE +#endif + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +#define PAL_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/** + * @brief Enforces the driver to use direct callbacks rather than OSAL events. + */ +#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) +#define CAN_ENFORCE_USE_CALLBACKS FALSE +#endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + +/*===========================================================================*/ +/* DAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) +#define DAC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define DAC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the zero-copy API. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/** + * @brief OCR initialization constant for V20 cards. + */ +#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) +#define SDC_INIT_OCR_V20 0x50FF8000U +#endif + +/** + * @brief OCR initialization constant for non-V20 cards. + */ +#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) +#define SDC_INIT_OCR 0x80100000U +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables circular transfers APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) +#define SPI_USE_CIRCULAR FALSE +#endif + + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/** + * @brief Handling method for SPI CS line. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) +#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT TRUE +#endif + +/*===========================================================================*/ +/* WSPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) +#define WSPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define WSPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/platforms/chibios/BLACKPILL_STM32_F401/configs/mcuconf.h b/platforms/chibios/BLACKPILL_STM32_F401/configs/mcuconf.h new file mode 100644 index 000000000..ba6e934fe --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F401/configs/mcuconf.h @@ -0,0 +1,253 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F4xx_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 25 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 4 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2SSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE + +/* + * IRQ system settings. + */ +#define STM32_IRQ_EXTI0_PRIORITY 6 +#define STM32_IRQ_EXTI1_PRIORITY 6 +#define STM32_IRQ_EXTI2_PRIORITY 6 +#define STM32_IRQ_EXTI3_PRIORITY 6 +#define STM32_IRQ_EXTI4_PRIORITY 6 +#define STM32_IRQ_EXTI5_9_PRIORITY 6 +#define STM32_IRQ_EXTI10_15_PRIORITY 6 +#define STM32_IRQ_EXTI16_PRIORITY 6 +#define STM32_IRQ_EXTI17_PRIORITY 15 +#define STM32_IRQ_EXTI18_PRIORITY 6 +#define STM32_IRQ_EXTI19_PRIORITY 6 +#define STM32_IRQ_EXTI20_PRIORITY 6 +#define STM32_IRQ_EXTI21_PRIORITY 15 +#define STM32_IRQ_EXTI22_PRIORITY 15 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * I2S driver system settings. + */ +#define STM32_I2S_USE_SPI2 FALSE +#define STM32_I2S_USE_SPI3 FALSE +#define STM32_I2S_SPI2_IRQ_PRIORITY 10 +#define STM32_I2S_SPI3_IRQ_PRIORITY 10 +#define STM32_I2S_SPI2_DMA_PRIORITY 1 +#define STM32_I2S_SPI3_DMA_PRIORITY 1 +#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM9 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM9 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 8 +#define STM32_ST_USE_TIMER 2 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART6 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_OTG1 TRUE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1 +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + +#endif /* MCUCONF_H */ diff --git a/platforms/chibios/BLACKPILL_STM32_F411/board/board.mk b/platforms/chibios/BLACKPILL_STM32_F411/board/board.mk new file mode 100644 index 000000000..bb00b1a2b --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F411/board/board.mk @@ -0,0 +1,9 @@ +# List of all the board related files. +BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_F411RE/board.c + +# Required include directories +BOARDINC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_F411RE + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/platforms/chibios/BLACKPILL_STM32_F411/configs/board.h b/platforms/chibios/BLACKPILL_STM32_F411/configs/board.h new file mode 100644 index 000000000..30af6b0c8 --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F411/configs/board.h @@ -0,0 +1,20 @@ +/* Copyright 2020 Nick Brassel (tzarc) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#pragma once + +#include_next "board.h" + +#undef STM32_HSE_BYPASS diff --git a/platforms/chibios/BLACKPILL_STM32_F411/configs/chconf.h b/platforms/chibios/BLACKPILL_STM32_F411/configs/chconf.h new file mode 100644 index 000000000..7dc4f84a8 --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F411/configs/chconf.h @@ -0,0 +1,714 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file rt/templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_6_0_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 10000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 2 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 0 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM TRUE +#endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES TRUE +#endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif + +/** + * @brief Pipes APIs. + * @details If enabled then the pipes APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_PIPES) +#define CH_CFG_USE_PIPES TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif + +/** + * @brief Enables factory for Pipes. + */ +#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) +#define CH_CFG_FACTORY_PIPES TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/platforms/chibios/BLACKPILL_STM32_F411/configs/config.h b/platforms/chibios/BLACKPILL_STM32_F411/configs/config.h new file mode 100644 index 000000000..eb73e72ef --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F411/configs/config.h @@ -0,0 +1,23 @@ +/* Copyright 2020 Nick Brassel (tzarc) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#pragma once + +#define BOARD_OTG_NOVBUSSENS 1 + +#define STM32_LSECLK 32768U +#define STM32_HSECLK 25000000U + +#define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE diff --git a/platforms/chibios/BLACKPILL_STM32_F411/configs/halconf.h b/platforms/chibios/BLACKPILL_STM32_F411/configs/halconf.h new file mode 100644 index 000000000..a8db392aa --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F411/configs/halconf.h @@ -0,0 +1,525 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#define _CHIBIOS_HAL_CONF_ +#define _CHIBIOS_HAL_CONF_VER_7_0_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SIO subsystem. + */ +#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) +#define HAL_USE_SIO FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the TRNG subsystem. + */ +#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) +#define HAL_USE_TRNG FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/** + * @brief Enables the WSPI subsystem. + */ +#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) +#define HAL_USE_WSPI FALSE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +#define PAL_USE_CALLBACKS FALSE +#endif + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +#define PAL_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/** + * @brief Enforces the driver to use direct callbacks rather than OSAL events. + */ +#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) +#define CAN_ENFORCE_USE_CALLBACKS FALSE +#endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + +/*===========================================================================*/ +/* DAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) +#define DAC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define DAC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the zero-copy API. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/** + * @brief OCR initialization constant for V20 cards. + */ +#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) +#define SDC_INIT_OCR_V20 0x50FF8000U +#endif + +/** + * @brief OCR initialization constant for non-V20 cards. + */ +#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) +#define SDC_INIT_OCR 0x80100000U +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables circular transfers APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) +#define SPI_USE_CIRCULAR FALSE +#endif + + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/** + * @brief Handling method for SPI CS line. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) +#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT TRUE +#endif + +/*===========================================================================*/ +/* WSPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) +#define WSPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define WSPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/platforms/chibios/BLACKPILL_STM32_F411/configs/mcuconf.h b/platforms/chibios/BLACKPILL_STM32_F411/configs/mcuconf.h new file mode 100644 index 000000000..0394ff56b --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F411/configs/mcuconf.h @@ -0,0 +1,253 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F4xx_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 25 +#define STM32_PLLN_VALUE 384 +#define STM32_PLLP_VALUE 4 +#define STM32_PLLQ_VALUE 8 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2SSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE + +/* + * IRQ system settings. + */ +#define STM32_IRQ_EXTI0_PRIORITY 6 +#define STM32_IRQ_EXTI1_PRIORITY 6 +#define STM32_IRQ_EXTI2_PRIORITY 6 +#define STM32_IRQ_EXTI3_PRIORITY 6 +#define STM32_IRQ_EXTI4_PRIORITY 6 +#define STM32_IRQ_EXTI5_9_PRIORITY 6 +#define STM32_IRQ_EXTI10_15_PRIORITY 6 +#define STM32_IRQ_EXTI16_PRIORITY 6 +#define STM32_IRQ_EXTI17_PRIORITY 15 +#define STM32_IRQ_EXTI18_PRIORITY 6 +#define STM32_IRQ_EXTI19_PRIORITY 6 +#define STM32_IRQ_EXTI20_PRIORITY 6 +#define STM32_IRQ_EXTI21_PRIORITY 15 +#define STM32_IRQ_EXTI22_PRIORITY 15 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * I2S driver system settings. + */ +#define STM32_I2S_USE_SPI2 FALSE +#define STM32_I2S_USE_SPI3 FALSE +#define STM32_I2S_SPI2_IRQ_PRIORITY 10 +#define STM32_I2S_SPI3_IRQ_PRIORITY 10 +#define STM32_I2S_SPI2_DMA_PRIORITY 1 +#define STM32_I2S_SPI3_DMA_PRIORITY 1 +#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM9 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM9 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 8 +#define STM32_ST_USE_TIMER 2 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART6 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_OTG1 TRUE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1 +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + +#endif /* MCUCONF_H */ diff --git a/platforms/chibios/GENERIC_STM32_F042X6/board/board.c b/platforms/chibios/GENERIC_STM32_F042X6/board/board.c new file mode 100644 index 000000000..7d93b68f9 --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F042X6/board/board.c @@ -0,0 +1,269 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * This file has been automatically generated using ChibiStudio board + * generator plugin. Do not edit manually. + */ + +#include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; + +/** + * @brief STM32 GPIO static initialization data. + */ +static const gpio_config_t gpio_default_config = { +#if STM32_HAS_GPIOA + {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, + VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, +#endif +#if STM32_HAS_GPIOB + {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, + VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, +#endif +#if STM32_HAS_GPIOC + {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, + VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, +#endif +#if STM32_HAS_GPIOD + {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, + VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, +#endif +#if STM32_HAS_GPIOE + {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, + VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, +#endif +#if STM32_HAS_GPIOF + {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, + VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, +#endif +#if STM32_HAS_GPIOG + {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, + VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, +#endif +#if STM32_HAS_GPIOH + {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, + VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, +#endif +#if STM32_HAS_GPIOI + {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} +#endif +}; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +__attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} + +/** + * @brief Early initialization code. + * @details GPIO ports and system clocks are initialized before everything + * else. + */ +void __early_init(void) { + enter_bootloader_mode_if_requested(); + + stm32_gpio_init(); + stm32_clock_init(); +} + +#if HAL_USE_SDC || defined(__DOXYGEN__) +/** + * @brief SDC card detection. + */ +bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return true; +} + +/** + * @brief SDC card write protection detection. + */ +bool sdc_lld_is_write_protected(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return false; +} +#endif /* HAL_USE_SDC */ + +#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) +/** + * @brief MMC_SPI card detection. + */ +bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { + + (void)mmcp; + /* TODO: Fill the implementation.*/ + return true; +} + +/** + * @brief MMC_SPI card write protection detection. + */ +bool mmc_lld_is_write_protected(MMCDriver *mmcp) { + + (void)mmcp; + /* TODO: Fill the implementation.*/ + return false; +} +#endif + +/** + * @brief Board-specific initialization code. + * @todo Add your board-specific code, if any. + */ +void boardInit(void) { + +} diff --git a/platforms/chibios/GENERIC_STM32_F042X6/board/board.h b/platforms/chibios/GENERIC_STM32_F042X6/board/board.h new file mode 100644 index 000000000..ee9d31e04 --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F042X6/board/board.h @@ -0,0 +1,896 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ +#ifndef _BOARD_H +#define _BOARD_H + +/* + * Setup for STMicroelectronics STM32 Nucleo32-F042K6 board. + */ + +/* + * Board identifier. + */ +#define BOARD_GENERIC_STM32_F042X6 +#define BOARD_NAME "Generic STM32F042 PCB" + +/* + * Board oscillators-related settings. + * NOTE: LSE not fitted. + * NOTE: HSE not fitted. + */ +#if !defined(STM32_LSECLK) +#define STM32_LSECLK 0U +#endif + +#define STM32_LSEDRV (3U << 3U) + +#if !defined(STM32_HSECLK) +#define STM32_HSECLK 0U +#endif + +/* + * MCU type as defined in the ST header. + */ +#define STM32F042x6 + +/* + * IO pins assignments. + */ +#define GPIOA_PIN0 0U +#define GPIOA_PIN1 1U +#define GPIOA_PIN2 2U +#define GPIOA_PIN3 3U +#define GPIOA_PIN4 4U +#define GPIOA_PIN5 5U +#define GPIOA_PIN6 6U +#define GPIOA_PIN7 7U +#define GPIOA_PIN8 8U +#define GPIOA_PIN9 9U +#define GPIOA_PIN10 10U +#define GPIOA_PIN11 11U +#define GPIOA_PIN12 12U +#define GPIOA_PIN13 13U +#define GPIOA_PIN14 14U +#define GPIOA_PIN15 15U + +#define GPIOB_PIN0 0U +#define GPIOB_PIN1 1U +#define GPIOB_PIN2 2U +#define GPIOB_PIN3 3U +#define GPIOB_PIN4 4U +#define GPIOB_PIN5 5U +#define GPIOB_PIN6 6U +#define GPIOB_PIN7 7U +#define GPIOB_PIN8 8U +#define GPIOB_PIN9 9U +#define GPIOB_PIN10 10U +#define GPIOB_PIN11 11U +#define GPIOB_PIN12 12U +#define GPIOB_PIN13 13U +#define GPIOB_PIN14 14U +#define GPIOB_PIN15 15U + +#define GPIOC_PIN0 0U +#define GPIOC_PIN1 1U +#define GPIOC_PIN2 2U +#define GPIOC_PIN3 3U +#define GPIOC_PIN4 4U +#define GPIOC_PIN5 5U +#define GPIOC_PIN6 6U +#define GPIOC_PIN7 7U +#define GPIOC_PIN8 8U +#define GPIOC_PIN9 9U +#define GPIOC_PIN10 10U +#define GPIOC_PIN11 11U +#define GPIOC_PIN12 12U +#define GPIOC_PIN13 13U +#define GPIOC_PIN14 14U +#define GPIOC_PIN15 15U + +#define GPIOD_PIN0 0U +#define GPIOD_PIN1 1U +#define GPIOD_PIN2 2U +#define GPIOD_PIN3 3U +#define GPIOD_PIN4 4U +#define GPIOD_PIN5 5U +#define GPIOD_PIN6 6U +#define GPIOD_PIN7 7U +#define GPIOD_PIN8 8U +#define GPIOD_PIN9 9U +#define GPIOD_PIN10 10U +#define GPIOD_PIN11 11U +#define GPIOD_PIN12 12U +#define GPIOD_PIN13 13U +#define GPIOD_PIN14 14U +#define GPIOD_PIN15 15U + +#define GPIOE_PIN0 0U +#define GPIOE_PIN1 1U +#define GPIOE_PIN2 2U +#define GPIOE_PIN3 3U +#define GPIOE_PIN4 4U +#define GPIOE_PIN5 5U +#define GPIOE_PIN6 6U +#define GPIOE_PIN7 7U +#define GPIOE_PIN8 8U +#define GPIOE_PIN9 9U +#define GPIOE_PIN10 10U +#define GPIOE_PIN11 11U +#define GPIOE_PIN12 12U +#define GPIOE_PIN13 13U +#define GPIOE_PIN14 14U +#define GPIOE_PIN15 15U + +#define GPIOF_PIN0 0U +#define GPIOF_PIN1 1U +#define GPIOF_PIN2 2U +#define GPIOF_PIN3 3U +#define GPIOF_PIN4 4U +#define GPIOF_PIN5 5U +#define GPIOF_PIN6 6U +#define GPIOF_PIN7 7U +#define GPIOF_PIN8 8U +#define GPIOF_PIN9 9U +#define GPIOF_PIN10 10U +#define GPIOF_PIN11 11U +#define GPIOF_PIN12 12U +#define GPIOF_PIN13 13U +#define GPIOF_PIN14 14U +#define GPIOF_PIN15 15U + +/* + * IO lines assignments. + */ + +#define LINE_BOOT0 PAL_LINE(GPIOB, 8U) +#define LINE_SWCLK PAL_LINE(GPIOA, 14U) +#define LINE_SWDIO PAL_LINE(GPIOA, 13U) + +/* + * I/O ports initial setup, this configuration is established soon after reset + * in the initialization code. + * Please refer to the STM32 Reference Manual for details. + */ +#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) +#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) +#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) +#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) +#define PIN_ODR_LOW(n) (0U << (n)) +#define PIN_ODR_HIGH(n) (1U << (n)) +#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) +#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) +#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) +#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) +#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) +#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) +#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) +#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) +#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) +#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) + +/* + * GPIOA setup: + * + * PA0 - COL5 + * PA1 - COL4 + * PA2 - COL3 + * PA3 - COL2 + * PA4 - COL1 + * PA5 - COL0 + * PA6 - ROW4 + * PA7 - ROW3 + * PA8 - NC + * PA9 - ROW1 + * PA10 - ROW0 + * PA11 - USB_DM + * PA12 - USB_DP + * PA13 - COL15/SWDIO (for now, COL15) + * PA14 - COL14/SWCLK (for now, COL14) + * PA15 - COL13 + */ +#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \ + PIN_MODE_INPUT(GPIOA_PIN1) | \ + PIN_MODE_INPUT(GPIOA_PIN2) | \ + PIN_MODE_INPUT(GPIOA_PIN3) | \ + PIN_MODE_INPUT(GPIOA_PIN4) | \ + PIN_MODE_INPUT(GPIOA_PIN5) | \ + PIN_MODE_INPUT(GPIOA_PIN6) | \ + PIN_MODE_INPUT(GPIOA_PIN7) | \ + PIN_MODE_INPUT(GPIOA_PIN8) | \ + PIN_MODE_INPUT(GPIOA_PIN9) | \ + PIN_MODE_INPUT(GPIOA_PIN10) | \ + PIN_MODE_INPUT(GPIOA_PIN11) | \ + PIN_MODE_INPUT(GPIOA_PIN12) | \ + PIN_MODE_INPUT(GPIOA_PIN13) | \ + PIN_MODE_INPUT(GPIOA_PIN14) | \ + PIN_MODE_INPUT(GPIOA_PIN15)) +#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) +#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \ + PIN_OSPEED_VERYLOW(GPIOA_PIN1) | \ + PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \ + PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \ + PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \ + PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \ + PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \ + PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \ + PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \ + PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \ + PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \ + PIN_OSPEED_HIGH(GPIOA_PIN11) | \ + PIN_OSPEED_VERYLOW(GPIOA_PIN12) | \ + PIN_OSPEED_VERYLOW(GPIOA_PIN13) | \ + PIN_OSPEED_VERYLOW(GPIOA_PIN14) | \ + PIN_OSPEED_VERYLOW(GPIOA_PIN15)) +#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_PIN0) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN15)) +#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \ + PIN_ODR_HIGH(GPIOA_PIN1) | \ + PIN_ODR_HIGH(GPIOA_PIN2) | \ + PIN_ODR_HIGH(GPIOA_PIN3) | \ + PIN_ODR_HIGH(GPIOA_PIN4) | \ + PIN_ODR_HIGH(GPIOA_PIN5) | \ + PIN_ODR_HIGH(GPIOA_PIN6) | \ + PIN_ODR_HIGH(GPIOA_PIN7) | \ + PIN_ODR_HIGH(GPIOA_PIN8) | \ + PIN_ODR_HIGH(GPIOA_PIN9) | \ + PIN_ODR_HIGH(GPIOA_PIN10) | \ + PIN_ODR_HIGH(GPIOA_PIN11) | \ + PIN_ODR_HIGH(GPIOA_PIN12) | \ + PIN_ODR_HIGH(GPIOA_PIN13) | \ + PIN_ODR_HIGH(GPIOA_PIN14) | \ + PIN_ODR_HIGH(GPIOA_PIN15)) +#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN1, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN7, 0U)) +#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN11, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN13, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN14, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN15, 0U)) + +/* + * GPIOB setup: + * + * PB0 - ROW2 + * PB1 - RGB_D + * PB2 - PIN2 (input pullup). + * PB3 - COL12 + * PB4 - COL11 + * PB5 - COL10 + * PB6 - COL9 + * PB7 - COL8 + * PB8 - BOOT0 (set as output for STM32F042) + * PB9 - PIN9 (input pullup). + * PB10 - PIN10 (input pullup). + * PB11 - PIN11 (input pullup). + * PB12 - PIN12 (input pullup). + * PB13 - PIN13 (input pullup). + * PB14 - PIN14 (input pullup). + * PB15 - PIN15 (input pullup). + */ +#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \ + PIN_MODE_OUTPUT(GPIOB_PIN1) | \ + PIN_MODE_INPUT(GPIOB_PIN2) | \ + PIN_MODE_INPUT(GPIOB_PIN3) | \ + PIN_MODE_INPUT(GPIOB_PIN4) | \ + PIN_MODE_INPUT(GPIOB_PIN5) | \ + PIN_MODE_INPUT(GPIOB_PIN6) | \ + PIN_MODE_INPUT(GPIOB_PIN7) | \ + PIN_MODE_OUTPUT(GPIOB_PIN8) | \ + PIN_MODE_INPUT(GPIOB_PIN9) | \ + PIN_MODE_INPUT(GPIOB_PIN10) | \ + PIN_MODE_INPUT(GPIOB_PIN11) | \ + PIN_MODE_INPUT(GPIOB_PIN12) | \ + PIN_MODE_INPUT(GPIOB_PIN13) | \ + PIN_MODE_INPUT(GPIOB_PIN14) | \ + PIN_MODE_INPUT(GPIOB_PIN15)) +#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) +#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \ + PIN_OSPEED_HIGH(GPIOB_PIN1) | \ + PIN_OSPEED_HIGH(GPIOB_PIN2) | \ + PIN_OSPEED_VERYLOW(GPIOB_PIN3) | \ + PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \ + PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \ + PIN_OSPEED_VERYLOW(GPIOB_PIN6) | \ + PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \ + PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \ + PIN_OSPEED_HIGH(GPIOB_PIN9) | \ + PIN_OSPEED_HIGH(GPIOB_PIN10) | \ + PIN_OSPEED_HIGH(GPIOB_PIN11) | \ + PIN_OSPEED_HIGH(GPIOB_PIN12) | \ + PIN_OSPEED_HIGH(GPIOB_PIN13) | \ + PIN_OSPEED_HIGH(GPIOB_PIN14) | \ + PIN_OSPEED_HIGH(GPIOB_PIN15)) +#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \ + PIN_PUPDR_FLOATING(GPIOB_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN7) | \ + PIN_PUPDR_PULLDOWN(GPIOB_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN10) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN15)) +#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \ + PIN_ODR_HIGH(GPIOB_PIN1) | \ + PIN_ODR_HIGH(GPIOB_PIN2) | \ + PIN_ODR_HIGH(GPIOB_PIN3) | \ + PIN_ODR_HIGH(GPIOB_PIN4) | \ + PIN_ODR_HIGH(GPIOB_PIN5) | \ + PIN_ODR_HIGH(GPIOB_PIN6) | \ + PIN_ODR_HIGH(GPIOB_PIN7) | \ + PIN_ODR_HIGH(GPIOB_PIN8) | \ + PIN_ODR_HIGH(GPIOB_PIN9) | \ + PIN_ODR_HIGH(GPIOB_PIN10) | \ + PIN_ODR_HIGH(GPIOB_PIN11) | \ + PIN_ODR_HIGH(GPIOB_PIN12) | \ + PIN_ODR_HIGH(GPIOB_PIN13) | \ + PIN_ODR_HIGH(GPIOB_PIN14) | \ + PIN_ODR_HIGH(GPIOB_PIN15)) +#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN1, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN7, 0U)) +#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN11, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN13, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN14, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN15, 0U)) + +/* + * GPIOC setup: + * + * PC0 - PIN0 (input pullup). + * PC1 - PIN1 (input pullup). + * PC2 - PIN2 (input pullup). + * PC3 - PIN3 (input pullup). + * PC4 - PIN4 (input pullup). + * PC5 - PIN5 (input pullup). + * PC6 - PIN6 (input pullup). + * PC7 - PIN7 (input pullup). + * PC8 - PIN8 (input pullup). + * PC9 - PIN9 (input pullup). + * PC10 - PIN10 (input pullup). + * PC11 - PIN11 (input pullup). + * PC12 - PIN12 (input pullup). + * PC13 - PIN13 (input pullup). + * PC14 - PIN14 (input pullup). + * PC15 - PIN15 (input pullup). + */ +#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \ + PIN_MODE_INPUT(GPIOC_PIN1) | \ + PIN_MODE_INPUT(GPIOC_PIN2) | \ + PIN_MODE_INPUT(GPIOC_PIN3) | \ + PIN_MODE_INPUT(GPIOC_PIN4) | \ + PIN_MODE_INPUT(GPIOC_PIN5) | \ + PIN_MODE_INPUT(GPIOC_PIN6) | \ + PIN_MODE_INPUT(GPIOC_PIN7) | \ + PIN_MODE_INPUT(GPIOC_PIN8) | \ + PIN_MODE_INPUT(GPIOC_PIN9) | \ + PIN_MODE_INPUT(GPIOC_PIN10) | \ + PIN_MODE_INPUT(GPIOC_PIN11) | \ + PIN_MODE_INPUT(GPIOC_PIN12) | \ + PIN_MODE_INPUT(GPIOC_PIN13) | \ + PIN_MODE_INPUT(GPIOC_PIN14) | \ + PIN_MODE_INPUT(GPIOC_PIN15)) +#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) +#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_PIN0) | \ + PIN_OSPEED_HIGH(GPIOC_PIN1) | \ + PIN_OSPEED_HIGH(GPIOC_PIN2) | \ + PIN_OSPEED_HIGH(GPIOC_PIN3) | \ + PIN_OSPEED_HIGH(GPIOC_PIN4) | \ + PIN_OSPEED_HIGH(GPIOC_PIN5) | \ + PIN_OSPEED_HIGH(GPIOC_PIN6) | \ + PIN_OSPEED_HIGH(GPIOC_PIN7) | \ + PIN_OSPEED_HIGH(GPIOC_PIN8) | \ + PIN_OSPEED_HIGH(GPIOC_PIN9) | \ + PIN_OSPEED_HIGH(GPIOC_PIN10) | \ + PIN_OSPEED_HIGH(GPIOC_PIN11) | \ + PIN_OSPEED_HIGH(GPIOC_PIN12) | \ + PIN_OSPEED_HIGH(GPIOC_PIN13) | \ + PIN_OSPEED_HIGH(GPIOC_PIN14) | \ + PIN_OSPEED_HIGH(GPIOC_PIN15)) +#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN10) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN11) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN15)) +#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \ + PIN_ODR_HIGH(GPIOC_PIN1) | \ + PIN_ODR_HIGH(GPIOC_PIN2) | \ + PIN_ODR_HIGH(GPIOC_PIN3) | \ + PIN_ODR_HIGH(GPIOC_PIN4) | \ + PIN_ODR_HIGH(GPIOC_PIN5) | \ + PIN_ODR_HIGH(GPIOC_PIN6) | \ + PIN_ODR_HIGH(GPIOC_PIN7) | \ + PIN_ODR_HIGH(GPIOC_PIN8) | \ + PIN_ODR_HIGH(GPIOC_PIN9) | \ + PIN_ODR_HIGH(GPIOC_PIN10) | \ + PIN_ODR_HIGH(GPIOC_PIN11) | \ + PIN_ODR_HIGH(GPIOC_PIN12) | \ + PIN_ODR_HIGH(GPIOC_PIN13) | \ + PIN_ODR_HIGH(GPIOC_PIN14) | \ + PIN_ODR_HIGH(GPIOC_PIN15)) +#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN1, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN7, 0U)) +#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN11, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN13, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN14, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN15, 0U)) + +/* + * GPIOD setup: + * + * PD0 - PIN0 (input pullup). + * PD1 - PIN1 (input pullup). + * PD2 - PIN2 (input pullup). + * PD3 - PIN3 (input pullup). + * PD4 - PIN4 (input pullup). + * PD5 - PIN5 (input pullup). + * PD6 - PIN6 (input pullup). + * PD7 - PIN7 (input pullup). + * PD8 - PIN8 (input pullup). + * PD9 - PIN9 (input pullup). + * PD10 - PIN10 (input pullup). + * PD11 - PIN11 (input pullup). + * PD12 - PIN12 (input pullup). + * PD13 - PIN13 (input pullup). + * PD14 - PIN14 (input pullup). + * PD15 - PIN15 (input pullup). + */ +#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ + PIN_MODE_INPUT(GPIOD_PIN1) | \ + PIN_MODE_INPUT(GPIOD_PIN2) | \ + PIN_MODE_INPUT(GPIOD_PIN3) | \ + PIN_MODE_INPUT(GPIOD_PIN4) | \ + PIN_MODE_INPUT(GPIOD_PIN5) | \ + PIN_MODE_INPUT(GPIOD_PIN6) | \ + PIN_MODE_INPUT(GPIOD_PIN7) | \ + PIN_MODE_INPUT(GPIOD_PIN8) | \ + PIN_MODE_INPUT(GPIOD_PIN9) | \ + PIN_MODE_INPUT(GPIOD_PIN10) | \ + PIN_MODE_INPUT(GPIOD_PIN11) | \ + PIN_MODE_INPUT(GPIOD_PIN12) | \ + PIN_MODE_INPUT(GPIOD_PIN13) | \ + PIN_MODE_INPUT(GPIOD_PIN14) | \ + PIN_MODE_INPUT(GPIOD_PIN15)) +#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) +#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \ + PIN_OSPEED_HIGH(GPIOD_PIN1) | \ + PIN_OSPEED_HIGH(GPIOD_PIN2) | \ + PIN_OSPEED_HIGH(GPIOD_PIN3) | \ + PIN_OSPEED_HIGH(GPIOD_PIN4) | \ + PIN_OSPEED_HIGH(GPIOD_PIN5) | \ + PIN_OSPEED_HIGH(GPIOD_PIN6) | \ + PIN_OSPEED_HIGH(GPIOD_PIN7) | \ + PIN_OSPEED_HIGH(GPIOD_PIN8) | \ + PIN_OSPEED_HIGH(GPIOD_PIN9) | \ + PIN_OSPEED_HIGH(GPIOD_PIN10) | \ + PIN_OSPEED_HIGH(GPIOD_PIN11) | \ + PIN_OSPEED_HIGH(GPIOD_PIN12) | \ + PIN_OSPEED_HIGH(GPIOD_PIN13) | \ + PIN_OSPEED_HIGH(GPIOD_PIN14) | \ + PIN_OSPEED_HIGH(GPIOD_PIN15)) +#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN15)) +#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ + PIN_ODR_HIGH(GPIOD_PIN1) | \ + PIN_ODR_HIGH(GPIOD_PIN2) | \ + PIN_ODR_HIGH(GPIOD_PIN3) | \ + PIN_ODR_HIGH(GPIOD_PIN4) | \ + PIN_ODR_HIGH(GPIOD_PIN5) | \ + PIN_ODR_HIGH(GPIOD_PIN6) | \ + PIN_ODR_HIGH(GPIOD_PIN7) | \ + PIN_ODR_HIGH(GPIOD_PIN8) | \ + PIN_ODR_HIGH(GPIOD_PIN9) | \ + PIN_ODR_HIGH(GPIOD_PIN10) | \ + PIN_ODR_HIGH(GPIOD_PIN11) | \ + PIN_ODR_HIGH(GPIOD_PIN12) | \ + PIN_ODR_HIGH(GPIOD_PIN13) | \ + PIN_ODR_HIGH(GPIOD_PIN14) | \ + PIN_ODR_HIGH(GPIOD_PIN15)) +#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN1, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN7, 0U)) +#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN11, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN13, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN14, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN15, 0U)) + +/* + * GPIOE setup: + * + * PE0 - PIN0 (input pullup). + * PE1 - PIN1 (input pullup). + * PE2 - PIN2 (input pullup). + * PE3 - PIN3 (input pullup). + * PE4 - PIN4 (input pullup). + * PE5 - PIN5 (input pullup). + * PE6 - PIN6 (input pullup). + * PE7 - PIN7 (input pullup). + * PE8 - PIN8 (input pullup). + * PE9 - PIN9 (input pullup). + * PE10 - PIN10 (input pullup). + * PE11 - PIN11 (input pullup). + * PE12 - PIN12 (input pullup). + * PE13 - PIN13 (input pullup). + * PE14 - PIN14 (input pullup). + * PE15 - PIN15 (input pullup). + */ +#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \ + PIN_MODE_INPUT(GPIOE_PIN1) | \ + PIN_MODE_INPUT(GPIOE_PIN2) | \ + PIN_MODE_INPUT(GPIOE_PIN3) | \ + PIN_MODE_INPUT(GPIOE_PIN4) | \ + PIN_MODE_INPUT(GPIOE_PIN5) | \ + PIN_MODE_INPUT(GPIOE_PIN6) | \ + PIN_MODE_INPUT(GPIOE_PIN7) | \ + PIN_MODE_INPUT(GPIOE_PIN8) | \ + PIN_MODE_INPUT(GPIOE_PIN9) | \ + PIN_MODE_INPUT(GPIOE_PIN10) | \ + PIN_MODE_INPUT(GPIOE_PIN11) | \ + PIN_MODE_INPUT(GPIOE_PIN12) | \ + PIN_MODE_INPUT(GPIOE_PIN13) | \ + PIN_MODE_INPUT(GPIOE_PIN14) | \ + PIN_MODE_INPUT(GPIOE_PIN15)) +#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) +#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_PIN0) | \ + PIN_OSPEED_HIGH(GPIOE_PIN1) | \ + PIN_OSPEED_HIGH(GPIOE_PIN2) | \ + PIN_OSPEED_HIGH(GPIOE_PIN3) | \ + PIN_OSPEED_HIGH(GPIOE_PIN4) | \ + PIN_OSPEED_HIGH(GPIOE_PIN5) | \ + PIN_OSPEED_HIGH(GPIOE_PIN6) | \ + PIN_OSPEED_HIGH(GPIOE_PIN7) | \ + PIN_OSPEED_HIGH(GPIOE_PIN8) | \ + PIN_OSPEED_HIGH(GPIOE_PIN9) | \ + PIN_OSPEED_HIGH(GPIOE_PIN10) | \ + PIN_OSPEED_HIGH(GPIOE_PIN11) | \ + PIN_OSPEED_HIGH(GPIOE_PIN12) | \ + PIN_OSPEED_HIGH(GPIOE_PIN13) | \ + PIN_OSPEED_HIGH(GPIOE_PIN14) | \ + PIN_OSPEED_HIGH(GPIOE_PIN15)) +#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN10) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN11) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN15)) +#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \ + PIN_ODR_HIGH(GPIOE_PIN1) | \ + PIN_ODR_HIGH(GPIOE_PIN2) | \ + PIN_ODR_HIGH(GPIOE_PIN3) | \ + PIN_ODR_HIGH(GPIOE_PIN4) | \ + PIN_ODR_HIGH(GPIOE_PIN5) | \ + PIN_ODR_HIGH(GPIOE_PIN6) | \ + PIN_ODR_HIGH(GPIOE_PIN7) | \ + PIN_ODR_HIGH(GPIOE_PIN8) | \ + PIN_ODR_HIGH(GPIOE_PIN9) | \ + PIN_ODR_HIGH(GPIOE_PIN10) | \ + PIN_ODR_HIGH(GPIOE_PIN11) | \ + PIN_ODR_HIGH(GPIOE_PIN12) | \ + PIN_ODR_HIGH(GPIOE_PIN13) | \ + PIN_ODR_HIGH(GPIOE_PIN14) | \ + PIN_ODR_HIGH(GPIOE_PIN15)) +#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN1, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN7, 0U)) +#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN11, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN13, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN14, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN15, 0U)) + +/* + * GPIOF setup: + * + * PF0 - COL7 + * PF1 - COL6 + * PF2 - PIN2 (input pullup). + * PF3 - PIN3 (input pullup). + * PF4 - PIN4 (input pullup). + * PF5 - PIN5 (input pullup). + * PF6 - PIN6 (input pullup). + * PF7 - PIN7 (input pullup). + * PF8 - PIN8 (input pullup). + * PF9 - PIN9 (input pullup). + * PF10 - PIN10 (input pullup). + * PF11 - PIN11 (input pullup). + * PF12 - PIN12 (input pullup). + * PF13 - PIN13 (input pullup). + * PF14 - PIN14 (input pullup). + * PF15 - PIN15 (input pullup). + */ +#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \ + PIN_MODE_INPUT(GPIOF_PIN1) | \ + PIN_MODE_INPUT(GPIOF_PIN2) | \ + PIN_MODE_INPUT(GPIOF_PIN3) | \ + PIN_MODE_INPUT(GPIOF_PIN4) | \ + PIN_MODE_INPUT(GPIOF_PIN5) | \ + PIN_MODE_INPUT(GPIOF_PIN6) | \ + PIN_MODE_INPUT(GPIOF_PIN7) | \ + PIN_MODE_INPUT(GPIOF_PIN8) | \ + PIN_MODE_INPUT(GPIOF_PIN9) | \ + PIN_MODE_INPUT(GPIOF_PIN10) | \ + PIN_MODE_INPUT(GPIOF_PIN11) | \ + PIN_MODE_INPUT(GPIOF_PIN12) | \ + PIN_MODE_INPUT(GPIOF_PIN13) | \ + PIN_MODE_INPUT(GPIOF_PIN14) | \ + PIN_MODE_INPUT(GPIOF_PIN15)) +#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) +#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOF_PIN0) | \ + PIN_OSPEED_VERYLOW(GPIOF_PIN1) | \ + PIN_OSPEED_HIGH(GPIOF_PIN2) | \ + PIN_OSPEED_HIGH(GPIOF_PIN3) | \ + PIN_OSPEED_HIGH(GPIOF_PIN4) | \ + PIN_OSPEED_HIGH(GPIOF_PIN5) | \ + PIN_OSPEED_HIGH(GPIOF_PIN6) | \ + PIN_OSPEED_HIGH(GPIOF_PIN7) | \ + PIN_OSPEED_HIGH(GPIOF_PIN8) | \ + PIN_OSPEED_HIGH(GPIOF_PIN9) | \ + PIN_OSPEED_HIGH(GPIOF_PIN10) | \ + PIN_OSPEED_HIGH(GPIOF_PIN11) | \ + PIN_OSPEED_HIGH(GPIOF_PIN12) | \ + PIN_OSPEED_HIGH(GPIOF_PIN13) | \ + PIN_OSPEED_HIGH(GPIOF_PIN14) | \ + PIN_OSPEED_HIGH(GPIOF_PIN15)) +#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_PIN0) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN10) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN11) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN15)) +#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | \ + PIN_ODR_HIGH(GPIOF_PIN1) | \ + PIN_ODR_HIGH(GPIOF_PIN2) | \ + PIN_ODR_HIGH(GPIOF_PIN3) | \ + PIN_ODR_HIGH(GPIOF_PIN4) | \ + PIN_ODR_HIGH(GPIOF_PIN5) | \ + PIN_ODR_HIGH(GPIOF_PIN6) | \ + PIN_ODR_HIGH(GPIOF_PIN7) | \ + PIN_ODR_HIGH(GPIOF_PIN8) | \ + PIN_ODR_HIGH(GPIOF_PIN9) | \ + PIN_ODR_HIGH(GPIOF_PIN10) | \ + PIN_ODR_HIGH(GPIOF_PIN11) | \ + PIN_ODR_HIGH(GPIOF_PIN12) | \ + PIN_ODR_HIGH(GPIOF_PIN13) | \ + PIN_ODR_HIGH(GPIOF_PIN14) | \ + PIN_ODR_HIGH(GPIOF_PIN15)) +#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN1, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN7, 0U)) +#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN11, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN13, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN15, 0U)) + +#if !defined(_FROM_ASM_) +#ifdef __cplusplus +extern "C" { +#endif + void boardInit(void); +#ifdef __cplusplus +} +#endif +#endif /* _FROM_ASM_ */ + +#endif /* _BOARD_H */ diff --git a/platforms/chibios/GENERIC_STM32_F042X6/board/board.mk b/platforms/chibios/GENERIC_STM32_F042X6/board/board.mk new file mode 100644 index 000000000..842e33590 --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F042X6/board/board.mk @@ -0,0 +1,9 @@ +# List of all the board related files. +BOARDSRC = $(BOARD_PATH)/board/board.c + +# Required include directories +BOARDINC = $(BOARD_PATH)/board + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/platforms/chibios/GENERIC_STM32_F042X6/configs/bootloader_defs.h b/platforms/chibios/GENERIC_STM32_F042X6/configs/bootloader_defs.h new file mode 100644 index 000000000..4994be9c2 --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F042X6/configs/bootloader_defs.h @@ -0,0 +1,7 @@ +/* Address for jumping to bootloader on STM32 chips. */ +/* It is chip dependent, the correct number can be looked up here: + * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf + * This also requires a patch to chibios: + * /tmk_core/tool/chibios/ch-bootloader-jump.patch + */ +#define STM32_BOOTLOADER_ADDRESS 0x1FFFC400 \ No newline at end of file diff --git a/platforms/chibios/GENERIC_STM32_F072XB/board/board.c b/platforms/chibios/GENERIC_STM32_F072XB/board/board.c new file mode 100644 index 000000000..c91136e8f --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F072XB/board/board.c @@ -0,0 +1,250 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * This file has been automatically generated using ChibiStudio board + * generator plugin. Do not edit manually. + */ + +#include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; + +/** + * @brief STM32 GPIO static initialization data. + */ +static const gpio_config_t gpio_default_config = { +#if STM32_HAS_GPIOA + {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, +#endif +#if STM32_HAS_GPIOB + {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, +#endif +#if STM32_HAS_GPIOC + {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, +#endif +#if STM32_HAS_GPIOD + {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, +#endif +#if STM32_HAS_GPIOE + {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, +#endif +#if STM32_HAS_GPIOF + {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, +#endif +#if STM32_HAS_GPIOG + {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, +#endif +#if STM32_HAS_GPIOH + {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, +#endif +#if STM32_HAS_GPIOI + {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} +#endif +}; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +__attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} + +/** + * @brief Early initialization code. + * @details GPIO ports and system clocks are initialized before everything + * else. + */ +void __early_init(void) { + enter_bootloader_mode_if_requested(); + + stm32_gpio_init(); + stm32_clock_init(); +} + +#if HAL_USE_SDC || defined(__DOXYGEN__) +/** + * @brief SDC card detection. + */ +bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { + (void)sdcp; + /* TODO: Fill the implementation.*/ + return true; +} + +/** + * @brief SDC card write protection detection. + */ +bool sdc_lld_is_write_protected(SDCDriver *sdcp) { + (void)sdcp; + /* TODO: Fill the implementation.*/ + return false; +} +#endif /* HAL_USE_SDC */ + +#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) +/** + * @brief MMC_SPI card detection. + */ +bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { + (void)mmcp; + /* TODO: Fill the implementation.*/ + return true; +} + +/** + * @brief MMC_SPI card write protection detection. + */ +bool mmc_lld_is_write_protected(MMCDriver *mmcp) { + (void)mmcp; + /* TODO: Fill the implementation.*/ + return false; +} +#endif + +/** + * @brief Board-specific initialization code. + * @todo Add your board-specific code, if any. + */ +void boardInit(void) {} diff --git a/platforms/chibios/GENERIC_STM32_F072XB/board/board.h b/platforms/chibios/GENERIC_STM32_F072XB/board/board.h new file mode 100644 index 000000000..87570e62d --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F072XB/board/board.h @@ -0,0 +1,407 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * This file has been automatically generated using ChibiStudio board + * generator plugin. Do not edit manually. + */ + +#ifndef BOARD_H +#define BOARD_H + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/* + * Setup for Generic STM32_F072 Board + */ + +/* + * Board identifier. + */ +#define BOARD_GENERIC_STM32_F072XB +#define BOARD_NAME "STM32_F072" + +/* + * Board oscillators-related settings. + * NOTE: LSE not fitted. + * NOTE: HSE not fitted. + */ +#if !defined(STM32_LSECLK) +# define STM32_LSECLK 0U +#endif + +#define STM32_LSEDRV (3U << 3U) + +#if !defined(STM32_HSECLK) +# define STM32_HSECLK 0U +#endif + +#define STM32_HSE_BYPASS + +/* + * MCU type as defined in the ST header. + */ +#define STM32F072xB + +/* + * IO pins assignments. + */ +#define GPIOA_BUTTON 0U +#define GPIOA_PIN1 1U +#define GPIOA_PIN2 2U +#define GPIOA_PIN3 3U +#define GPIOA_PIN4 4U +#define GPIOA_PIN5 5U +#define GPIOA_PIN6 6U +#define GPIOA_PIN7 7U +#define GPIOA_PIN8 8U +#define GPIOA_PIN9 9U +#define GPIOA_PIN10 10U +#define GPIOA_USB_DM 11U +#define GPIOA_USB_DP 12U +#define GPIOA_SWDIO 13U +#define GPIOA_SWCLK 14U +#define GPIOA_PIN15 15U + +#define GPIOB_PIN0 0U +#define GPIOB_PIN1 1U +#define GPIOB_PIN2 2U +#define GPIOB_PIN3 3U +#define GPIOB_PIN4 4U +#define GPIOB_PIN5 5U +#define GPIOB_PIN6 6U +#define GPIOB_PIN7 7U +#define GPIOB_PIN8 8U +#define GPIOB_PIN9 9U +#define GPIOB_PIN10 10U +#define GPIOB_PIN11 11U +#define GPIOB_PIN12 12U +#define GPIOB_SPI2_SCK 13U +#define GPIOB_SPI2_MISO 14U +#define GPIOB_SPI2_MOSI 15U + +#define GPIOC_MEMS_CS 0U +#define GPIOC_PIN1 1U +#define GPIOC_PIN2 2U +#define GPIOC_PIN3 3U +#define GPIOC_PIN4 4U +#define GPIOC_PIN5 5U +#define GPIOC_LED_RED 6U +#define GPIOC_LED_BLUE 7U +#define GPIOC_LED_ORANGE 8U +#define GPIOC_LED_GREEN 9U +#define GPIOC_PIN10 10U +#define GPIOC_PIN11 11U +#define GPIOC_PIN12 12U +#define GPIOC_PIN13 13U +#define GPIOC_OSC32_IN 14U +#define GPIOC_OSC32_OUT 15U + +#define GPIOD_PIN0 0U +#define GPIOD_PIN1 1U +#define GPIOD_PIN2 2U +#define GPIOD_PIN3 3U +#define GPIOD_PIN4 4U +#define GPIOD_PIN5 5U +#define GPIOD_PIN6 6U +#define GPIOD_PIN7 7U +#define GPIOD_PIN8 8U +#define GPIOD_PIN9 9U +#define GPIOD_PIN10 10U +#define GPIOD_PIN11 11U +#define GPIOD_PIN12 12U +#define GPIOD_PIN13 13U +#define GPIOD_PIN14 14U +#define GPIOD_PIN15 15U + +#define GPIOE_PIN0 0U +#define GPIOE_PIN1 1U +#define GPIOE_PIN2 2U +#define GPIOE_PIN3 3U +#define GPIOE_PIN4 4U +#define GPIOE_PIN5 5U +#define GPIOE_PIN6 6U +#define GPIOE_PIN7 7U +#define GPIOE_PIN8 8U +#define GPIOE_PIN9 9U +#define GPIOE_PIN10 10U +#define GPIOE_PIN11 11U +#define GPIOE_PIN12 12U +#define GPIOE_PIN13 13U +#define GPIOE_PIN14 14U +#define GPIOE_PIN15 15U + +#define GPIOF_OSC_IN 0U +#define GPIOF_OSC_OUT 1U +#define GPIOF_PIN2 2U +#define GPIOF_PIN3 3U +#define GPIOF_PIN4 4U +#define GPIOF_PIN5 5U +#define GPIOF_PIN6 6U +#define GPIOF_PIN7 7U +#define GPIOF_PIN8 8U +#define GPIOF_PIN9 9U +#define GPIOF_PIN10 10U +#define GPIOF_PIN11 11U +#define GPIOF_PIN12 12U +#define GPIOF_PIN13 13U +#define GPIOF_PIN14 14U +#define GPIOF_PIN15 15U + +/* + * IO lines assignments. + */ +#define LINE_BUTTON PAL_LINE(GPIOA, 0U) +#define LINE_USB_DM PAL_LINE(GPIOA, 11U) +#define LINE_USB_DP PAL_LINE(GPIOA, 12U) +#define LINE_SWDIO PAL_LINE(GPIOA, 13U) +#define LINE_SWCLK PAL_LINE(GPIOA, 14U) +#define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U) +#define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U) +#define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U) +#define LINE_MEMS_CS PAL_LINE(GPIOC, 0U) +#define LINE_LED_RED PAL_LINE(GPIOC, 6U) +#define LINE_LED_BLUE PAL_LINE(GPIOC, 7U) +#define LINE_LED_ORANGE PAL_LINE(GPIOC, 8U) +#define LINE_LED_GREEN PAL_LINE(GPIOC, 9U) +#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) +#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) +#define LINE_OSC_IN PAL_LINE(GPIOF, 0U) +#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/* + * I/O ports initial setup, this configuration is established soon after reset + * in the initialization code. + * Please refer to the STM32 Reference Manual for details. + */ +#define PIN_MODE_INPUT(n) (0U << ((n)*2U)) +#define PIN_MODE_OUTPUT(n) (1U << ((n)*2U)) +#define PIN_MODE_ALTERNATE(n) (2U << ((n)*2U)) +#define PIN_MODE_ANALOG(n) (3U << ((n)*2U)) +#define PIN_ODR_LOW(n) (0U << (n)) +#define PIN_ODR_HIGH(n) (1U << (n)) +#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) +#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) +#define PIN_OSPEED_VERYLOW(n) (0U << ((n)*2U)) +#define PIN_OSPEED_LOW(n) (1U << ((n)*2U)) +#define PIN_OSPEED_MEDIUM(n) (2U << ((n)*2U)) +#define PIN_OSPEED_HIGH(n) (3U << ((n)*2U)) +#define PIN_PUPDR_FLOATING(n) (0U << ((n)*2U)) +#define PIN_PUPDR_PULLUP(n) (1U << ((n)*2U)) +#define PIN_PUPDR_PULLDOWN(n) (2U << ((n)*2U)) +#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) + +/* + * GPIOA setup: + * + * PA0 - BUTTON (input floating). + * PA1 - PIN1 (input pullup). + * PA2 - PIN2 (input pullup). + * PA3 - PIN3 (input pullup). + * PA4 - PIN4 (input pullup). + * PA5 - PIN5 (input pullup). + * PA6 - PIN6 (input pullup). + * PA7 - PIN7 (input pullup). + * PA8 - PIN8 (input pullup). + * PA9 - PIN9 (input pullup). + * PA10 - PIN10 (input pullup). + * PA11 - USB_DM (input floating). + * PA12 - USB_DP (input floating). + * PA13 - SWDIO (alternate 0). + * PA14 - SWCLK (alternate 0). + * PA15 - PIN15 (input pullup). + */ +#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | PIN_MODE_INPUT(GPIOA_PIN1) | PIN_MODE_INPUT(GPIOA_PIN2) | PIN_MODE_INPUT(GPIOA_PIN3) | PIN_MODE_INPUT(GPIOA_PIN4) | PIN_MODE_INPUT(GPIOA_PIN5) | PIN_MODE_INPUT(GPIOA_PIN6) | PIN_MODE_INPUT(GPIOA_PIN7) | PIN_MODE_INPUT(GPIOA_PIN8) | PIN_MODE_INPUT(GPIOA_PIN9) | PIN_MODE_INPUT(GPIOA_PIN10) | PIN_MODE_INPUT(GPIOA_USB_DM) | PIN_MODE_INPUT(GPIOA_USB_DP) | PIN_MODE_ALTERNATE(GPIOA_SWDIO) | PIN_MODE_ALTERNATE(GPIOA_SWCLK) | PIN_MODE_INPUT(GPIOA_PIN15)) +#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) +#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_BUTTON) | PIN_OSPEED_VERYLOW(GPIOA_PIN1) | PIN_OSPEED_VERYLOW(GPIOA_PIN2) | PIN_OSPEED_VERYLOW(GPIOA_PIN3) | PIN_OSPEED_VERYLOW(GPIOA_PIN4) | PIN_OSPEED_VERYLOW(GPIOA_PIN5) | PIN_OSPEED_VERYLOW(GPIOA_PIN6) | PIN_OSPEED_VERYLOW(GPIOA_PIN7) | PIN_OSPEED_VERYLOW(GPIOA_PIN8) | PIN_OSPEED_VERYLOW(GPIOA_PIN9) | PIN_OSPEED_VERYLOW(GPIOA_PIN10) | PIN_OSPEED_VERYLOW(GPIOA_USB_DM) | PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | PIN_OSPEED_HIGH(GPIOA_SWDIO) | PIN_OSPEED_HIGH(GPIOA_SWCLK) | PIN_OSPEED_HIGH(GPIOA_PIN15)) +#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | PIN_PUPDR_PULLUP(GPIOA_PIN1) | PIN_PUPDR_PULLUP(GPIOA_PIN2) | PIN_PUPDR_PULLUP(GPIOA_PIN3) | PIN_PUPDR_PULLUP(GPIOA_PIN4) | PIN_PUPDR_PULLUP(GPIOA_PIN5) | PIN_PUPDR_PULLUP(GPIOA_PIN6) | PIN_PUPDR_PULLUP(GPIOA_PIN7) | PIN_PUPDR_PULLUP(GPIOA_PIN8) | PIN_PUPDR_PULLUP(GPIOA_PIN9) | PIN_PUPDR_PULLUP(GPIOA_PIN10) | PIN_PUPDR_FLOATING(GPIOA_USB_DM) | PIN_PUPDR_FLOATING(GPIOA_USB_DP) | PIN_PUPDR_PULLUP(GPIOA_SWDIO) | PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | PIN_PUPDR_PULLUP(GPIOA_PIN15)) +#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | PIN_ODR_HIGH(GPIOA_PIN1) | PIN_ODR_HIGH(GPIOA_PIN2) | PIN_ODR_HIGH(GPIOA_PIN3) | PIN_ODR_HIGH(GPIOA_PIN4) | PIN_ODR_HIGH(GPIOA_PIN5) | PIN_ODR_HIGH(GPIOA_PIN6) | PIN_ODR_HIGH(GPIOA_PIN7) | PIN_ODR_HIGH(GPIOA_PIN8) | PIN_ODR_HIGH(GPIOA_PIN9) | PIN_ODR_HIGH(GPIOA_PIN10) | PIN_ODR_HIGH(GPIOA_USB_DM) | PIN_ODR_HIGH(GPIOA_USB_DP) | PIN_ODR_HIGH(GPIOA_SWDIO) | PIN_ODR_HIGH(GPIOA_SWCLK) | PIN_ODR_HIGH(GPIOA_PIN15)) +#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0U) | PIN_AFIO_AF(GPIOA_PIN1, 0U) | PIN_AFIO_AF(GPIOA_PIN2, 0U) | PIN_AFIO_AF(GPIOA_PIN3, 0U) | PIN_AFIO_AF(GPIOA_PIN4, 0U) | PIN_AFIO_AF(GPIOA_PIN5, 0U) | PIN_AFIO_AF(GPIOA_PIN6, 0U) | PIN_AFIO_AF(GPIOA_PIN7, 0U)) +#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | PIN_AFIO_AF(GPIOA_PIN9, 0U) | PIN_AFIO_AF(GPIOA_PIN10, 0U) | PIN_AFIO_AF(GPIOA_USB_DM, 0U) | PIN_AFIO_AF(GPIOA_USB_DP, 0U) | PIN_AFIO_AF(GPIOA_SWDIO, 0U) | PIN_AFIO_AF(GPIOA_SWCLK, 0U) | PIN_AFIO_AF(GPIOA_PIN15, 0U)) + +/* + * GPIOB setup: + * + * PB0 - PIN0 (input pullup). + * PB1 - PIN1 (input pullup). + * PB2 - PIN2 (input pullup). + * PB3 - PIN3 (input pullup). + * PB4 - PIN4 (input pullup). + * PB5 - PIN5 (input pullup). + * PB6 - PIN6 (input pullup). + * PB7 - PIN7 (input pullup). + * PB8 - PIN8 (input pullup). + * PB9 - PIN9 (input pullup). + * PB10 - PIN10 (input pullup). + * PB11 - PIN11 (input pullup). + * PB12 - PIN12 (input pullup). + * PB13 - SPI2_SCK (alternate 0). + * PB14 - SPI2_MISO (alternate 0). + * PB15 - SPI2_MOSI (alternate 0). + */ +#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | PIN_MODE_INPUT(GPIOB_PIN1) | PIN_MODE_INPUT(GPIOB_PIN2) | PIN_MODE_INPUT(GPIOB_PIN3) | PIN_MODE_INPUT(GPIOB_PIN4) | PIN_MODE_INPUT(GPIOB_PIN5) | PIN_MODE_INPUT(GPIOB_PIN6) | PIN_MODE_INPUT(GPIOB_PIN7) | PIN_MODE_INPUT(GPIOB_PIN8) | PIN_MODE_INPUT(GPIOB_PIN9) | PIN_MODE_INPUT(GPIOB_PIN10) | PIN_MODE_INPUT(GPIOB_PIN11) | PIN_MODE_INPUT(GPIOB_PIN12) | PIN_MODE_ALTERNATE(GPIOB_SPI2_SCK) | PIN_MODE_ALTERNATE(GPIOB_SPI2_MISO) | PIN_MODE_ALTERNATE(GPIOB_SPI2_MOSI)) +#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | PIN_OTYPE_PUSHPULL(GPIOB_SPI2_SCK) | PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MISO) | PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MOSI)) +#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | PIN_OSPEED_VERYLOW(GPIOB_PIN1) | PIN_OSPEED_HIGH(GPIOB_PIN2) | PIN_OSPEED_HIGH(GPIOB_PIN3) | PIN_OSPEED_HIGH(GPIOB_PIN4) | PIN_OSPEED_VERYLOW(GPIOB_PIN5) | PIN_OSPEED_VERYLOW(GPIOB_PIN6) | PIN_OSPEED_VERYLOW(GPIOB_PIN7) | PIN_OSPEED_VERYLOW(GPIOB_PIN8) | PIN_OSPEED_VERYLOW(GPIOB_PIN9) | PIN_OSPEED_VERYLOW(GPIOB_PIN10) | PIN_OSPEED_VERYLOW(GPIOB_PIN11) | PIN_OSPEED_VERYLOW(GPIOB_PIN12) | PIN_OSPEED_VERYLOW(GPIOB_SPI2_SCK) | PIN_OSPEED_VERYLOW(GPIOB_SPI2_MISO) | PIN_OSPEED_VERYLOW(GPIOB_SPI2_MOSI)) +#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | PIN_PUPDR_PULLUP(GPIOB_PIN1) | PIN_PUPDR_PULLUP(GPIOB_PIN2) | PIN_PUPDR_PULLUP(GPIOB_PIN3) | PIN_PUPDR_PULLUP(GPIOB_PIN4) | PIN_PUPDR_PULLUP(GPIOB_PIN5) | PIN_PUPDR_PULLUP(GPIOB_PIN6) | PIN_PUPDR_PULLUP(GPIOB_PIN7) | PIN_PUPDR_PULLUP(GPIOB_PIN8) | PIN_PUPDR_PULLUP(GPIOB_PIN9) | PIN_PUPDR_PULLUP(GPIOB_PIN10) | PIN_PUPDR_PULLUP(GPIOB_PIN11) | PIN_PUPDR_PULLUP(GPIOB_PIN12) | PIN_PUPDR_FLOATING(GPIOB_SPI2_SCK) | PIN_PUPDR_FLOATING(GPIOB_SPI2_MISO) | PIN_PUPDR_FLOATING(GPIOB_SPI2_MOSI)) +#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | PIN_ODR_HIGH(GPIOB_PIN1) | PIN_ODR_HIGH(GPIOB_PIN2) | PIN_ODR_HIGH(GPIOB_PIN3) | PIN_ODR_HIGH(GPIOB_PIN4) | PIN_ODR_HIGH(GPIOB_PIN5) | PIN_ODR_HIGH(GPIOB_PIN6) | PIN_ODR_HIGH(GPIOB_PIN7) | PIN_ODR_HIGH(GPIOB_PIN8) | PIN_ODR_HIGH(GPIOB_PIN9) | PIN_ODR_HIGH(GPIOB_PIN10) | PIN_ODR_HIGH(GPIOB_PIN11) | PIN_ODR_HIGH(GPIOB_PIN12) | PIN_ODR_HIGH(GPIOB_SPI2_SCK) | PIN_ODR_HIGH(GPIOB_SPI2_MISO) | PIN_ODR_HIGH(GPIOB_SPI2_MOSI)) +#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | PIN_AFIO_AF(GPIOB_PIN1, 0U) | PIN_AFIO_AF(GPIOB_PIN2, 0U) | PIN_AFIO_AF(GPIOB_PIN3, 0U) | PIN_AFIO_AF(GPIOB_PIN4, 0U) | PIN_AFIO_AF(GPIOB_PIN5, 0U) | PIN_AFIO_AF(GPIOB_PIN6, 0U) | PIN_AFIO_AF(GPIOB_PIN7, 0U)) +#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | PIN_AFIO_AF(GPIOB_PIN9, 0U) | PIN_AFIO_AF(GPIOB_PIN10, 0U) | PIN_AFIO_AF(GPIOB_PIN11, 0U) | PIN_AFIO_AF(GPIOB_PIN12, 0U) | PIN_AFIO_AF(GPIOB_SPI2_SCK, 0U) | PIN_AFIO_AF(GPIOB_SPI2_MISO, 0U) | PIN_AFIO_AF(GPIOB_SPI2_MOSI, 0U)) + +/* + * GPIOC setup: + * + * PC0 - MEMS_CS (output pushpull maximum). + * PC1 - PIN1 (input pullup). + * PC2 - PIN2 (input pullup). + * PC3 - PIN3 (input pullup). + * PC4 - PIN4 (input pullup). + * PC5 - PIN5 (input pullup). + * PC6 - LED_RED (output pushpull maximum). + * PC7 - LED_BLUE (output pushpull maximum). + * PC8 - LED_ORANGE (output pushpull maximum). + * PC9 - LED_GREEN (output pushpull maximum). + * PC10 - PIN10 (input pullup). + * PC11 - PIN11 (input pullup). + * PC12 - PIN12 (input pullup). + * PC13 - PIN13 (input pullup). + * PC14 - OSC32_IN (input floating). + * PC15 - OSC32_OUT (input floating). + */ +#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_MEMS_CS) | PIN_MODE_INPUT(GPIOC_PIN1) | PIN_MODE_INPUT(GPIOC_PIN2) | PIN_MODE_INPUT(GPIOC_PIN3) | PIN_MODE_INPUT(GPIOC_PIN4) | PIN_MODE_INPUT(GPIOC_PIN5) | PIN_MODE_OUTPUT(GPIOC_LED_RED) | PIN_MODE_OUTPUT(GPIOC_LED_BLUE) | PIN_MODE_OUTPUT(GPIOC_LED_ORANGE) | PIN_MODE_OUTPUT(GPIOC_LED_GREEN) | PIN_MODE_INPUT(GPIOC_PIN10) | PIN_MODE_INPUT(GPIOC_PIN11) | PIN_MODE_INPUT(GPIOC_PIN12) | PIN_MODE_INPUT(GPIOC_PIN13) | PIN_MODE_INPUT(GPIOC_OSC32_IN) | PIN_MODE_INPUT(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_MEMS_CS) | PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | PIN_OTYPE_PUSHPULL(GPIOC_LED_RED) | PIN_OTYPE_PUSHPULL(GPIOC_LED_BLUE) | PIN_OTYPE_PUSHPULL(GPIOC_LED_ORANGE) | PIN_OTYPE_PUSHPULL(GPIOC_LED_GREEN) | PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_MEMS_CS) | PIN_OSPEED_VERYLOW(GPIOC_PIN1) | PIN_OSPEED_VERYLOW(GPIOC_PIN2) | PIN_OSPEED_VERYLOW(GPIOC_PIN3) | PIN_OSPEED_VERYLOW(GPIOC_PIN4) | PIN_OSPEED_VERYLOW(GPIOC_PIN5) | PIN_OSPEED_HIGH(GPIOC_LED_RED) | PIN_OSPEED_HIGH(GPIOC_LED_BLUE) | PIN_OSPEED_HIGH(GPIOC_LED_ORANGE) | PIN_OSPEED_HIGH(GPIOC_LED_GREEN) | PIN_OSPEED_VERYLOW(GPIOC_PIN10) | PIN_OSPEED_VERYLOW(GPIOC_PIN11) | PIN_OSPEED_VERYLOW(GPIOC_PIN12) | PIN_OSPEED_VERYLOW(GPIOC_PIN13) | PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | PIN_OSPEED_HIGH(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_MEMS_CS) | PIN_PUPDR_PULLUP(GPIOC_PIN1) | PIN_PUPDR_PULLUP(GPIOC_PIN2) | PIN_PUPDR_PULLUP(GPIOC_PIN3) | PIN_PUPDR_PULLUP(GPIOC_PIN4) | PIN_PUPDR_PULLUP(GPIOC_PIN5) | PIN_PUPDR_FLOATING(GPIOC_LED_RED) | PIN_PUPDR_FLOATING(GPIOC_LED_BLUE) | PIN_PUPDR_FLOATING(GPIOC_LED_ORANGE) | PIN_PUPDR_FLOATING(GPIOC_LED_GREEN) | PIN_PUPDR_PULLUP(GPIOC_PIN10) | PIN_PUPDR_PULLUP(GPIOC_PIN11) | PIN_PUPDR_PULLUP(GPIOC_PIN12) | PIN_PUPDR_PULLUP(GPIOC_PIN13) | PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_MEMS_CS) | PIN_ODR_HIGH(GPIOC_PIN1) | PIN_ODR_HIGH(GPIOC_PIN2) | PIN_ODR_HIGH(GPIOC_PIN3) | PIN_ODR_HIGH(GPIOC_PIN4) | PIN_ODR_HIGH(GPIOC_PIN5) | PIN_ODR_LOW(GPIOC_LED_RED) | PIN_ODR_LOW(GPIOC_LED_BLUE) | PIN_ODR_LOW(GPIOC_LED_ORANGE) | PIN_ODR_LOW(GPIOC_LED_GREEN) | PIN_ODR_HIGH(GPIOC_PIN10) | PIN_ODR_HIGH(GPIOC_PIN11) | PIN_ODR_HIGH(GPIOC_PIN12) | PIN_ODR_HIGH(GPIOC_PIN13) | PIN_ODR_HIGH(GPIOC_OSC32_IN) | PIN_ODR_HIGH(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_MEMS_CS, 0U) | PIN_AFIO_AF(GPIOC_PIN1, 0U) | PIN_AFIO_AF(GPIOC_PIN2, 0U) | PIN_AFIO_AF(GPIOC_PIN3, 0U) | PIN_AFIO_AF(GPIOC_PIN4, 0U) | PIN_AFIO_AF(GPIOC_PIN5, 0U) | PIN_AFIO_AF(GPIOC_LED_RED, 0U) | PIN_AFIO_AF(GPIOC_LED_BLUE, 0U)) +#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_LED_ORANGE, 0U) | PIN_AFIO_AF(GPIOC_LED_GREEN, 0U) | PIN_AFIO_AF(GPIOC_PIN10, 0U) | PIN_AFIO_AF(GPIOC_PIN11, 0U) | PIN_AFIO_AF(GPIOC_PIN12, 0U) | PIN_AFIO_AF(GPIOC_PIN13, 0U) | PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U)) + +/* + * GPIOD setup: + * + * PD0 - PIN0 (input pullup). + * PD1 - PIN1 (input pullup). + * PD2 - PIN2 (input pullup). + * PD3 - PIN3 (input pullup). + * PD4 - PIN4 (input pullup). + * PD5 - PIN5 (input pullup). + * PD6 - PIN6 (input pullup). + * PD7 - PIN7 (input pullup). + * PD8 - PIN8 (input pullup). + * PD9 - PIN9 (input pullup). + * PD10 - PIN10 (input pullup). + * PD11 - PIN11 (input pullup). + * PD12 - PIN12 (input pullup). + * PD13 - PIN13 (input pullup). + * PD14 - PIN14 (input pullup). + * PD15 - PIN15 (input pullup). + */ +#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | PIN_MODE_INPUT(GPIOD_PIN1) | PIN_MODE_INPUT(GPIOD_PIN2) | PIN_MODE_INPUT(GPIOD_PIN3) | PIN_MODE_INPUT(GPIOD_PIN4) | PIN_MODE_INPUT(GPIOD_PIN5) | PIN_MODE_INPUT(GPIOD_PIN6) | PIN_MODE_INPUT(GPIOD_PIN7) | PIN_MODE_INPUT(GPIOD_PIN8) | PIN_MODE_INPUT(GPIOD_PIN9) | PIN_MODE_INPUT(GPIOD_PIN10) | PIN_MODE_INPUT(GPIOD_PIN11) | PIN_MODE_INPUT(GPIOD_PIN12) | PIN_MODE_INPUT(GPIOD_PIN13) | PIN_MODE_INPUT(GPIOD_PIN14) | PIN_MODE_INPUT(GPIOD_PIN15)) +#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) +#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | PIN_OSPEED_VERYLOW(GPIOD_PIN1) | PIN_OSPEED_VERYLOW(GPIOD_PIN2) | PIN_OSPEED_VERYLOW(GPIOD_PIN3) | PIN_OSPEED_VERYLOW(GPIOD_PIN4) | PIN_OSPEED_VERYLOW(GPIOD_PIN5) | PIN_OSPEED_VERYLOW(GPIOD_PIN6) | PIN_OSPEED_VERYLOW(GPIOD_PIN7) | PIN_OSPEED_VERYLOW(GPIOD_PIN8) | PIN_OSPEED_VERYLOW(GPIOD_PIN9) | PIN_OSPEED_VERYLOW(GPIOD_PIN10) | PIN_OSPEED_VERYLOW(GPIOD_PIN11) | PIN_OSPEED_VERYLOW(GPIOD_PIN12) | PIN_OSPEED_VERYLOW(GPIOD_PIN13) | PIN_OSPEED_VERYLOW(GPIOD_PIN14) | PIN_OSPEED_VERYLOW(GPIOD_PIN15)) +#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | PIN_PUPDR_PULLUP(GPIOD_PIN1) | PIN_PUPDR_PULLUP(GPIOD_PIN2) | PIN_PUPDR_PULLUP(GPIOD_PIN3) | PIN_PUPDR_PULLUP(GPIOD_PIN4) | PIN_PUPDR_PULLUP(GPIOD_PIN5) | PIN_PUPDR_PULLUP(GPIOD_PIN6) | PIN_PUPDR_PULLUP(GPIOD_PIN7) | PIN_PUPDR_PULLUP(GPIOD_PIN8) | PIN_PUPDR_PULLUP(GPIOD_PIN9) | PIN_PUPDR_PULLUP(GPIOD_PIN10) | PIN_PUPDR_PULLUP(GPIOD_PIN11) | PIN_PUPDR_PULLUP(GPIOD_PIN12) | PIN_PUPDR_PULLUP(GPIOD_PIN13) | PIN_PUPDR_PULLUP(GPIOD_PIN14) | PIN_PUPDR_PULLUP(GPIOD_PIN15)) +#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | PIN_ODR_HIGH(GPIOD_PIN1) | PIN_ODR_HIGH(GPIOD_PIN2) | PIN_ODR_HIGH(GPIOD_PIN3) | PIN_ODR_HIGH(GPIOD_PIN4) | PIN_ODR_HIGH(GPIOD_PIN5) | PIN_ODR_HIGH(GPIOD_PIN6) | PIN_ODR_HIGH(GPIOD_PIN7) | PIN_ODR_HIGH(GPIOD_PIN8) | PIN_ODR_HIGH(GPIOD_PIN9) | PIN_ODR_HIGH(GPIOD_PIN10) | PIN_ODR_HIGH(GPIOD_PIN11) | PIN_ODR_HIGH(GPIOD_PIN12) | PIN_ODR_HIGH(GPIOD_PIN13) | PIN_ODR_HIGH(GPIOD_PIN14) | PIN_ODR_HIGH(GPIOD_PIN15)) +#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | PIN_AFIO_AF(GPIOD_PIN1, 0U) | PIN_AFIO_AF(GPIOD_PIN2, 0U) | PIN_AFIO_AF(GPIOD_PIN3, 0U) | PIN_AFIO_AF(GPIOD_PIN4, 0U) | PIN_AFIO_AF(GPIOD_PIN5, 0U) | PIN_AFIO_AF(GPIOD_PIN6, 0U) | PIN_AFIO_AF(GPIOD_PIN7, 0U)) +#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | PIN_AFIO_AF(GPIOD_PIN9, 0U) | PIN_AFIO_AF(GPIOD_PIN10, 0U) | PIN_AFIO_AF(GPIOD_PIN11, 0U) | PIN_AFIO_AF(GPIOD_PIN12, 0U) | PIN_AFIO_AF(GPIOD_PIN13, 0U) | PIN_AFIO_AF(GPIOD_PIN14, 0U) | PIN_AFIO_AF(GPIOD_PIN15, 0U)) + +/* + * GPIOE setup: + * + * PE0 - PIN0 (input pullup). + * PE1 - PIN1 (input pullup). + * PE2 - PIN2 (input pullup). + * PE3 - PIN3 (input pullup). + * PE4 - PIN4 (input pullup). + * PE5 - PIN5 (input pullup). + * PE6 - PIN6 (input pullup). + * PE7 - PIN7 (input pullup). + * PE8 - PIN8 (input pullup). + * PE9 - PIN9 (input pullup). + * PE10 - PIN10 (input pullup). + * PE11 - PIN11 (input pullup). + * PE12 - PIN12 (input pullup). + * PE13 - PIN13 (input pullup). + * PE14 - PIN14 (input pullup). + * PE15 - PIN15 (input pullup). + */ +#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | PIN_MODE_INPUT(GPIOE_PIN1) | PIN_MODE_INPUT(GPIOE_PIN2) | PIN_MODE_INPUT(GPIOE_PIN3) | PIN_MODE_INPUT(GPIOE_PIN4) | PIN_MODE_INPUT(GPIOE_PIN5) | PIN_MODE_INPUT(GPIOE_PIN6) | PIN_MODE_INPUT(GPIOE_PIN7) | PIN_MODE_INPUT(GPIOE_PIN8) | PIN_MODE_INPUT(GPIOE_PIN9) | PIN_MODE_INPUT(GPIOE_PIN10) | PIN_MODE_INPUT(GPIOE_PIN11) | PIN_MODE_INPUT(GPIOE_PIN12) | PIN_MODE_INPUT(GPIOE_PIN13) | PIN_MODE_INPUT(GPIOE_PIN14) | PIN_MODE_INPUT(GPIOE_PIN15)) +#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) +#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) | PIN_OSPEED_VERYLOW(GPIOE_PIN1) | PIN_OSPEED_VERYLOW(GPIOE_PIN2) | PIN_OSPEED_VERYLOW(GPIOE_PIN3) | PIN_OSPEED_VERYLOW(GPIOE_PIN4) | PIN_OSPEED_VERYLOW(GPIOE_PIN5) | PIN_OSPEED_VERYLOW(GPIOE_PIN6) | PIN_OSPEED_VERYLOW(GPIOE_PIN7) | PIN_OSPEED_VERYLOW(GPIOE_PIN8) | PIN_OSPEED_VERYLOW(GPIOE_PIN9) | PIN_OSPEED_VERYLOW(GPIOE_PIN10) | PIN_OSPEED_VERYLOW(GPIOE_PIN11) | PIN_OSPEED_VERYLOW(GPIOE_PIN12) | PIN_OSPEED_VERYLOW(GPIOE_PIN13) | PIN_OSPEED_VERYLOW(GPIOE_PIN14) | PIN_OSPEED_VERYLOW(GPIOE_PIN15)) +#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | PIN_PUPDR_PULLUP(GPIOE_PIN1) | PIN_PUPDR_PULLUP(GPIOE_PIN2) | PIN_PUPDR_PULLUP(GPIOE_PIN3) | PIN_PUPDR_PULLUP(GPIOE_PIN4) | PIN_PUPDR_PULLUP(GPIOE_PIN5) | PIN_PUPDR_PULLUP(GPIOE_PIN6) | PIN_PUPDR_PULLUP(GPIOE_PIN7) | PIN_PUPDR_PULLUP(GPIOE_PIN8) | PIN_PUPDR_PULLUP(GPIOE_PIN9) | PIN_PUPDR_PULLUP(GPIOE_PIN10) | PIN_PUPDR_PULLUP(GPIOE_PIN11) | PIN_PUPDR_PULLUP(GPIOE_PIN12) | PIN_PUPDR_PULLUP(GPIOE_PIN13) | PIN_PUPDR_PULLUP(GPIOE_PIN14) | PIN_PUPDR_PULLUP(GPIOE_PIN15)) +#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | PIN_ODR_HIGH(GPIOE_PIN1) | PIN_ODR_HIGH(GPIOE_PIN2) | PIN_ODR_HIGH(GPIOE_PIN3) | PIN_ODR_HIGH(GPIOE_PIN4) | PIN_ODR_HIGH(GPIOE_PIN5) | PIN_ODR_HIGH(GPIOE_PIN6) | PIN_ODR_HIGH(GPIOE_PIN7) | PIN_ODR_HIGH(GPIOE_PIN8) | PIN_ODR_HIGH(GPIOE_PIN9) | PIN_ODR_HIGH(GPIOE_PIN10) | PIN_ODR_HIGH(GPIOE_PIN11) | PIN_ODR_HIGH(GPIOE_PIN12) | PIN_ODR_HIGH(GPIOE_PIN13) | PIN_ODR_HIGH(GPIOE_PIN14) | PIN_ODR_HIGH(GPIOE_PIN15)) +#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | PIN_AFIO_AF(GPIOE_PIN1, 0U) | PIN_AFIO_AF(GPIOE_PIN2, 0U) | PIN_AFIO_AF(GPIOE_PIN3, 0U) | PIN_AFIO_AF(GPIOE_PIN4, 0U) | PIN_AFIO_AF(GPIOE_PIN5, 0U) | PIN_AFIO_AF(GPIOE_PIN6, 0U) | PIN_AFIO_AF(GPIOE_PIN7, 0U)) +#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | PIN_AFIO_AF(GPIOE_PIN9, 0U) | PIN_AFIO_AF(GPIOE_PIN10, 0U) | PIN_AFIO_AF(GPIOE_PIN11, 0U) | PIN_AFIO_AF(GPIOE_PIN12, 0U) | PIN_AFIO_AF(GPIOE_PIN13, 0U) | PIN_AFIO_AF(GPIOE_PIN14, 0U) | PIN_AFIO_AF(GPIOE_PIN15, 0U)) + +/* + * GPIOF setup: + * + * PF0 - OSC_IN (input floating). + * PF1 - OSC_OUT (input floating). + * PF2 - PIN2 (input pullup). + * PF3 - PIN3 (input pullup). + * PF4 - PIN4 (input pullup). + * PF5 - PIN5 (input pullup). + * PF6 - PIN6 (input pullup). + * PF7 - PIN7 (input pullup). + * PF8 - PIN8 (input pullup). + * PF9 - PIN9 (input pullup). + * PF10 - PIN10 (input pullup). + * PF11 - PIN11 (input pullup). + * PF12 - PIN12 (input pullup). + * PF13 - PIN13 (input pullup). + * PF14 - PIN14 (input pullup). + * PF15 - PIN15 (input pullup). + */ +#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_OSC_IN) | PIN_MODE_INPUT(GPIOF_OSC_OUT) | PIN_MODE_INPUT(GPIOF_PIN2) | PIN_MODE_INPUT(GPIOF_PIN3) | PIN_MODE_INPUT(GPIOF_PIN4) | PIN_MODE_INPUT(GPIOF_PIN5) | PIN_MODE_INPUT(GPIOF_PIN6) | PIN_MODE_INPUT(GPIOF_PIN7) | PIN_MODE_INPUT(GPIOF_PIN8) | PIN_MODE_INPUT(GPIOF_PIN9) | PIN_MODE_INPUT(GPIOF_PIN10) | PIN_MODE_INPUT(GPIOF_PIN11) | PIN_MODE_INPUT(GPIOF_PIN12) | PIN_MODE_INPUT(GPIOF_PIN13) | PIN_MODE_INPUT(GPIOF_PIN14) | PIN_MODE_INPUT(GPIOF_PIN15)) +#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) | PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT) | PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) +#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOF_OSC_IN) | PIN_OSPEED_VERYLOW(GPIOF_OSC_OUT) | PIN_OSPEED_VERYLOW(GPIOF_PIN2) | PIN_OSPEED_VERYLOW(GPIOF_PIN3) | PIN_OSPEED_VERYLOW(GPIOF_PIN4) | PIN_OSPEED_VERYLOW(GPIOF_PIN5) | PIN_OSPEED_VERYLOW(GPIOF_PIN6) | PIN_OSPEED_VERYLOW(GPIOF_PIN7) | PIN_OSPEED_VERYLOW(GPIOF_PIN8) | PIN_OSPEED_VERYLOW(GPIOF_PIN9) | PIN_OSPEED_VERYLOW(GPIOF_PIN10) | PIN_OSPEED_VERYLOW(GPIOF_PIN11) | PIN_OSPEED_VERYLOW(GPIOF_PIN12) | PIN_OSPEED_VERYLOW(GPIOF_PIN13) | PIN_OSPEED_VERYLOW(GPIOF_PIN14) | PIN_OSPEED_VERYLOW(GPIOF_PIN15)) +#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) | PIN_PUPDR_FLOATING(GPIOF_OSC_OUT) | PIN_PUPDR_PULLUP(GPIOF_PIN2) | PIN_PUPDR_PULLUP(GPIOF_PIN3) | PIN_PUPDR_PULLUP(GPIOF_PIN4) | PIN_PUPDR_PULLUP(GPIOF_PIN5) | PIN_PUPDR_PULLUP(GPIOF_PIN6) | PIN_PUPDR_PULLUP(GPIOF_PIN7) | PIN_PUPDR_PULLUP(GPIOF_PIN8) | PIN_PUPDR_PULLUP(GPIOF_PIN9) | PIN_PUPDR_PULLUP(GPIOF_PIN10) | PIN_PUPDR_PULLUP(GPIOF_PIN11) | PIN_PUPDR_PULLUP(GPIOF_PIN12) | PIN_PUPDR_PULLUP(GPIOF_PIN13) | PIN_PUPDR_PULLUP(GPIOF_PIN14) | PIN_PUPDR_PULLUP(GPIOF_PIN15)) +#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_OSC_IN) | PIN_ODR_HIGH(GPIOF_OSC_OUT) | PIN_ODR_HIGH(GPIOF_PIN2) | PIN_ODR_HIGH(GPIOF_PIN3) | PIN_ODR_HIGH(GPIOF_PIN4) | PIN_ODR_HIGH(GPIOF_PIN5) | PIN_ODR_HIGH(GPIOF_PIN6) | PIN_ODR_HIGH(GPIOF_PIN7) | PIN_ODR_HIGH(GPIOF_PIN8) | PIN_ODR_HIGH(GPIOF_PIN9) | PIN_ODR_HIGH(GPIOF_PIN10) | PIN_ODR_HIGH(GPIOF_PIN11) | PIN_ODR_HIGH(GPIOF_PIN12) | PIN_ODR_HIGH(GPIOF_PIN13) | PIN_ODR_HIGH(GPIOF_PIN14) | PIN_ODR_HIGH(GPIOF_PIN15)) +#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0U) | PIN_AFIO_AF(GPIOF_OSC_OUT, 0U) | PIN_AFIO_AF(GPIOF_PIN2, 0U) | PIN_AFIO_AF(GPIOF_PIN3, 0U) | PIN_AFIO_AF(GPIOF_PIN4, 0U) | PIN_AFIO_AF(GPIOF_PIN5, 0U) | PIN_AFIO_AF(GPIOF_PIN6, 0U) | PIN_AFIO_AF(GPIOF_PIN7, 0U)) +#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | PIN_AFIO_AF(GPIOF_PIN9, 0U) | PIN_AFIO_AF(GPIOF_PIN10, 0U) | PIN_AFIO_AF(GPIOF_PIN11, 0U) | PIN_AFIO_AF(GPIOF_PIN12, 0U) | PIN_AFIO_AF(GPIOF_PIN13, 0U) | PIN_AFIO_AF(GPIOF_PIN14, 0U) | PIN_AFIO_AF(GPIOF_PIN15, 0U)) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if !defined(_FROM_ASM_) +# ifdef __cplusplus +extern "C" { +# endif +void boardInit(void); +# ifdef __cplusplus +} +# endif +#endif /* _FROM_ASM_ */ + +#endif /* BOARD_H */ diff --git a/platforms/chibios/GENERIC_STM32_F072XB/board/board.mk b/platforms/chibios/GENERIC_STM32_F072XB/board/board.mk new file mode 100644 index 000000000..842e33590 --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F072XB/board/board.mk @@ -0,0 +1,9 @@ +# List of all the board related files. +BOARDSRC = $(BOARD_PATH)/board/board.c + +# Required include directories +BOARDINC = $(BOARD_PATH)/board + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/platforms/chibios/GENERIC_STM32_F072XB/configs/bootloader_defs.h b/platforms/chibios/GENERIC_STM32_F072XB/configs/bootloader_defs.h new file mode 100644 index 000000000..02c48c4e6 --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F072XB/configs/bootloader_defs.h @@ -0,0 +1,7 @@ +/* Address for jumping to bootloader on STM32 chips. */ +/* It is chip dependent, the correct number can be looked up here (page 175): + * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf + * This also requires a patch to chibios: + * /tmk_core/tool/chibios/ch-bootloader-jump.patch + */ +#define STM32_BOOTLOADER_ADDRESS 0x1FFFC800 diff --git a/platforms/chibios/GENERIC_STM32_F303XC/board/board.c b/platforms/chibios/GENERIC_STM32_F303XC/board/board.c new file mode 100644 index 000000000..4722acd64 --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F303XC/board/board.c @@ -0,0 +1,242 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * This file has been automatically generated using ChibiStudio board + * generator plugin. Do not edit manually. + */ + +#include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; + +/** + * @brief STM32 GPIO static initialization data. + */ +static const gpio_config_t gpio_default_config = { +#if STM32_HAS_GPIOA + {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, +#endif +#if STM32_HAS_GPIOB + {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, +#endif +#if STM32_HAS_GPIOC + {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, +#endif +#if STM32_HAS_GPIOD + {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, +#endif +#if STM32_HAS_GPIOE + {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, +#endif +#if STM32_HAS_GPIOF + {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, +#endif +#if STM32_HAS_GPIOG + {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, +#endif +#if STM32_HAS_GPIOH + {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, +#endif +#if STM32_HAS_GPIOI + {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} +#endif +}; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +__attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} + +/** + * @brief Early initialization code. + * @details This initialization must be performed just after stack setup + * and before any other initialization. + */ +void __early_init(void) { + enter_bootloader_mode_if_requested(); + + stm32_gpio_init(); + stm32_clock_init(); +} + +#if HAL_USE_SDC || defined(__DOXYGEN__) +/** + * @brief SDC card detection. + */ +bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { + (void)sdcp; + /* TODO: Fill the implementation.*/ + return true; +} + +/** + * @brief SDC card write protection detection. + */ +bool sdc_lld_is_write_protected(SDCDriver *sdcp) { + (void)sdcp; + /* TODO: Fill the implementation.*/ + return false; +} +#endif /* HAL_USE_SDC */ + +#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) +/** + * @brief MMC_SPI card detection. + */ +bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { + (void)mmcp; + /* TODO: Fill the implementation.*/ + return true; +} + +/** + * @brief MMC_SPI card write protection detection. + */ +bool mmc_lld_is_write_protected(MMCDriver *mmcp) { + (void)mmcp; + /* TODO: Fill the implementation.*/ + return false; +} +#endif + +/** + * @brief Board-specific initialization code. + * @todo Add your board-specific code, if any. + */ +void boardInit(void) {} diff --git a/platforms/chibios/GENERIC_STM32_F303XC/board/board.h b/platforms/chibios/GENERIC_STM32_F303XC/board/board.h new file mode 100644 index 000000000..3579c8277 --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F303XC/board/board.h @@ -0,0 +1,475 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* + * Setup for Generic STM32_F303 Board + */ + +/* + * Board identifier. + */ +#define BOARD_GENERIC_STM32_F303XC +#define BOARD_NAME "STM32_F303" + +/* + * Board oscillators-related settings. + * NOTE: LSE not fitted. + */ +#if !defined(STM32_LSECLK) +# define STM32_LSECLK 0U +#endif + +#define STM32_LSEDRV (3U << 3U) + +#if !defined(STM32_HSECLK) +# define STM32_HSECLK 8000000U +#endif + +// #define STM32_HSE_BYPASS + +/* + * MCU type as defined in the ST header. + */ +#define STM32F303xC + +/* + * IO pins assignments. + */ +#define GPIOA_PIN0 0U +#define GPIOA_PIN1 1U +#define GPIOA_PIN2 2U +#define GPIOA_PIN3 3U +#define GPIOA_PIN4 4U +#define GPIOA_PIN5 5U +#define GPIOA_PIN6 6U +#define GPIOA_PIN7 7U +#define GPIOA_PIN8 8U +#define GPIOA_PIN9 9U +#define GPIOA_PIN10 10U +#define GPIOA_USB_DM 11U +#define GPIOA_USB_DP 12U +#define GPIOA_SWDIO 13U +#define GPIOA_SWCLK 14U +#define GPIOA_PIN15 15U + +#define GPIOB_PIN0 0U +#define GPIOB_PIN1 1U +#define GPIOB_PIN2 2U +#define GPIOB_PIN3 3U +#define GPIOB_PIN4 4U +#define GPIOB_PIN5 5U +#define GPIOB_PIN6 6U +#define GPIOB_PIN7 7U +#define GPIOB_PIN8 8U +#define GPIOB_PIN9 9U +#define GPIOB_PIN10 10U +#define GPIOB_PIN11 11U +#define GPIOB_PIN12 12U +#define GPIOB_PIN13 13U +#define GPIOB_PIN14 14U +#define GPIOB_PIN15 15U + +#define GPIOC_PIN0 0U +#define GPIOC_PIN1 1U +#define GPIOC_PIN2 2U +#define GPIOC_PIN3 3U +#define GPIOC_PIN4 4U +#define GPIOC_PIN5 5U +#define GPIOC_PIN6 6U +#define GPIOC_PIN7 7U +#define GPIOC_PIN8 8U +#define GPIOC_PIN9 9U +#define GPIOC_PIN10 10U +#define GPIOC_PIN11 11U +#define GPIOC_PIN12 12U +#define GPIOC_PIN13 13U +#define GPIOC_PIN14 14U +#define GPIOC_PIN15 15U + +#define GPIOD_PIN0 0U +#define GPIOD_PIN1 1U +#define GPIOD_PIN2 2U +#define GPIOD_PIN3 3U +#define GPIOD_PIN4 4U +#define GPIOD_PIN5 5U +#define GPIOD_PIN6 6U +#define GPIOD_PIN7 7U +#define GPIOD_PIN8 8U +#define GPIOD_PIN9 9U +#define GPIOD_PIN10 10U +#define GPIOD_PIN11 11U +#define GPIOD_PIN12 12U +#define GPIOD_PIN13 13U +#define GPIOD_PIN14 14U +#define GPIOD_PIN15 15U + +#define GPIOE_PIN0 0U +#define GPIOE_PIN1 1U +#define GPIOE_PIN2 2U +#define GPIOE_PIN3 3U +#define GPIOE_PIN4 4U +#define GPIOE_PIN5 5U +#define GPIOE_PIN6 6U +#define GPIOE_PIN7 7U +#define GPIOE_PIN8 8U +#define GPIOE_PIN9 9U +#define GPIOE_PIN10 10U +#define GPIOE_PIN11 11U +#define GPIOE_PIN12 12U +#define GPIOE_PIN13 13U +#define GPIOE_PIN14 14U +#define GPIOE_PIN15 15U + +#define GPIOF_I2C2_SDA 0U +#define GPIOF_I2C2_SCL 1U +#define GPIOF_PIN2 2U +#define GPIOF_PIN3 3U +#define GPIOF_PIN4 4U +#define GPIOF_PIN5 5U +#define GPIOF_PIN6 6U +#define GPIOF_PIN7 7U +#define GPIOF_PIN8 8U +#define GPIOF_PIN9 9U +#define GPIOF_PIN10 10U +#define GPIOF_PIN11 11U +#define GPIOF_PIN12 12U +#define GPIOF_PIN13 13U +#define GPIOF_PIN14 14U +#define GPIOF_PIN15 15U + +#define GPIOG_PIN0 0U +#define GPIOG_PIN1 1U +#define GPIOG_PIN2 2U +#define GPIOG_PIN3 3U +#define GPIOG_PIN4 4U +#define GPIOG_PIN5 5U +#define GPIOG_PIN6 6U +#define GPIOG_PIN7 7U +#define GPIOG_PIN8 8U +#define GPIOG_PIN9 9U +#define GPIOG_PIN10 10U +#define GPIOG_PIN11 11U +#define GPIOG_PIN12 12U +#define GPIOG_PIN13 13U +#define GPIOG_PIN14 14U +#define GPIOG_PIN15 15U + +#define GPIOH_PIN0 0U +#define GPIOH_PIN1 1U +#define GPIOH_PIN2 2U +#define GPIOH_PIN3 3U +#define GPIOH_PIN4 4U +#define GPIOH_PIN5 5U +#define GPIOH_PIN6 6U +#define GPIOH_PIN7 7U +#define GPIOH_PIN8 8U +#define GPIOH_PIN9 9U +#define GPIOH_PIN10 10U +#define GPIOH_PIN11 11U +#define GPIOH_PIN12 12U +#define GPIOH_PIN13 13U +#define GPIOH_PIN14 14U +#define GPIOH_PIN15 15U + +/* + * IO lines assignments. + */ +#define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U) +#define LINE_USB_DM PAL_LINE(GPIOA, 11U) +#define LINE_USB_DP PAL_LINE(GPIOA, 12U) +#define LINE_SWDIO PAL_LINE(GPIOA, 13U) +#define LINE_SWCLK PAL_LINE(GPIOA, 14U) + +#define LINE_PIN6 PAL_LINE(GPIOF, 0U) +#define LINE_PIN7 PAL_LINE(GPIOF, 1U) + +#define LINE_CAPS_LOCK PAL_LINE(GPIOB, 7U) + +/* + * I/O ports initial setup, this configuration is established soon after reset + * in the initialization code. + * Please refer to the STM32 Reference Manual for details. + */ +#define PIN_MODE_INPUT(n) (0U << ((n)*2U)) +#define PIN_MODE_OUTPUT(n) (1U << ((n)*2U)) +#define PIN_MODE_ALTERNATE(n) (2U << ((n)*2U)) +#define PIN_MODE_ANALOG(n) (3U << ((n)*2U)) +#define PIN_ODR_LOW(n) (0U << (n)) +#define PIN_ODR_HIGH(n) (1U << (n)) +#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) +#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) +#define PIN_OSPEED_VERYLOW(n) (0U << ((n)*2U)) +#define PIN_OSPEED_LOW(n) (1U << ((n)*2U)) +#define PIN_OSPEED_MEDIUM(n) (2U << ((n)*2U)) +#define PIN_OSPEED_HIGH(n) (3U << ((n)*2U)) +#define PIN_PUPDR_FLOATING(n) (0U << ((n)*2U)) +#define PIN_PUPDR_PULLUP(n) (1U << ((n)*2U)) +#define PIN_PUPDR_PULLDOWN(n) (2U << ((n)*2U)) +#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) + +/* + * GPIOA setup: + * + * PA0 - NC + * PA1 - NC + * PA2 - COL1 + * PA3 - COL2 + * PA4 - SPEAKER1 + * PA5 - SPEAKER2 + * PA6 - COL3 + * PA7 - COL8 + * PA8 - COL6 + * PA9 - COL7 + * PA10 - ROW5 + * PA11 - USB_DM (alternate 14). + * PA12 - USB_DP (alternate 14). + * PA13 - SWDIO (alternate 0). + * PA14 - SWCLK (alternate 0). + * PA15 - ROW4 + */ +#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | PIN_MODE_ALTERNATE(GPIOA_PIN1) | PIN_MODE_INPUT(GPIOA_PIN2) | PIN_MODE_INPUT(GPIOA_PIN3) | PIN_MODE_INPUT(GPIOA_PIN4) | PIN_MODE_INPUT(GPIOA_PIN5) | PIN_MODE_INPUT(GPIOA_PIN6) | PIN_MODE_INPUT(GPIOA_PIN7) | PIN_MODE_INPUT(GPIOA_PIN8) | PIN_MODE_INPUT(GPIOA_PIN9) | PIN_MODE_INPUT(GPIOA_PIN10) | PIN_MODE_ALTERNATE(GPIOA_USB_DM) | PIN_MODE_ALTERNATE(GPIOA_USB_DP) | PIN_MODE_ALTERNATE(GPIOA_SWDIO) | PIN_MODE_ALTERNATE(GPIOA_SWCLK) | PIN_MODE_INPUT(GPIOA_PIN15)) +#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) +#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | PIN_OSPEED_HIGH(GPIOA_PIN1) | PIN_OSPEED_VERYLOW(GPIOA_PIN2) | PIN_OSPEED_VERYLOW(GPIOA_PIN3) | PIN_OSPEED_VERYLOW(GPIOA_PIN4) | PIN_OSPEED_VERYLOW(GPIOA_PIN5) | PIN_OSPEED_VERYLOW(GPIOA_PIN6) | PIN_OSPEED_VERYLOW(GPIOA_PIN7) | PIN_OSPEED_VERYLOW(GPIOA_PIN8) | PIN_OSPEED_VERYLOW(GPIOA_PIN9) | PIN_OSPEED_VERYLOW(GPIOA_PIN10) | PIN_OSPEED_HIGH(GPIOA_USB_DM) | PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | PIN_OSPEED_HIGH(GPIOA_SWDIO) | PIN_OSPEED_HIGH(GPIOA_SWCLK) | PIN_OSPEED_VERYLOW(GPIOA_PIN15)) +#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_PIN0) | PIN_PUPDR_FLOATING(GPIOA_PIN1) | PIN_PUPDR_PULLUP(GPIOA_PIN2) | PIN_PUPDR_PULLUP(GPIOA_PIN3) | PIN_PUPDR_PULLUP(GPIOA_PIN4) | PIN_PUPDR_PULLUP(GPIOA_PIN5) | PIN_PUPDR_PULLUP(GPIOA_PIN6) | PIN_PUPDR_FLOATING(GPIOA_PIN7) | PIN_PUPDR_PULLUP(GPIOA_PIN8) | PIN_PUPDR_PULLUP(GPIOA_PIN9) | PIN_PUPDR_PULLUP(GPIOA_PIN10) | PIN_PUPDR_FLOATING(GPIOA_USB_DM) | PIN_PUPDR_FLOATING(GPIOA_USB_DP) | PIN_PUPDR_PULLUP(GPIOA_SWDIO) | PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | PIN_PUPDR_PULLUP(GPIOA_PIN15)) +#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | PIN_ODR_HIGH(GPIOA_PIN1) | PIN_ODR_HIGH(GPIOA_PIN2) | PIN_ODR_HIGH(GPIOA_PIN3) | PIN_ODR_HIGH(GPIOA_PIN4) | PIN_ODR_HIGH(GPIOA_PIN5) | PIN_ODR_HIGH(GPIOA_PIN6) | PIN_ODR_HIGH(GPIOA_PIN7) | PIN_ODR_HIGH(GPIOA_PIN8) | PIN_ODR_HIGH(GPIOA_PIN9) | PIN_ODR_HIGH(GPIOA_PIN10) | PIN_ODR_HIGH(GPIOA_USB_DM) | PIN_ODR_HIGH(GPIOA_USB_DP) | PIN_ODR_HIGH(GPIOA_SWDIO) | PIN_ODR_HIGH(GPIOA_SWCLK) | PIN_ODR_HIGH(GPIOA_PIN15)) +#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | PIN_AFIO_AF(GPIOA_PIN1, 1) | PIN_AFIO_AF(GPIOA_PIN2, 0) | PIN_AFIO_AF(GPIOA_PIN3, 0) | PIN_AFIO_AF(GPIOA_PIN4, 0) | PIN_AFIO_AF(GPIOA_PIN5, 5) | PIN_AFIO_AF(GPIOA_PIN6, 5) | PIN_AFIO_AF(GPIOA_PIN7, 5)) +#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | PIN_AFIO_AF(GPIOA_PIN9, 0) | PIN_AFIO_AF(GPIOA_PIN10, 0) | PIN_AFIO_AF(GPIOA_USB_DM, 14) | PIN_AFIO_AF(GPIOA_USB_DP, 14) | PIN_AFIO_AF(GPIOA_SWDIO, 0) | PIN_AFIO_AF(GPIOA_SWCLK, 0) | PIN_AFIO_AF(GPIOA_PIN15, 0)) + +/* + * GPIOB setup: + * + * PB0 - PIN0 (input pullup). + * PB1 - PIN1 (input pullup). + * PB2 - PIN2 (input pullup). + * PB3 - PIN3 (alternate 0). + * PB4 - PIN4 (input pullup). + * PB5 - PIN5 (input pullup). + * PB6 - PIN6 LSM303DLHC_SCL (alternate 4). + * PB7 - PIN7 LSM303DLHC_SDA (alternate 4). + * PB8 - PIN8 (input pullup). + * PB9 - PIN9 (input pullup). + * PB10 - PIN10 (input pullup). + * PB11 - PIN11 (input pullup). + * PB12 - PIN12 (input pullup). + * PB13 - PIN13 (input pullup). + * PB14 - PIN14 (input pullup). + * PB15 - PIN15 (input pullup). + */ +#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | PIN_MODE_INPUT(GPIOB_PIN1) | PIN_MODE_INPUT(GPIOB_PIN2) | PIN_MODE_ALTERNATE(GPIOB_PIN3) | PIN_MODE_INPUT(GPIOB_PIN4) | PIN_MODE_INPUT(GPIOB_PIN5) | PIN_MODE_ALTERNATE(GPIOB_PIN6) | PIN_MODE_OUTPUT(GPIOB_PIN7) | PIN_MODE_INPUT(GPIOB_PIN8) | PIN_MODE_INPUT(GPIOB_PIN9) | PIN_MODE_INPUT(GPIOB_PIN10) | PIN_MODE_INPUT(GPIOB_PIN11) | PIN_MODE_INPUT(GPIOB_PIN12) | PIN_MODE_INPUT(GPIOB_PIN13) | PIN_MODE_INPUT(GPIOB_PIN14) | PIN_MODE_INPUT(GPIOB_PIN15)) +#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | PIN_OTYPE_OPENDRAIN(GPIOB_PIN6) | PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) +#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | PIN_OSPEED_VERYLOW(GPIOB_PIN1) | PIN_OSPEED_VERYLOW(GPIOB_PIN2) | PIN_OSPEED_HIGH(GPIOB_PIN3) | PIN_OSPEED_VERYLOW(GPIOB_PIN4) | PIN_OSPEED_VERYLOW(GPIOB_PIN5) | PIN_OSPEED_HIGH(GPIOB_PIN6) | PIN_OSPEED_VERYLOW(GPIOB_PIN7) | PIN_OSPEED_VERYLOW(GPIOB_PIN8) | PIN_OSPEED_VERYLOW(GPIOB_PIN9) | PIN_OSPEED_VERYLOW(GPIOB_PIN10) | PIN_OSPEED_VERYLOW(GPIOB_PIN11) | PIN_OSPEED_VERYLOW(GPIOB_PIN12) | PIN_OSPEED_VERYLOW(GPIOB_PIN13) | PIN_OSPEED_VERYLOW(GPIOB_PIN14) | PIN_OSPEED_VERYLOW(GPIOB_PIN15)) +#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | PIN_PUPDR_PULLUP(GPIOB_PIN1) | PIN_PUPDR_PULLUP(GPIOB_PIN2) | PIN_PUPDR_FLOATING(GPIOB_PIN3) | PIN_PUPDR_PULLUP(GPIOB_PIN4) | PIN_PUPDR_PULLUP(GPIOB_PIN5) | PIN_PUPDR_FLOATING(GPIOB_PIN6) | PIN_PUPDR_PULLDOWN(GPIOB_PIN7) | PIN_PUPDR_PULLUP(GPIOB_PIN8) | PIN_PUPDR_PULLUP(GPIOB_PIN9) | PIN_PUPDR_PULLUP(GPIOB_PIN10) | PIN_PUPDR_PULLUP(GPIOB_PIN11) | PIN_PUPDR_PULLUP(GPIOB_PIN12) | PIN_PUPDR_PULLUP(GPIOB_PIN13) | PIN_PUPDR_PULLUP(GPIOB_PIN14) | PIN_PUPDR_PULLUP(GPIOB_PIN15)) +#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | PIN_ODR_HIGH(GPIOB_PIN1) | PIN_ODR_HIGH(GPIOB_PIN2) | PIN_ODR_HIGH(GPIOB_PIN3) | PIN_ODR_HIGH(GPIOB_PIN4) | PIN_ODR_HIGH(GPIOB_PIN5) | PIN_ODR_HIGH(GPIOB_PIN6) | PIN_ODR_LOW(GPIOB_PIN7) | PIN_ODR_HIGH(GPIOB_PIN8) | PIN_ODR_HIGH(GPIOB_PIN9) | PIN_ODR_HIGH(GPIOB_PIN10) | PIN_ODR_HIGH(GPIOB_PIN11) | PIN_ODR_HIGH(GPIOB_PIN12) | PIN_ODR_HIGH(GPIOB_PIN13) | PIN_ODR_HIGH(GPIOB_PIN14) | PIN_ODR_HIGH(GPIOB_PIN15)) +#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | PIN_AFIO_AF(GPIOB_PIN1, 0) | PIN_AFIO_AF(GPIOB_PIN2, 0) | PIN_AFIO_AF(GPIOB_PIN3, 0) | PIN_AFIO_AF(GPIOB_PIN4, 0) | PIN_AFIO_AF(GPIOB_PIN5, 0) | PIN_AFIO_AF(GPIOB_PIN6, 4) | PIN_AFIO_AF(GPIOB_PIN7, 0)) +#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | PIN_AFIO_AF(GPIOB_PIN9, 0) | PIN_AFIO_AF(GPIOB_PIN10, 0) | PIN_AFIO_AF(GPIOB_PIN11, 0) | PIN_AFIO_AF(GPIOB_PIN12, 0) | PIN_AFIO_AF(GPIOB_PIN13, 0) | PIN_AFIO_AF(GPIOB_PIN14, 0) | PIN_AFIO_AF(GPIOB_PIN15, 0)) + +/* + * GPIOC setup: + * + * PC0 - PIN0 (input pullup). + * PC1 - PIN1 (input pullup). + * PC2 - PIN2 (input pullup). + * PC3 - PIN3 (input pullup). + * PC4 - PIN4 (input pullup). + * PC5 - PIN5 (input pullup). + * PC6 - PIN6 (input pullup). + * PC7 - PIN7 (input pullup). + * PC8 - PIN8 (input pullup). + * PC9 - PIN9 (input pullup). + * PC10 - PIN10 (input pullup). + * PC11 - PIN11 (input pullup). + * PC12 - PIN12 (input pullup). + * PC13 - PIN13 (input pullup). + * PC14 - PIN14 (input floating). + * PC15 - PIN15 (input floating). + */ +#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | PIN_MODE_INPUT(GPIOC_PIN1) | PIN_MODE_INPUT(GPIOC_PIN2) | PIN_MODE_INPUT(GPIOC_PIN3) | PIN_MODE_INPUT(GPIOC_PIN4) | PIN_MODE_INPUT(GPIOC_PIN5) | PIN_MODE_INPUT(GPIOC_PIN6) | PIN_MODE_INPUT(GPIOC_PIN7) | PIN_MODE_INPUT(GPIOC_PIN8) | PIN_MODE_INPUT(GPIOC_PIN9) | PIN_MODE_INPUT(GPIOC_PIN10) | PIN_MODE_INPUT(GPIOC_PIN11) | PIN_MODE_INPUT(GPIOC_PIN12) | PIN_MODE_INPUT(GPIOC_PIN13) | PIN_MODE_INPUT(GPIOC_PIN14) | PIN_MODE_INPUT(GPIOC_PIN15)) +#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) +#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOC_PIN0) | PIN_OSPEED_VERYLOW(GPIOC_PIN1) | PIN_OSPEED_VERYLOW(GPIOC_PIN2) | PIN_OSPEED_VERYLOW(GPIOC_PIN3) | PIN_OSPEED_VERYLOW(GPIOC_PIN4) | PIN_OSPEED_VERYLOW(GPIOC_PIN5) | PIN_OSPEED_VERYLOW(GPIOC_PIN6) | PIN_OSPEED_VERYLOW(GPIOC_PIN7) | PIN_OSPEED_VERYLOW(GPIOC_PIN8) | PIN_OSPEED_VERYLOW(GPIOC_PIN9) | PIN_OSPEED_VERYLOW(GPIOC_PIN10) | PIN_OSPEED_VERYLOW(GPIOC_PIN11) | PIN_OSPEED_VERYLOW(GPIOC_PIN12) | PIN_OSPEED_VERYLOW(GPIOC_PIN13) | PIN_OSPEED_HIGH(GPIOC_PIN14) | PIN_OSPEED_HIGH(GPIOC_PIN15)) +#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | PIN_PUPDR_PULLUP(GPIOC_PIN1) | PIN_PUPDR_PULLUP(GPIOC_PIN2) | PIN_PUPDR_PULLUP(GPIOC_PIN3) | PIN_PUPDR_PULLUP(GPIOC_PIN4) | PIN_PUPDR_PULLUP(GPIOC_PIN5) | PIN_PUPDR_PULLUP(GPIOC_PIN6) | PIN_PUPDR_PULLUP(GPIOC_PIN7) | PIN_PUPDR_PULLUP(GPIOC_PIN8) | PIN_PUPDR_PULLUP(GPIOC_PIN9) | PIN_PUPDR_PULLUP(GPIOC_PIN10) | PIN_PUPDR_PULLUP(GPIOC_PIN11) | PIN_PUPDR_PULLUP(GPIOC_PIN12) | PIN_PUPDR_PULLUP(GPIOC_PIN13) | PIN_PUPDR_FLOATING(GPIOC_PIN14) | PIN_PUPDR_FLOATING(GPIOC_PIN15)) +#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | PIN_ODR_HIGH(GPIOC_PIN1) | PIN_ODR_HIGH(GPIOC_PIN2) | PIN_ODR_HIGH(GPIOC_PIN3) | PIN_ODR_HIGH(GPIOC_PIN4) | PIN_ODR_HIGH(GPIOC_PIN5) | PIN_ODR_HIGH(GPIOC_PIN6) | PIN_ODR_HIGH(GPIOC_PIN7) | PIN_ODR_HIGH(GPIOC_PIN8) | PIN_ODR_HIGH(GPIOC_PIN9) | PIN_ODR_HIGH(GPIOC_PIN10) | PIN_ODR_HIGH(GPIOC_PIN11) | PIN_ODR_HIGH(GPIOC_PIN12) | PIN_ODR_HIGH(GPIOC_PIN13) | PIN_ODR_HIGH(GPIOC_PIN14) | PIN_ODR_HIGH(GPIOC_PIN15)) +#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | PIN_AFIO_AF(GPIOC_PIN1, 0) | PIN_AFIO_AF(GPIOC_PIN2, 0) | PIN_AFIO_AF(GPIOC_PIN3, 0) | PIN_AFIO_AF(GPIOC_PIN4, 0) | PIN_AFIO_AF(GPIOC_PIN5, 0) | PIN_AFIO_AF(GPIOC_PIN6, 0) | PIN_AFIO_AF(GPIOC_PIN7, 0)) +#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | PIN_AFIO_AF(GPIOC_PIN9, 0) | PIN_AFIO_AF(GPIOC_PIN10, 0) | PIN_AFIO_AF(GPIOC_PIN11, 0) | PIN_AFIO_AF(GPIOC_PIN12, 0) | PIN_AFIO_AF(GPIOC_PIN13, 0) | PIN_AFIO_AF(GPIOC_PIN14, 0) | PIN_AFIO_AF(GPIOC_PIN15, 0)) + +/* + * GPIOD setup: + * + * PD0 - PIN0 (input pullup). + * PD1 - PIN1 (input pullup). + * PD2 - PIN2 (input pullup). + * PD3 - PIN3 (input pullup). + * PD4 - PIN4 (input pullup). + * PD5 - PIN5 (input pullup). + * PD6 - PIN6 (input pullup). + * PD7 - PIN7 (input pullup). + * PD8 - PIN8 (input pullup). + * PD9 - PIN9 (input pullup). + * PD11 - PIN10 (input pullup). + * PD11 - PIN11 (input pullup). + * PD12 - PIN12 (input pullup). + * PD13 - PIN13 (input pullup). + * PD14 - PIN14 (input pullup). + * PD15 - PIN15 (input pullup). + */ +#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | PIN_MODE_INPUT(GPIOD_PIN1) | PIN_MODE_INPUT(GPIOD_PIN2) | PIN_MODE_INPUT(GPIOD_PIN3) | PIN_MODE_INPUT(GPIOD_PIN4) | PIN_MODE_INPUT(GPIOD_PIN5) | PIN_MODE_INPUT(GPIOD_PIN6) | PIN_MODE_INPUT(GPIOD_PIN7) | PIN_MODE_INPUT(GPIOD_PIN8) | PIN_MODE_INPUT(GPIOD_PIN9) | PIN_MODE_INPUT(GPIOD_PIN10) | PIN_MODE_INPUT(GPIOD_PIN11) | PIN_MODE_INPUT(GPIOD_PIN12) | PIN_MODE_INPUT(GPIOD_PIN13) | PIN_MODE_INPUT(GPIOD_PIN14) | PIN_MODE_INPUT(GPIOD_PIN15)) +#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) +#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | PIN_OSPEED_VERYLOW(GPIOD_PIN1) | PIN_OSPEED_VERYLOW(GPIOD_PIN2) | PIN_OSPEED_VERYLOW(GPIOD_PIN3) | PIN_OSPEED_VERYLOW(GPIOD_PIN4) | PIN_OSPEED_VERYLOW(GPIOD_PIN5) | PIN_OSPEED_VERYLOW(GPIOD_PIN6) | PIN_OSPEED_VERYLOW(GPIOD_PIN7) | PIN_OSPEED_VERYLOW(GPIOD_PIN8) | PIN_OSPEED_VERYLOW(GPIOD_PIN9) | PIN_OSPEED_VERYLOW(GPIOD_PIN10) | PIN_OSPEED_VERYLOW(GPIOD_PIN11) | PIN_OSPEED_VERYLOW(GPIOD_PIN12) | PIN_OSPEED_VERYLOW(GPIOD_PIN13) | PIN_OSPEED_VERYLOW(GPIOD_PIN14) | PIN_OSPEED_VERYLOW(GPIOD_PIN15)) +#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | PIN_PUPDR_PULLUP(GPIOD_PIN1) | PIN_PUPDR_PULLUP(GPIOD_PIN2) | PIN_PUPDR_PULLUP(GPIOD_PIN3) | PIN_PUPDR_PULLUP(GPIOD_PIN4) | PIN_PUPDR_PULLUP(GPIOD_PIN5) | PIN_PUPDR_PULLUP(GPIOD_PIN6) | PIN_PUPDR_PULLUP(GPIOD_PIN7) | PIN_PUPDR_PULLUP(GPIOD_PIN8) | PIN_PUPDR_PULLUP(GPIOD_PIN9) | PIN_PUPDR_PULLUP(GPIOD_PIN10) | PIN_PUPDR_PULLUP(GPIOD_PIN11) | PIN_PUPDR_PULLUP(GPIOD_PIN12) | PIN_PUPDR_PULLUP(GPIOD_PIN13) | PIN_PUPDR_PULLUP(GPIOD_PIN14) | PIN_PUPDR_PULLUP(GPIOD_PIN15)) +#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | PIN_ODR_HIGH(GPIOD_PIN1) | PIN_ODR_HIGH(GPIOD_PIN2) | PIN_ODR_HIGH(GPIOD_PIN3) | PIN_ODR_HIGH(GPIOD_PIN4) | PIN_ODR_HIGH(GPIOD_PIN5) | PIN_ODR_HIGH(GPIOD_PIN6) | PIN_ODR_HIGH(GPIOD_PIN7) | PIN_ODR_HIGH(GPIOD_PIN8) | PIN_ODR_HIGH(GPIOD_PIN9) | PIN_ODR_HIGH(GPIOD_PIN10) | PIN_ODR_HIGH(GPIOD_PIN11) | PIN_ODR_HIGH(GPIOD_PIN12) | PIN_ODR_HIGH(GPIOD_PIN13) | PIN_ODR_HIGH(GPIOD_PIN14) | PIN_ODR_HIGH(GPIOD_PIN15)) +#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | PIN_AFIO_AF(GPIOD_PIN1, 0) | PIN_AFIO_AF(GPIOD_PIN2, 0) | PIN_AFIO_AF(GPIOD_PIN3, 0) | PIN_AFIO_AF(GPIOD_PIN4, 0) | PIN_AFIO_AF(GPIOD_PIN5, 0) | PIN_AFIO_AF(GPIOD_PIN6, 0) | PIN_AFIO_AF(GPIOD_PIN7, 0)) +#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | PIN_AFIO_AF(GPIOD_PIN9, 0) | PIN_AFIO_AF(GPIOD_PIN10, 0) | PIN_AFIO_AF(GPIOD_PIN11, 0) | PIN_AFIO_AF(GPIOD_PIN12, 0) | PIN_AFIO_AF(GPIOD_PIN13, 0) | PIN_AFIO_AF(GPIOD_PIN14, 0) | PIN_AFIO_AF(GPIOD_PIN15, 0)) + +/* + * GPIOE setup: + * + * PE0 - PIN0 (input pullup). + * PE1 - PIN1 (input pullup). + * PE2 - PIN2 (input pullup). + * PE3 - PIN3 L3GD20_CS (output pushpull maximum). + * PE4 - PIN4 (input pullup). + * PE5 - PIN5 (input pullup). + * PE6 - PIN6 (input pullup). + * PE7 - PIN7 (input pullup). + * PE8 - PIN8 (output pushpull maximum). + * PE9 - PIN9 (output pushpull maximum). + * PE10 - PIN10 (output pushpull maximum). + * PE11 - PIN11 (output pushpull maximum). + * PE12 - PIN12 (output pushpull maximum). + * PE13 - PIN13 (output pushpull maximum). + * PE14 - PIN14 (output pushpull maximum). + * PE15 - PIN15 (output pushpull maximum). + */ +#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | PIN_MODE_INPUT(GPIOE_PIN1) | PIN_MODE_INPUT(GPIOE_PIN2) | PIN_MODE_OUTPUT(GPIOE_PIN3) | PIN_MODE_INPUT(GPIOE_PIN4) | PIN_MODE_INPUT(GPIOE_PIN5) | PIN_MODE_INPUT(GPIOE_PIN6) | PIN_MODE_INPUT(GPIOE_PIN7) | PIN_MODE_OUTPUT(GPIOE_PIN8) | PIN_MODE_OUTPUT(GPIOE_PIN9) | PIN_MODE_OUTPUT(GPIOE_PIN10) | PIN_MODE_OUTPUT(GPIOE_PIN11) | PIN_MODE_OUTPUT(GPIOE_PIN12) | PIN_MODE_OUTPUT(GPIOE_PIN13) | PIN_MODE_OUTPUT(GPIOE_PIN14) | PIN_MODE_OUTPUT(GPIOE_PIN15)) +#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) +#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) | PIN_OSPEED_VERYLOW(GPIOE_PIN1) | PIN_OSPEED_VERYLOW(GPIOE_PIN2) | PIN_OSPEED_HIGH(GPIOE_PIN3) | PIN_OSPEED_VERYLOW(GPIOE_PIN4) | PIN_OSPEED_VERYLOW(GPIOE_PIN5) | PIN_OSPEED_VERYLOW(GPIOE_PIN6) | PIN_OSPEED_VERYLOW(GPIOE_PIN7) | PIN_OSPEED_HIGH(GPIOE_PIN8) | PIN_OSPEED_HIGH(GPIOE_PIN9) | PIN_OSPEED_HIGH(GPIOE_PIN10) | PIN_OSPEED_HIGH(GPIOE_PIN11) | PIN_OSPEED_HIGH(GPIOE_PIN12) | PIN_OSPEED_HIGH(GPIOE_PIN13) | PIN_OSPEED_HIGH(GPIOE_PIN14) | PIN_OSPEED_HIGH(GPIOE_PIN15)) +#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | PIN_PUPDR_PULLUP(GPIOE_PIN1) | PIN_PUPDR_PULLUP(GPIOE_PIN2) | PIN_PUPDR_FLOATING(GPIOE_PIN3) | PIN_PUPDR_PULLUP(GPIOE_PIN4) | PIN_PUPDR_PULLUP(GPIOE_PIN5) | PIN_PUPDR_PULLUP(GPIOE_PIN6) | PIN_PUPDR_PULLUP(GPIOE_PIN7) | PIN_PUPDR_PULLUP(GPIOE_PIN8) | PIN_PUPDR_PULLUP(GPIOE_PIN9) | PIN_PUPDR_PULLUP(GPIOE_PIN10) | PIN_PUPDR_FLOATING(GPIOE_PIN11) | PIN_PUPDR_PULLUP(GPIOE_PIN12) | PIN_PUPDR_FLOATING(GPIOE_PIN13) | PIN_PUPDR_FLOATING(GPIOE_PIN14) | PIN_PUPDR_FLOATING(GPIOE_PIN15)) +#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | PIN_ODR_HIGH(GPIOE_PIN1) | PIN_ODR_HIGH(GPIOE_PIN2) | PIN_ODR_HIGH(GPIOE_PIN3) | PIN_ODR_HIGH(GPIOE_PIN4) | PIN_ODR_HIGH(GPIOE_PIN5) | PIN_ODR_HIGH(GPIOE_PIN6) | PIN_ODR_HIGH(GPIOE_PIN7) | PIN_ODR_LOW(GPIOE_PIN8) | PIN_ODR_LOW(GPIOE_PIN9) | PIN_ODR_LOW(GPIOE_PIN10) | PIN_ODR_LOW(GPIOE_PIN11) | PIN_ODR_LOW(GPIOE_PIN12) | PIN_ODR_LOW(GPIOE_PIN13) | PIN_ODR_LOW(GPIOE_PIN14) | PIN_ODR_LOW(GPIOE_PIN15)) +#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0) | PIN_AFIO_AF(GPIOE_PIN1, 0) | PIN_AFIO_AF(GPIOE_PIN2, 0) | PIN_AFIO_AF(GPIOE_PIN3, 0) | PIN_AFIO_AF(GPIOE_PIN4, 0) | PIN_AFIO_AF(GPIOE_PIN5, 0) | PIN_AFIO_AF(GPIOE_PIN6, 0) | PIN_AFIO_AF(GPIOE_PIN7, 0)) +#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | PIN_AFIO_AF(GPIOE_PIN9, 0) | PIN_AFIO_AF(GPIOE_PIN10, 0) | PIN_AFIO_AF(GPIOE_PIN11, 0) | PIN_AFIO_AF(GPIOE_PIN12, 0) | PIN_AFIO_AF(GPIOE_PIN13, 0) | PIN_AFIO_AF(GPIOE_PIN14, 0) | PIN_AFIO_AF(GPIOE_PIN15, 0)) + +/* + * GPIOF setup: + * + * PF0 - I2C2_SDA (input floating). + * PF1 - I2C2_SCL (input floating). + * PF2 - PIN2 (input pullup). + * PF3 - PIN3 (input pullup). + * PF4 - PIN4 (input pullup). + * PF5 - PIN5 (input pullup). + * PF6 - PIN6 (input pullup). + * PF7 - PIN7 (input pullup). + * PF8 - PIN8 (input pullup). + * PF9 - PIN9 (input pullup). + * PF10 - PIN10 (input pullup). + * PF11 - PIN11 (input pullup). + * PF12 - PIN12 (input pullup). + * PF13 - PIN13 (input pullup). + * PF14 - PIN14 (input pullup). + * PF15 - PIN15 (input pullup). + */ +#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_I2C2_SDA) | PIN_MODE_INPUT(GPIOF_I2C2_SCL) | PIN_MODE_INPUT(GPIOF_PIN2) | PIN_MODE_INPUT(GPIOF_PIN3) | PIN_MODE_INPUT(GPIOF_PIN4) | PIN_MODE_INPUT(GPIOF_PIN5) | PIN_MODE_INPUT(GPIOF_PIN6) | PIN_MODE_INPUT(GPIOF_PIN7) | PIN_MODE_INPUT(GPIOF_PIN8) | PIN_MODE_INPUT(GPIOF_PIN9) | PIN_MODE_INPUT(GPIOF_PIN10) | PIN_MODE_INPUT(GPIOF_PIN11) | PIN_MODE_INPUT(GPIOF_PIN12) | PIN_MODE_INPUT(GPIOF_PIN13) | PIN_MODE_INPUT(GPIOF_PIN14) | PIN_MODE_INPUT(GPIOF_PIN15)) +#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SDA) | PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SCL) | PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) +#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_I2C2_SDA) | PIN_OSPEED_HIGH(GPIOF_I2C2_SCL) | PIN_OSPEED_VERYLOW(GPIOF_PIN2) | PIN_OSPEED_VERYLOW(GPIOF_PIN3) | PIN_OSPEED_VERYLOW(GPIOF_PIN4) | PIN_OSPEED_VERYLOW(GPIOF_PIN5) | PIN_OSPEED_VERYLOW(GPIOF_PIN6) | PIN_OSPEED_VERYLOW(GPIOF_PIN7) | PIN_OSPEED_VERYLOW(GPIOF_PIN8) | PIN_OSPEED_VERYLOW(GPIOF_PIN9) | PIN_OSPEED_VERYLOW(GPIOF_PIN10) | PIN_OSPEED_VERYLOW(GPIOF_PIN11) | PIN_OSPEED_VERYLOW(GPIOF_PIN12) | PIN_OSPEED_VERYLOW(GPIOF_PIN13) | PIN_OSPEED_VERYLOW(GPIOF_PIN14) | PIN_OSPEED_VERYLOW(GPIOF_PIN15)) +#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_I2C2_SDA) | PIN_PUPDR_FLOATING(GPIOF_I2C2_SCL) | PIN_PUPDR_PULLUP(GPIOF_PIN2) | PIN_PUPDR_PULLUP(GPIOF_PIN3) | PIN_PUPDR_PULLUP(GPIOF_PIN4) | PIN_PUPDR_PULLUP(GPIOF_PIN5) | PIN_PUPDR_PULLUP(GPIOF_PIN6) | PIN_PUPDR_PULLUP(GPIOF_PIN7) | PIN_PUPDR_PULLUP(GPIOF_PIN8) | PIN_PUPDR_PULLUP(GPIOF_PIN9) | PIN_PUPDR_PULLUP(GPIOF_PIN10) | PIN_PUPDR_PULLUP(GPIOF_PIN11) | PIN_PUPDR_PULLUP(GPIOF_PIN12) | PIN_PUPDR_PULLUP(GPIOF_PIN13) | PIN_PUPDR_PULLUP(GPIOF_PIN14) | PIN_PUPDR_PULLUP(GPIOF_PIN15)) +#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_I2C2_SDA) | PIN_ODR_HIGH(GPIOF_I2C2_SCL) | PIN_ODR_HIGH(GPIOF_PIN2) | PIN_ODR_HIGH(GPIOF_PIN3) | PIN_ODR_HIGH(GPIOF_PIN4) | PIN_ODR_HIGH(GPIOF_PIN5) | PIN_ODR_HIGH(GPIOF_PIN6) | PIN_ODR_HIGH(GPIOF_PIN7) | PIN_ODR_HIGH(GPIOF_PIN8) | PIN_ODR_HIGH(GPIOF_PIN9) | PIN_ODR_HIGH(GPIOF_PIN10) | PIN_ODR_HIGH(GPIOF_PIN11) | PIN_ODR_HIGH(GPIOF_PIN12) | PIN_ODR_HIGH(GPIOF_PIN13) | PIN_ODR_HIGH(GPIOF_PIN14) | PIN_ODR_HIGH(GPIOF_PIN15)) +#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_I2C2_SDA, 0) | PIN_AFIO_AF(GPIOF_I2C2_SCL, 0) | PIN_AFIO_AF(GPIOF_PIN2, 0) | PIN_AFIO_AF(GPIOF_PIN3, 0) | PIN_AFIO_AF(GPIOF_PIN4, 0) | PIN_AFIO_AF(GPIOF_PIN5, 0) | PIN_AFIO_AF(GPIOF_PIN6, 0) | PIN_AFIO_AF(GPIOF_PIN7, 0)) +#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | PIN_AFIO_AF(GPIOF_PIN9, 0) | PIN_AFIO_AF(GPIOF_PIN10, 0) | PIN_AFIO_AF(GPIOF_PIN11, 0) | PIN_AFIO_AF(GPIOF_PIN12, 0) | PIN_AFIO_AF(GPIOF_PIN13, 0) | PIN_AFIO_AF(GPIOF_PIN14, 0) | PIN_AFIO_AF(GPIOF_PIN15, 0)) + +/* + * GPIOG setup: + * + * PG0 - PIN0 (input pullup). + * PG1 - PIN1 (input pullup). + * PG2 - PIN2 (input pullup). + * PG3 - PIN3 (input pullup). + * PG4 - PIN4 (input pullup). + * PG5 - PIN5 (input pullup). + * PG6 - PIN6 (input pullup). + * PG7 - PIN7 (input pullup). + * PG8 - PIN8 (input pullup). + * PG9 - PIN9 (input pullup). + * PG10 - PIN10 (input pullup). + * PG11 - PIN11 (input pullup). + * PG12 - PIN12 (input pullup). + * PG13 - PIN13 (input pullup). + * PG14 - PIN14 (input pullup). + * PG15 - PIN15 (input pullup). + */ +#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | PIN_MODE_INPUT(GPIOG_PIN1) | PIN_MODE_INPUT(GPIOG_PIN2) | PIN_MODE_INPUT(GPIOG_PIN3) | PIN_MODE_INPUT(GPIOG_PIN4) | PIN_MODE_INPUT(GPIOG_PIN5) | PIN_MODE_INPUT(GPIOG_PIN6) | PIN_MODE_INPUT(GPIOG_PIN7) | PIN_MODE_INPUT(GPIOG_PIN8) | PIN_MODE_INPUT(GPIOG_PIN9) | PIN_MODE_INPUT(GPIOG_PIN10) | PIN_MODE_INPUT(GPIOG_PIN11) | PIN_MODE_INPUT(GPIOG_PIN12) | PIN_MODE_INPUT(GPIOG_PIN13) | PIN_MODE_INPUT(GPIOG_PIN14) | PIN_MODE_INPUT(GPIOG_PIN15)) +#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) +#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_PIN0) | PIN_OSPEED_VERYLOW(GPIOG_PIN1) | PIN_OSPEED_VERYLOW(GPIOG_PIN2) | PIN_OSPEED_VERYLOW(GPIOG_PIN3) | PIN_OSPEED_VERYLOW(GPIOG_PIN4) | PIN_OSPEED_VERYLOW(GPIOG_PIN5) | PIN_OSPEED_VERYLOW(GPIOG_PIN6) | PIN_OSPEED_VERYLOW(GPIOG_PIN7) | PIN_OSPEED_VERYLOW(GPIOG_PIN8) | PIN_OSPEED_VERYLOW(GPIOG_PIN9) | PIN_OSPEED_VERYLOW(GPIOG_PIN10) | PIN_OSPEED_VERYLOW(GPIOG_PIN11) | PIN_OSPEED_VERYLOW(GPIOG_PIN12) | PIN_OSPEED_VERYLOW(GPIOG_PIN13) | PIN_OSPEED_VERYLOW(GPIOG_PIN14) | PIN_OSPEED_VERYLOW(GPIOG_PIN15)) +#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | PIN_PUPDR_PULLUP(GPIOG_PIN1) | PIN_PUPDR_PULLUP(GPIOG_PIN2) | PIN_PUPDR_PULLUP(GPIOG_PIN3) | PIN_PUPDR_PULLUP(GPIOG_PIN4) | PIN_PUPDR_PULLUP(GPIOG_PIN5) | PIN_PUPDR_PULLUP(GPIOG_PIN6) | PIN_PUPDR_PULLUP(GPIOG_PIN7) | PIN_PUPDR_PULLUP(GPIOG_PIN8) | PIN_PUPDR_PULLUP(GPIOG_PIN9) | PIN_PUPDR_PULLUP(GPIOG_PIN10) | PIN_PUPDR_PULLUP(GPIOG_PIN11) | PIN_PUPDR_PULLUP(GPIOG_PIN12) | PIN_PUPDR_PULLUP(GPIOG_PIN13) | PIN_PUPDR_PULLUP(GPIOG_PIN14) | PIN_PUPDR_PULLUP(GPIOG_PIN15)) +#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | PIN_ODR_HIGH(GPIOG_PIN1) | PIN_ODR_HIGH(GPIOG_PIN2) | PIN_ODR_HIGH(GPIOG_PIN3) | PIN_ODR_HIGH(GPIOG_PIN4) | PIN_ODR_HIGH(GPIOG_PIN5) | PIN_ODR_HIGH(GPIOG_PIN6) | PIN_ODR_HIGH(GPIOG_PIN7) | PIN_ODR_HIGH(GPIOG_PIN8) | PIN_ODR_HIGH(GPIOG_PIN9) | PIN_ODR_HIGH(GPIOG_PIN10) | PIN_ODR_HIGH(GPIOG_PIN11) | PIN_ODR_HIGH(GPIOG_PIN12) | PIN_ODR_HIGH(GPIOG_PIN13) | PIN_ODR_HIGH(GPIOG_PIN14) | PIN_ODR_HIGH(GPIOG_PIN15)) +#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | PIN_AFIO_AF(GPIOG_PIN1, 0) | PIN_AFIO_AF(GPIOG_PIN2, 0) | PIN_AFIO_AF(GPIOG_PIN3, 0) | PIN_AFIO_AF(GPIOG_PIN4, 0) | PIN_AFIO_AF(GPIOG_PIN5, 0) | PIN_AFIO_AF(GPIOG_PIN6, 0) | PIN_AFIO_AF(GPIOG_PIN7, 0)) +#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | PIN_AFIO_AF(GPIOG_PIN9, 0) | PIN_AFIO_AF(GPIOG_PIN10, 0) | PIN_AFIO_AF(GPIOG_PIN11, 0) | PIN_AFIO_AF(GPIOG_PIN12, 0) | PIN_AFIO_AF(GPIOG_PIN13, 0) | PIN_AFIO_AF(GPIOG_PIN14, 0) | PIN_AFIO_AF(GPIOG_PIN15, 0)) + +/* + * GPIOH setup: + * + * PH0 - PIN0 (input pullup). + * PH1 - PIN1 (input pullup). + * PH2 - PIN2 (input pullup). + * PH3 - PIN3 (input pullup). + * PH4 - PIN4 (input pullup). + * PH5 - PIN5 (input pullup). + * PH6 - PIN6 (input pullup). + * PH7 - PIN7 (input pullup). + * PH8 - PIN8 (input pullup). + * PH9 - PIN9 (input pullup). + * PH10 - PIN10 (input pullup). + * PH11 - PIN11 (input pullup). + * PH12 - PIN12 (input pullup). + * PH13 - PIN13 (input pullup). + * PH14 - PIN14 (input pullup). + * PH15 - PIN15 (input pullup). + */ +#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_PIN0) | PIN_MODE_INPUT(GPIOH_PIN1) | PIN_MODE_INPUT(GPIOH_PIN2) | PIN_MODE_INPUT(GPIOH_PIN3) | PIN_MODE_INPUT(GPIOH_PIN4) | PIN_MODE_INPUT(GPIOH_PIN5) | PIN_MODE_INPUT(GPIOH_PIN6) | PIN_MODE_INPUT(GPIOH_PIN7) | PIN_MODE_INPUT(GPIOH_PIN8) | PIN_MODE_INPUT(GPIOH_PIN9) | PIN_MODE_INPUT(GPIOH_PIN10) | PIN_MODE_INPUT(GPIOH_PIN11) | PIN_MODE_INPUT(GPIOH_PIN12) | PIN_MODE_INPUT(GPIOH_PIN13) | PIN_MODE_INPUT(GPIOH_PIN14) | PIN_MODE_INPUT(GPIOH_PIN15)) +#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_PIN0) | PIN_OTYPE_PUSHPULL(GPIOH_PIN1) | PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) +#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOH_PIN0) | PIN_OSPEED_VERYLOW(GPIOH_PIN1) | PIN_OSPEED_VERYLOW(GPIOH_PIN2) | PIN_OSPEED_VERYLOW(GPIOH_PIN3) | PIN_OSPEED_VERYLOW(GPIOH_PIN4) | PIN_OSPEED_VERYLOW(GPIOH_PIN5) | PIN_OSPEED_VERYLOW(GPIOH_PIN6) | PIN_OSPEED_VERYLOW(GPIOH_PIN7) | PIN_OSPEED_VERYLOW(GPIOH_PIN8) | PIN_OSPEED_VERYLOW(GPIOH_PIN9) | PIN_OSPEED_VERYLOW(GPIOH_PIN10) | PIN_OSPEED_VERYLOW(GPIOH_PIN11) | PIN_OSPEED_VERYLOW(GPIOH_PIN12) | PIN_OSPEED_VERYLOW(GPIOH_PIN13) | PIN_OSPEED_VERYLOW(GPIOH_PIN14) | PIN_OSPEED_VERYLOW(GPIOH_PIN15)) +#define VAL_GPIOH_PUPDR (PIN_PUPDR_PULLUP(GPIOH_PIN0) | PIN_PUPDR_PULLUP(GPIOH_PIN1) | PIN_PUPDR_PULLUP(GPIOH_PIN2) | PIN_PUPDR_PULLUP(GPIOH_PIN3) | PIN_PUPDR_PULLUP(GPIOH_PIN4) | PIN_PUPDR_PULLUP(GPIOH_PIN5) | PIN_PUPDR_PULLUP(GPIOH_PIN6) | PIN_PUPDR_PULLUP(GPIOH_PIN7) | PIN_PUPDR_PULLUP(GPIOH_PIN8) | PIN_PUPDR_PULLUP(GPIOH_PIN9) | PIN_PUPDR_PULLUP(GPIOH_PIN10) | PIN_PUPDR_PULLUP(GPIOH_PIN11) | PIN_PUPDR_PULLUP(GPIOH_PIN12) | PIN_PUPDR_PULLUP(GPIOH_PIN13) | PIN_PUPDR_PULLUP(GPIOH_PIN14) | PIN_PUPDR_PULLUP(GPIOH_PIN15)) +#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_PIN0) | PIN_ODR_HIGH(GPIOH_PIN1) | PIN_ODR_HIGH(GPIOH_PIN2) | PIN_ODR_HIGH(GPIOH_PIN3) | PIN_ODR_HIGH(GPIOH_PIN4) | PIN_ODR_HIGH(GPIOH_PIN5) | PIN_ODR_HIGH(GPIOH_PIN6) | PIN_ODR_HIGH(GPIOH_PIN7) | PIN_ODR_HIGH(GPIOH_PIN8) | PIN_ODR_HIGH(GPIOH_PIN9) | PIN_ODR_HIGH(GPIOH_PIN10) | PIN_ODR_HIGH(GPIOH_PIN11) | PIN_ODR_HIGH(GPIOH_PIN12) | PIN_ODR_HIGH(GPIOH_PIN13) | PIN_ODR_HIGH(GPIOH_PIN14) | PIN_ODR_HIGH(GPIOH_PIN15)) +#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_PIN0, 0) | PIN_AFIO_AF(GPIOH_PIN1, 0) | PIN_AFIO_AF(GPIOH_PIN2, 0) | PIN_AFIO_AF(GPIOH_PIN3, 0) | PIN_AFIO_AF(GPIOH_PIN4, 0) | PIN_AFIO_AF(GPIOH_PIN5, 0) | PIN_AFIO_AF(GPIOH_PIN6, 0) | PIN_AFIO_AF(GPIOH_PIN7, 0)) +#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | PIN_AFIO_AF(GPIOH_PIN9, 0) | PIN_AFIO_AF(GPIOH_PIN10, 0) | PIN_AFIO_AF(GPIOH_PIN11, 0) | PIN_AFIO_AF(GPIOH_PIN12, 0) | PIN_AFIO_AF(GPIOH_PIN13, 0) | PIN_AFIO_AF(GPIOH_PIN14, 0) | PIN_AFIO_AF(GPIOH_PIN15, 0)) + +/* + * USB bus activation macro, required by the USB driver. + */ +// #define usb_lld_connect_bus(usbp) +#define usb_lld_connect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_ALTERNATE(14))) +// #define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT) +/* + * USB bus de-activation macro, required by the USB driver. + */ +// #define usb_lld_disconnect_bus(usbp) +#define usb_lld_disconnect_bus(usbp) \ + (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_OUTPUT_PUSHPULL)); \ + palClearPad(GPIOA, GPIOA_USB_DP) +// #define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12) + +#if !defined(_FROM_ASM_) +# ifdef __cplusplus +extern "C" { +# endif +void boardInit(void); +# ifdef __cplusplus +} +# endif +#endif /* _FROM_ASM_ */ + +#endif /* _BOARD_H_ */ diff --git a/platforms/chibios/GENERIC_STM32_F303XC/board/board.mk b/platforms/chibios/GENERIC_STM32_F303XC/board/board.mk new file mode 100644 index 000000000..842e33590 --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F303XC/board/board.mk @@ -0,0 +1,9 @@ +# List of all the board related files. +BOARDSRC = $(BOARD_PATH)/board/board.c + +# Required include directories +BOARDINC = $(BOARD_PATH)/board + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/platforms/chibios/GENERIC_STM32_F303XC/configs/bootloader_defs.h b/platforms/chibios/GENERIC_STM32_F303XC/configs/bootloader_defs.h new file mode 100644 index 000000000..3b0e9d20a --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F303XC/configs/bootloader_defs.h @@ -0,0 +1,7 @@ +/* Address for jumping to bootloader on STM32 chips. */ +/* It is chip dependent, the correct number can be looked up here: + * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf + * This also requires a patch to chibios: + * /tmk_core/tool/chibios/ch-bootloader-jump.patch + */ +#define STM32_BOOTLOADER_ADDRESS 0x1FFFD800 diff --git a/platforms/chibios/GENERIC_STM32_F303XC/configs/chconf.h b/platforms/chibios/GENERIC_STM32_F303XC/configs/chconf.h new file mode 100644 index 000000000..aac330370 --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F303XC/configs/chconf.h @@ -0,0 +1,714 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file rt/templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_6_0_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 100000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 2 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 0 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM TRUE +#endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES TRUE +#endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY TRUE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif + +/** + * @brief Pipes APIs. + * @details If enabled then the pipes APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_PIPES) +#define CH_CFG_USE_PIPES TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif + +/** + * @brief Enables factory for Pipes. + */ +#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) +#define CH_CFG_FACTORY_PIPES TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/platforms/chibios/GENERIC_STM32_F303XC/configs/halconf.h b/platforms/chibios/GENERIC_STM32_F303XC/configs/halconf.h new file mode 100644 index 000000000..6b48e289f --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F303XC/configs/halconf.h @@ -0,0 +1,525 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#define _CHIBIOS_HAL_CONF_ +#define _CHIBIOS_HAL_CONF_VER_7_0_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C TRUE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB TRUE +#endif + +/** + * @brief Enables the SIO subsystem. + */ +#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) +#define HAL_USE_SIO FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the TRNG subsystem. + */ +#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) +#define HAL_USE_TRNG FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/** + * @brief Enables the WSPI subsystem. + */ +#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) +#define HAL_USE_WSPI FALSE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +#define PAL_USE_CALLBACKS TRUE +#endif + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +#define PAL_USE_WAIT TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/** + * @brief Enforces the driver to use direct callbacks rather than OSAL events. + */ +#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) +#define CAN_ENFORCE_USE_CALLBACKS FALSE +#endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + +/*===========================================================================*/ +/* DAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) +#define DAC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define DAC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the zero-copy API. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/** + * @brief OCR initialization constant for V20 cards. + */ +#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) +#define SDC_INIT_OCR_V20 0x50FF8000U +#endif + +/** + * @brief OCR initialization constant for non-V20 cards. + */ +#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) +#define SDC_INIT_OCR 0x80100000U +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 1 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables circular transfers APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) +#define SPI_USE_CIRCULAR FALSE +#endif + + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/** + * @brief Handling method for SPI CS line. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) +#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT TRUE +#endif + +/*===========================================================================*/ +/* WSPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) +#define WSPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define WSPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/platforms/chibios/GENERIC_STM32_F303XC/configs/mcuconf.h b/platforms/chibios/GENERIC_STM32_F303XC/configs/mcuconf.h new file mode 100644 index 000000000..3b1588348 --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F303XC/configs/mcuconf.h @@ -0,0 +1,273 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * STM32F3xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F3xx_MCUCONF +#define STM32F303_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * IRQ system settings. + */ +#define STM32_IRQ_EXTI0_PRIORITY 6 +#define STM32_IRQ_EXTI1_PRIORITY 6 +#define STM32_IRQ_EXTI2_PRIORITY 6 +#define STM32_IRQ_EXTI3_PRIORITY 6 +#define STM32_IRQ_EXTI4_PRIORITY 6 +#define STM32_IRQ_EXTI5_9_PRIORITY 6 +#define STM32_IRQ_EXTI10_15_PRIORITY 6 +#define STM32_IRQ_EXTI16_PRIORITY 6 +#define STM32_IRQ_EXTI17_PRIORITY 15 +#define STM32_IRQ_EXTI18_PRIORITY 6 +#define STM32_IRQ_EXTI19_PRIORITY 15 +#define STM32_IRQ_EXTI20_PRIORITY 15 +#define STM32_IRQ_EXTI21_22_29_PRIORITY 6 +#define STM32_IRQ_EXTI30_32_PRIORITY 6 +#define STM32_IRQ_EXTI33_PRIORITY 6 +#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 +#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 +#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 +#define STM32_IRQ_TIM1_CC_PRIORITY 7 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_DUAL_MODE FALSE +#define STM32_ADC_COMPACT_SAMPLES FALSE +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_USE_ADC4 FALSE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_ADC4_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_IRQ_PRIORITY 5 +#define STM32_ADC_ADC4_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * DAC driver system settings. + */ +#define STM32_DAC_DUAL_MODE FALSE +#define STM32_DAC_USE_DAC1_CH1 TRUE +#define STM32_DAC_USE_DAC1_CH2 TRUE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM6 TRUE +#define STM32_GPT_USE_TIM7 TRUE +#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_USE_TIM15 FALSE +#define STM32_GPT_USE_TIM16 FALSE +#define STM32_GPT_USE_TIM17 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 TRUE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_USE_DMA TRUE +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM15 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM4 TRUE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM15 FALSE +#define STM32_PWM_USE_TIM16 FALSE +#define STM32_PWM_USE_TIM17 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * RTC driver system settings. + */ +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_RTC_CR_INIT 0 +#define STM32_RTC_TAMPCR_INIT 0 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 8 +#define STM32_ST_USE_TIMER 2 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + +#endif /* MCUCONF_H */ diff --git a/platforms/chibios/GENERIC_STM32_F303XC/configs/proton_c.mk b/platforms/chibios/GENERIC_STM32_F303XC/configs/proton_c.mk new file mode 100644 index 000000000..23907c810 --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F303XC/configs/proton_c.mk @@ -0,0 +1,9 @@ +# Proton C MCU settings for converting AVR projects +MCU = STM32F303 + +# These are defaults based on what has been implemented for ARM boards +AUDIO_ENABLE = yes +WS2812_DRIVER = bitbang + +# Force task driven PWM until ARM can provide automatic configuration +BACKLIGHT_DRIVER = software diff --git a/platforms/chibios/IC_TEENSY_3_1/board/board.c b/platforms/chibios/IC_TEENSY_3_1/board/board.c new file mode 100644 index 000000000..63e3f6492 --- /dev/null +++ b/platforms/chibios/IC_TEENSY_3_1/board/board.c @@ -0,0 +1,146 @@ +/* + ChibiOS - Copyright (C) 2015 RedoX https://github.com/RedoXyde + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ +#include "hal.h" + +#if HAL_USE_PAL || defined(__DOXYGEN__) +/** + * @brief PAL setup. + * @details Digital I/O ports static configuration as defined in @p board.h. + * This variable is used by the HAL when initializing the PAL driver. + */ +const PALConfig pal_default_config = { + .ports = + { + { + /* + * PORTA setup. + * + * PTA4 - PIN33 + * PTA5 - PIN24 + * PTA12 - PIN3 + * PTA13 - PIN4 + * + * PTA18/19 crystal + * PTA0/3 SWD + */ + .port = IOPORT1, + .pads = + { + PAL_MODE_ALTERNATIVE_7, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_ALTERNATIVE_7, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_INPUT_ANALOG, PAL_MODE_INPUT_ANALOG, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, + }, + }, + { + /* + * PORTB setup. + * + * PTB0 - PIN16 + * PTB1 - PIN17 + * PTB2 - PIN19 + * PTB3 - PIN18 + * PTB16 - PIN0 - UART0_TX + * PTB17 - PIN1 - UART0_RX + * PTB18 - PIN32 + * PTB19 - PIN25 + */ + .port = IOPORT2, + .pads = + { + PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_ALTERNATIVE_3, PAL_MODE_ALTERNATIVE_3, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, + }, + }, + { + /* + * PORTC setup. + * + * PTC0 - PIN15 + * PTC1 - PIN22 + * PTC2 - PIN23 + * PTC3 - PIN9 + * PTC4 - PIN10 + * PTC5 - PIN13 + * PTC6 - PIN11 + * PTC7 - PIN12 + * PTC8 - PIN28 + * PTC9 - PIN27 + * PTC10 - PIN29 + * PTC11 - PIN30 + */ + .port = IOPORT3, + .pads = + { + PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, + }, + }, + { + /* + * PORTD setup. + * + * PTD0 - PIN2 + * PTD1 - PIN14 + * PTD2 - PIN7 + * PTD3 - PIN8 + * PTD4 - PIN6 + * PTD5 - PIN20 + * PTD6 - PIN21 + * PTD7 - PIN5 + */ + .port = IOPORT4, + .pads = + { + PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, + }, + }, + { + /* + * PORTE setup. + * + * PTE0 - PIN31 + * PTE1 - PIN26 + */ + .port = IOPORT5, + .pads = + { + PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, + }, + }, + }, +}; +#endif + +// NOTE: This value comes from kiibohd/controller and is the location of a value +// which needs to be checked before disabling the watchdog (which happens in +// k20x_clock_init) +#define WDOG_TMROUTL *(volatile uint16_t *)0x40052012 + +/** + * @brief Early initialization code. + * @details This initialization must be performed just after stack setup + * and before any other initialization. + */ +void __early_init(void) { + // This is a dirty hack and should only be used as a temporary fix until this + // is upstreamed. + while (WDOG_TMROUTL < 2) + ; // Must wait for WDOG timer if already running, before jumping + + k20x_clock_init(); +} + +/** + * @brief Board-specific initialization code. + * @todo Add your board-specific code, if any. + */ +void boardInit(void) {} diff --git a/platforms/chibios/IC_TEENSY_3_1/board/board.h b/platforms/chibios/IC_TEENSY_3_1/board/board.h new file mode 100644 index 000000000..c8259ab0c --- /dev/null +++ b/platforms/chibios/IC_TEENSY_3_1/board/board.h @@ -0,0 +1,295 @@ +/* + ChibiOS - Copyright (C) 2015 RedoX https://github.com/RedoXyde + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* + * Setup for the PJRC Teensy 3.1 board. + */ + +/* + * Board identifier. + */ +#define BOARD_PJRC_TEENSY_3_1 +#define BOARD_NAME "PJRC Teensy 3.1" + +/* External 16 MHz crystal */ +#define KINETIS_XTAL_FREQUENCY 16000000UL + +/* Use internal capacitors for the crystal */ +#define KINETIS_BOARD_OSCILLATOR_SETTING OSC_CR_SC8P | OSC_CR_SC2P + +/* + * MCU type + */ +#define K20x7 + +/* + * IO pins assignments. + */ +#define PORTA_PIN0 0 +#define PORTA_PIN1 1 +#define PORTA_PIN2 2 +#define PORTA_PIN3 3 +#define TEENSY_PIN33 4 +#define TEENSY_PIN24 5 +#define PORTA_PIN6 6 +#define PORTA_PIN7 7 +#define PORTA_PIN8 8 +#define PORTA_PIN9 9 +#define PORTA_PIN10 10 +#define PORTA_PIN11 11 +#define TEENSY_PIN3 12 +#define TEENSY_PIN4 13 +#define PORTA_PIN14 14 +#define PORTA_PIN15 15 +#define PORTA_PIN16 16 +#define PORTA_PIN17 17 +#define PORTA_PIN18 18 +#define PORTA_PIN19 19 +#define PORTA_PIN20 20 +#define PORTA_PIN21 21 +#define PORTA_PIN22 22 +#define PORTA_PIN23 23 +#define PORTA_PIN24 24 +#define PORTA_PIN25 25 +#define PORTA_PIN26 26 +#define PORTA_PIN27 27 +#define PORTA_PIN28 28 +#define PORTA_PIN29 29 +#define PORTA_PIN30 30 +#define PORTA_PIN31 31 + +#define TEENSY_PIN3_IOPORT IOPORT1 +#define TEENSY_PIN4_IOPORT IOPORT1 +#define TEENSY_PIN24_IOPORT IOPORT1 +#define TEENSY_PIN33_IOPORT IOPORT1 + +#define TEENSY_PIN16 0 +#define TEENSY_PIN17 1 +#define TEENSY_PIN19 2 +#define TEENSY_PIN18 3 +#define PORTB_PIN4 4 +#define PORTB_PIN5 5 +#define PORTB_PIN6 6 +#define PORTB_PIN7 7 +#define PORTB_PIN8 8 +#define PORTB_PIN9 9 +#define PORTB_PIN10 10 +#define PORTB_PIN11 11 +#define PORTB_PIN12 12 +#define PORTB_PIN13 13 +#define PORTB_PIN14 14 +#define PORTB_PIN15 15 +#define TEENSY_PIN0 16 +#define TEENSY_PIN1 17 +#define TEENSY_PIN32 18 +#define TEENSY_PIN25 19 +#define PORTB_PIN20 20 +#define PORTB_PIN21 21 +#define PORTB_PIN22 22 +#define PORTB_PIN23 23 +#define PORTB_PIN24 24 +#define PORTB_PIN25 25 +#define PORTB_PIN26 26 +#define PORTB_PIN27 27 +#define PORTB_PIN28 28 +#define PORTB_PIN29 29 +#define PORTB_PIN30 30 +#define PORTB_PIN31 31 + +#define TEENSY_PIN0_IOPORT IOPORT2 +#define TEENSY_PIN1_IOPORT IOPORT2 +#define TEENSY_PIN16_IOPORT IOPORT2 +#define TEENSY_PIN17_IOPORT IOPORT2 +#define TEENSY_PIN18_IOPORT IOPORT2 +#define TEENSY_PIN19_IOPORT IOPORT2 +#define TEENSY_PIN25_IOPORT IOPORT2 +#define TEENSY_PIN32_IOPORT IOPORT2 + +#define TEENSY_PIN15 0 +#define TEENSY_PIN22 1 +#define TEENSY_PIN23 2 +#define TEENSY_PIN9 3 +#define TEENSY_PIN10 4 +#define TEENSY_PIN13 5 +#define TEENSY_PIN11 6 +#define TEENSY_PIN12 7 +#define TEENSY_PIN28 8 +#define TEENSY_PIN27 9 +#define TEENSY_PIN29 10 +#define TEENSY_PIN30 11 +#define PORTC_PIN12 12 +#define PORTC_PIN13 13 +#define PORTC_PIN14 14 +#define PORTC_PIN15 15 +#define PORTC_PIN16 16 +#define PORTC_PIN17 17 +#define PORTC_PIN18 18 +#define PORTC_PIN19 19 +#define PORTC_PIN20 20 +#define PORTC_PIN21 21 +#define PORTC_PIN22 22 +#define PORTC_PIN23 23 +#define PORTC_PIN24 24 +#define PORTC_PIN25 25 +#define PORTC_PIN26 26 +#define PORTC_PIN27 27 +#define PORTC_PIN28 28 +#define PORTC_PIN29 29 +#define PORTC_PIN30 30 +#define PORTC_PIN31 31 + +#define TEENSY_PIN9_IOPORT IOPORT3 +#define TEENSY_PIN10_IOPORT IOPORT3 +#define TEENSY_PIN11_IOPORT IOPORT3 +#define TEENSY_PIN12_IOPORT IOPORT3 +#define TEENSY_PIN13_IOPORT IOPORT3 +#define TEENSY_PIN15_IOPORT IOPORT3 +#define TEENSY_PIN22_IOPORT IOPORT3 +#define TEENSY_PIN23_IOPORT IOPORT3 +#define TEENSY_PIN27_IOPORT IOPORT3 +#define TEENSY_PIN28_IOPORT IOPORT3 +#define TEENSY_PIN29_IOPORT IOPORT3 +#define TEENSY_PIN30_IOPORT IOPORT3 + +#define TEENSY_PIN2 0 +#define TEENSY_PIN14 1 +#define TEENSY_PIN7 2 +#define TEENSY_PIN8 3 +#define TEENSY_PIN6 4 +#define TEENSY_PIN20 5 +#define TEENSY_PIN21 6 +#define TEENSY_PIN5 7 +#define PORTD_PIN8 8 +#define PORTD_PIN9 9 +#define PORTD_PIN10 10 +#define PORTD_PIN11 11 +#define PORTD_PIN12 12 +#define PORTD_PIN13 13 +#define PORTD_PIN14 14 +#define PORTD_PIN15 15 +#define PORTD_PIN16 16 +#define PORTD_PIN17 17 +#define PORTD_PIN18 18 +#define PORTD_PIN19 19 +#define PORTD_PIN20 20 +#define PORTD_PIN21 21 +#define PORTD_PIN22 22 +#define PORTD_PIN23 23 +#define PORTD_PIN24 24 +#define PORTD_PIN25 25 +#define PORTD_PIN26 26 +#define PORTD_PIN27 27 +#define PORTD_PIN28 28 +#define PORTD_PIN29 29 +#define PORTD_PIN30 30 +#define PORTD_PIN31 31 + +#define TEENSY_PIN2_IOPORT IOPORT4 +#define TEENSY_PIN5_IOPORT IOPORT4 +#define TEENSY_PIN6_IOPORT IOPORT4 +#define TEENSY_PIN7_IOPORT IOPORT4 +#define TEENSY_PIN8_IOPORT IOPORT4 +#define TEENSY_PIN14_IOPORT IOPORT4 +#define TEENSY_PIN20_IOPORT IOPORT4 +#define TEENSY_PIN21_IOPORT IOPORT4 + +#define TEENSY_PIN31 0 +#define TEENSY_PIN26 1 +#define PORTE_PIN2 2 +#define PORTE_PIN3 3 +#define PORTE_PIN4 4 +#define PORTE_PIN5 5 +#define PORTE_PIN6 6 +#define PORTE_PIN7 7 +#define PORTE_PIN8 8 +#define PORTE_PIN9 9 +#define PORTE_PIN10 10 +#define PORTE_PIN11 11 +#define PORTE_PIN12 12 +#define PORTE_PIN13 13 +#define PORTE_PIN14 14 +#define PORTE_PIN15 15 +#define PORTE_PIN16 16 +#define PORTE_PIN17 17 +#define PORTE_PIN18 18 +#define PORTE_PIN19 19 +#define PORTE_PIN20 20 +#define PORTE_PIN21 21 +#define PORTE_PIN22 22 +#define PORTE_PIN23 23 +#define PORTE_PIN24 24 +#define PORTE_PIN25 25 +#define PORTE_PIN26 26 +#define PORTE_PIN27 27 +#define PORTE_PIN28 28 +#define PORTE_PIN29 29 +#define PORTE_PIN30 30 +#define PORTE_PIN31 31 + +#define TEENSY_PIN26_IOPORT IOPORT5 +#define TEENSY_PIN31_IOPORT IOPORT5 + +#define LINE_PIN1 PAL_LINE(TEENSY_PIN1_IOPORT, TEENSY_PIN1) +#define LINE_PIN2 PAL_LINE(TEENSY_PIN2_IOPORT, TEENSY_PIN2) +#define LINE_PIN3 PAL_LINE(TEENSY_PIN3_IOPORT, TEENSY_PIN3) +#define LINE_PIN4 PAL_LINE(TEENSY_PIN4_IOPORT, TEENSY_PIN4) +#define LINE_PIN5 PAL_LINE(TEENSY_PIN5_IOPORT, TEENSY_PIN5) +#define LINE_PIN6 PAL_LINE(TEENSY_PIN6_IOPORT, TEENSY_PIN6) +#define LINE_PIN7 PAL_LINE(TEENSY_PIN7_IOPORT, TEENSY_PIN7) +#define LINE_PIN8 PAL_LINE(TEENSY_PIN8_IOPORT, TEENSY_PIN8) +#define LINE_PIN9 PAL_LINE(TEENSY_PIN9_IOPORT, TEENSY_PIN9) +#define LINE_PIN10 PAL_LINE(TEENSY_PIN10_IOPORT, TEENSY_PIN10) +#define LINE_PIN11 PAL_LINE(TEENSY_PIN11_IOPORT, TEENSY_PIN11) +#define LINE_PIN12 PAL_LINE(TEENSY_PIN12_IOPORT, TEENSY_PIN12) +#define LINE_PIN13 PAL_LINE(TEENSY_PIN13_IOPORT, TEENSY_PIN13) +#define LINE_PIN14 PAL_LINE(TEENSY_PIN14_IOPORT, TEENSY_PIN14) +#define LINE_PIN15 PAL_LINE(TEENSY_PIN15_IOPORT, TEENSY_PIN15) +#define LINE_PIN16 PAL_LINE(TEENSY_PIN16_IOPORT, TEENSY_PIN16) +#define LINE_PIN17 PAL_LINE(TEENSY_PIN17_IOPORT, TEENSY_PIN17) +#define LINE_PIN18 PAL_LINE(TEENSY_PIN18_IOPORT, TEENSY_PIN18) +#define LINE_PIN19 PAL_LINE(TEENSY_PIN19_IOPORT, TEENSY_PIN19) +#define LINE_PIN20 PAL_LINE(TEENSY_PIN20_IOPORT, TEENSY_PIN20) +#define LINE_PIN21 PAL_LINE(TEENSY_PIN21_IOPORT, TEENSY_PIN21) +#define LINE_PIN22 PAL_LINE(TEENSY_PIN22_IOPORT, TEENSY_PIN22) +#define LINE_PIN23 PAL_LINE(TEENSY_PIN23_IOPORT, TEENSY_PIN23) +#define LINE_PIN24 PAL_LINE(TEENSY_PIN24_IOPORT, TEENSY_PIN24) +#define LINE_PIN25 PAL_LINE(TEENSY_PIN25_IOPORT, TEENSY_PIN25) +#define LINE_PIN25 PAL_LINE(TEENSY_PIN25_IOPORT, TEENSY_PIN25) +#define LINE_PIN26 PAL_LINE(TEENSY_PIN26_IOPORT, TEENSY_PIN26) +#define LINE_PIN27 PAL_LINE(TEENSY_PIN27_IOPORT, TEENSY_PIN27) +#define LINE_PIN28 PAL_LINE(TEENSY_PIN28_IOPORT, TEENSY_PIN28) +#define LINE_PIN29 PAL_LINE(TEENSY_PIN29_IOPORT, TEENSY_PIN29) +#define LINE_PIN30 PAL_LINE(TEENSY_PIN30_IOPORT, TEENSY_PIN30) +#define LINE_PIN31 PAL_LINE(TEENSY_PIN31_IOPORT, TEENSY_PIN31) +#define LINE_PIN32 PAL_LINE(TEENSY_PIN32_IOPORT, TEENSY_PIN32) +#define LINE_PIN33 PAL_LINE(TEENSY_PIN33_IOPORT, TEENSY_PIN33) + +#define LINE_LED LINE_PIN13 + +#if !defined(_FROM_ASM_) +# ifdef __cplusplus +extern "C" { +# endif +void boardInit(void); +# ifdef __cplusplus +} +# endif +#endif /* _FROM_ASM_ */ + +#endif /* _BOARD_H_ */ diff --git a/platforms/chibios/IC_TEENSY_3_1/board/board.mk b/platforms/chibios/IC_TEENSY_3_1/board/board.mk new file mode 100644 index 000000000..842e33590 --- /dev/null +++ b/platforms/chibios/IC_TEENSY_3_1/board/board.mk @@ -0,0 +1,9 @@ +# List of all the board related files. +BOARDSRC = $(BOARD_PATH)/board/board.c + +# Required include directories +BOARDINC = $(BOARD_PATH)/board + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/platforms/chibios/STM32_F103_STM32DUINO/board/board.c b/platforms/chibios/STM32_F103_STM32DUINO/board/board.c new file mode 100644 index 000000000..9135f6136 --- /dev/null +++ b/platforms/chibios/STM32_F103_STM32DUINO/board/board.c @@ -0,0 +1,59 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" + +// Value to place in RTC backup register 10 for persistent bootloader mode +#define RTC_BOOTLOADER_FLAG 0x424C + +/** + * @brief PAL setup. + * @details Digital I/O ports static configuration as defined in @p board.h. + * This variable is used by the HAL when initializing the PAL driver. + */ +#if HAL_USE_PAL || defined(__DOXYGEN__) +const PALConfig pal_default_config = +{ + {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH}, + {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH}, + {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH}, + {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH}, + {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH}, +}; +#endif + +__attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} + +/* + * Early initialization code. + * This initialization must be performed just after stack setup and before + * any other initialization. + */ +void __early_init(void) { + enter_bootloader_mode_if_requested(); + + stm32_clock_init(); +} + +/* + * Board-specific initialization code. + */ +void boardInit(void) { + //JTAG-DP Disabled and SW-DP Enabled + AFIO->MAPR |= AFIO_MAPR_SWJ_CFG_JTAGDISABLE; + //Set backup register DR10 to enter bootloader on reset + BKP->DR10 = RTC_BOOTLOADER_FLAG; +} diff --git a/platforms/chibios/STM32_F103_STM32DUINO/board/board.h b/platforms/chibios/STM32_F103_STM32DUINO/board/board.h new file mode 100644 index 000000000..09d182d6c --- /dev/null +++ b/platforms/chibios/STM32_F103_STM32DUINO/board/board.h @@ -0,0 +1,166 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* + * Setup for a Generic STM32F103 board. + */ + +/* + * Board identifier. + */ +#define BOARD_STM32_F103_STM32DUINO +#define BOARD_NAME "GENERIC STM32F103C8T6 board - stm32duino bootloader" + +/* + * Board frequencies. + */ +#define STM32_LSECLK 32768 +#define STM32_HSECLK 8000000 + +/* + * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h. + */ +#define STM32F103xB + +/* + * IO pins assignments + */ + +/* on-board */ + +#define GPIOA_LED 8 +#define GPIOD_OSC_IN 0 +#define GPIOD_OSC_OUT 1 + +/* In case your board has a "USB enable" hardware + controlled by a pin, define it here. (It could be just + a 1.5k resistor connected to D+ line.) +*/ +/* +#define GPIOB_USB_DISC 10 +*/ + +/* + * I/O ports initial setup, this configuration is established soon after reset + * in the initialization code. + * + * The digits have the following meaning: + * 0 - Analog input. + * 1 - Push Pull output 10MHz. + * 2 - Push Pull output 2MHz. + * 3 - Push Pull output 50MHz. + * 4 - Digital input. + * 5 - Open Drain output 10MHz. + * 6 - Open Drain output 2MHz. + * 7 - Open Drain output 50MHz. + * 8 - Digital input with PullUp or PullDown resistor depending on ODR. + * 9 - Alternate Push Pull output 10MHz. + * A - Alternate Push Pull output 2MHz. + * B - Alternate Push Pull output 50MHz. + * C - Reserved. + * D - Alternate Open Drain output 10MHz. + * E - Alternate Open Drain output 2MHz. + * F - Alternate Open Drain output 50MHz. + * Please refer to the STM32 Reference Manual for details. + */ + +/* + * Port A setup. + * Everything input with pull-up except: + * PA2 - Alternate output (USART2 TX). + * PA3 - Normal input (USART2 RX). + * PA9 - Alternate output (USART1 TX). + * PA10 - Normal input (USART1 RX). + */ +#define VAL_GPIOACRL 0x88884B88 /* PA7...PA0 */ +#define VAL_GPIOACRH 0x888884B8 /* PA15...PA8 */ +#define VAL_GPIOAODR 0xFFFFFFFF + +/* + * Port B setup. + * Everything input with pull-up except: + * PB10 - Push Pull output (USB switch). + */ +#define VAL_GPIOBCRL 0x88888888 /* PB7...PB0 */ +#define VAL_GPIOBCRH 0x88888388 /* PB15...PB8 */ +#define VAL_GPIOBODR 0xFFFFFFFF + +/* + * Port C setup. + * Everything input with pull-up except: + * PC13 - Push Pull output (LED). + */ +#define VAL_GPIOCCRL 0x88888888 /* PC7...PC0 */ +#define VAL_GPIOCCRH 0x88388888 /* PC15...PC8 */ +#define VAL_GPIOCODR 0xFFFFFFFF + +/* + * Port D setup. + * Everything input with pull-up except: + * PD0 - Normal input (XTAL). + * PD1 - Normal input (XTAL). + */ +#define VAL_GPIODCRL 0x88888844 /* PD7...PD0 */ +#define VAL_GPIODCRH 0x88888888 /* PD15...PD8 */ +#define VAL_GPIODODR 0xFFFFFFFF + +/* + * Port E setup. + * Everything input with pull-up except: + */ +#define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */ +#define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */ +#define VAL_GPIOEODR 0xFFFFFFFF + +/* + * USB bus activation macro, required by the USB driver. + */ +/* The point is that most of the generic STM32F103* boards + have a 1.5k resistor connected on one end to the D+ line + and on the other end to some pin. Or even a slightly more + complicated "USB enable" circuit, controlled by a pin. + That should go here. + + However on some boards (e.g. one that I have), there's no + such hardware. In which case it's better to not do anything. +*/ +/* +#define usb_lld_connect_bus(usbp) palClearPad(GPIOB, GPIOB_USB_DISC) +*/ +#define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT); + +/* + * USB bus de-activation macro, required by the USB driver. + */ +/* +#define usb_lld_disconnect_bus(usbp) palSetPad(GPIOB, GPIOB_USB_DISC) +*/ +#define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12); + +#if !defined(_FROM_ASM_) +#ifdef __cplusplus +extern "C" { +#endif + void boardInit(void); +#ifdef __cplusplus +} +#endif +#endif /* _FROM_ASM_ */ + +#endif /* _BOARD_H_ */ diff --git a/platforms/chibios/STM32_F103_STM32DUINO/board/board.mk b/platforms/chibios/STM32_F103_STM32DUINO/board/board.mk new file mode 100644 index 000000000..842e33590 --- /dev/null +++ b/platforms/chibios/STM32_F103_STM32DUINO/board/board.mk @@ -0,0 +1,9 @@ +# List of all the board related files. +BOARDSRC = $(BOARD_PATH)/board/board.c + +# Required include directories +BOARDINC = $(BOARD_PATH)/board + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/platforms/chibios/keyboard-config-templates/board.h b/platforms/chibios/keyboard-config-templates/board.h new file mode 100644 index 000000000..967ec13a1 --- /dev/null +++ b/platforms/chibios/keyboard-config-templates/board.h @@ -0,0 +1,20 @@ +/* Copyright 2020 Nick Brassel (tzarc) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#pragma once + +#include_next "board.h" + +// #undef STM32_HSE_BYPASS diff --git a/platforms/chibios/keyboard-config-templates/chconf.h b/platforms/chibios/keyboard-config-templates/chconf.h new file mode 100644 index 000000000..7c2af93f5 --- /dev/null +++ b/platforms/chibios/keyboard-config-templates/chconf.h @@ -0,0 +1,20 @@ +/* Copyright 2020 Nick Brassel (tzarc) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#pragma once + +// #define CH_CFG_OPTIMIZE_SPEED TRUE + +#include_next "chconf.h" diff --git a/platforms/chibios/keyboard-config-templates/halconf.h b/platforms/chibios/keyboard-config-templates/halconf.h new file mode 100644 index 000000000..ab5f738f9 --- /dev/null +++ b/platforms/chibios/keyboard-config-templates/halconf.h @@ -0,0 +1,20 @@ +/* Copyright 2020 Nick Brassel (tzarc) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#pragma once + +// #define HAL_USE_DAC TRUE + +#include_next "halconf.h" diff --git a/platforms/chibios/keyboard-config-templates/mcuconf.h b/platforms/chibios/keyboard-config-templates/mcuconf.h new file mode 100644 index 000000000..5b42747b9 --- /dev/null +++ b/platforms/chibios/keyboard-config-templates/mcuconf.h @@ -0,0 +1,21 @@ +/* Copyright 2020 Nick Brassel (tzarc) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#pragma once + +#include_next "mcuconf.h" + +// #undef STM32_HSE_ENABLED +// #define STM32_HSE_ENABLED FALSE diff --git a/platforms/chibios/ld/MKL26Z64.ld b/platforms/chibios/ld/MKL26Z64.ld new file mode 100644 index 000000000..c4ca8b874 --- /dev/null +++ b/platforms/chibios/ld/MKL26Z64.ld @@ -0,0 +1,105 @@ +/* + * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com + * (C) 2016 flabbergast + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +/* + * KL26Z64 memory setup. + */ +MEMORY +{ + flash0 : org = 0x00000000, len = 0x100 + flash1 : org = 0x00000400, len = 0x10 + flash2 : org = 0x00000410, len = 62k - 0x410 + flash3 : org = 0x0000F800, len = 2k + flash4 : org = 0x00000000, len = 0 + flash5 : org = 0x00000000, len = 0 + flash6 : org = 0x00000000, len = 0 + flash7 : org = 0x00000000, len = 0 + ram0 : org = 0x1FFFF800, len = 8k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* Flash region for the configuration bytes.*/ +SECTIONS +{ + .cfmprotect : ALIGN(4) SUBALIGN(4) + { + KEEP(*(.cfmconfig)) + } > flash1 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash2); +REGION_ALIAS("XTORS_FLASH_LMA", flash2); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash2); +REGION_ALIAS("TEXT_FLASH_LMA", flash2); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash2); +REGION_ALIAS("RODATA_FLASH_LMA", flash2); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash2); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash2); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash2); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +__eeprom_workarea_start__ = ORIGIN(flash3); +__eeprom_workarea_size__ = LENGTH(flash3); +__eeprom_workarea_end__ = __eeprom_workarea_start__ + __eeprom_workarea_size__; + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/platforms/chibios/ld/STM32F103x8_stm32duino_bootloader.ld b/platforms/chibios/ld/STM32F103x8_stm32duino_bootloader.ld new file mode 100644 index 000000000..d0688ef60 --- /dev/null +++ b/platforms/chibios/ld/STM32F103x8_stm32duino_bootloader.ld @@ -0,0 +1,88 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * ST32F103xB memory setup for use with the maplemini bootloader. + * You will have to + * #define CORTEX_VTOR_INIT 0x5000 + * in your projects chconf.h + */ +MEMORY +{ + flash0 : org = 0x08002000, len = 64k - 0x2000 + flash1 : org = 0x00000000, len = 0 + flash2 : org = 0x00000000, len = 0 + flash3 : org = 0x00000000, len = 0 + flash4 : org = 0x00000000, len = 0 + flash5 : org = 0x00000000, len = 0 + flash6 : org = 0x00000000, len = 0 + flash7 : org = 0x00000000, len = 0 + ram0 : org = 0x20000000, len = 20k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/quantum/stm32/chconf.h b/quantum/stm32/chconf.h deleted file mode 100644 index b6e66f9e4..000000000 --- a/quantum/stm32/chconf.h +++ /dev/null @@ -1,712 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file rt/templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef CHCONF_H -# define CHCONF_H - -# define _CHIBIOS_RT_CONF_ -# define _CHIBIOS_RT_CONF_VER_6_0_ - -/*===========================================================================*/ -/** - * @name System timers settings - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System time counter resolution. - * @note Allowed values are 16 or 32 bits. - */ -# if !defined(CH_CFG_ST_RESOLUTION) -# define CH_CFG_ST_RESOLUTION 32 -# endif - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -# if !defined(CH_CFG_ST_FREQUENCY) -# define CH_CFG_ST_FREQUENCY 100000 -# endif - -/** - * @brief Time intervals data size. - * @note Allowed values are 16, 32 or 64 bits. - */ -# if !defined(CH_CFG_INTERVALS_SIZE) -# define CH_CFG_INTERVALS_SIZE 32 -# endif - -/** - * @brief Time types data size. - * @note Allowed values are 16 or 32 bits. - */ -# if !defined(CH_CFG_TIME_TYPES_SIZE) -# define CH_CFG_TIME_TYPES_SIZE 32 -# endif - -/** - * @brief Time delta constant for the tick-less mode. - * @note If this value is zero then the system uses the classic - * periodic tick. This value represents the minimum number - * of ticks that is safe to specify in a timeout directive. - * The value one is not valid, timeouts are rounded up to - * this value. - */ -# if !defined(CH_CFG_ST_TIMEDELTA) -# define CH_CFG_ST_TIMEDELTA 2 -# endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - * @note The round robin preemption is not supported in tickless mode and - * must be set to zero in that case. - */ -# if !defined(CH_CFG_TIME_QUANTUM) -# define CH_CFG_TIME_QUANTUM 0 -# endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_CFG_USE_MEMCORE. - */ -# if !defined(CH_CFG_MEMCORE_SIZE) -# define CH_CFG_MEMCORE_SIZE 0 -# endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread. The application @p main() - * function becomes the idle thread and must implement an - * infinite loop. - */ -# if !defined(CH_CFG_NO_IDLE_THREAD) -# define CH_CFG_NO_IDLE_THREAD FALSE -# endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -# if !defined(CH_CFG_OPTIMIZE_SPEED) -# define CH_CFG_OPTIMIZE_SPEED TRUE -# endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Time Measurement APIs. - * @details If enabled then the time measurement APIs are included in - * the kernel. - * - * @note The default is @p TRUE. - */ -# if !defined(CH_CFG_USE_TM) -# define CH_CFG_USE_TM TRUE -# endif - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -# if !defined(CH_CFG_USE_REGISTRY) -# define CH_CFG_USE_REGISTRY TRUE -# endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -# if !defined(CH_CFG_USE_WAITEXIT) -# define CH_CFG_USE_WAITEXIT TRUE -# endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -# if !defined(CH_CFG_USE_SEMAPHORES) -# define CH_CFG_USE_SEMAPHORES TRUE -# endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special - * requirements. - * @note Requires @p CH_CFG_USE_SEMAPHORES. - */ -# if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) -# define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE -# endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -# if !defined(CH_CFG_USE_MUTEXES) -# define CH_CFG_USE_MUTEXES TRUE -# endif - -/** - * @brief Enables recursive behavior on mutexes. - * @note Recursive mutexes are heavier and have an increased - * memory footprint. - * - * @note The default is @p FALSE. - * @note Requires @p CH_CFG_USE_MUTEXES. - */ -# if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) -# define CH_CFG_USE_MUTEXES_RECURSIVE FALSE -# endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_MUTEXES. - */ -# if !defined(CH_CFG_USE_CONDVARS) -# define CH_CFG_USE_CONDVARS TRUE -# endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_CONDVARS. - */ -# if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) -# define CH_CFG_USE_CONDVARS_TIMEOUT TRUE -# endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -# if !defined(CH_CFG_USE_EVENTS) -# define CH_CFG_USE_EVENTS TRUE -# endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_EVENTS. - */ -# if !defined(CH_CFG_USE_EVENTS_TIMEOUT) -# define CH_CFG_USE_EVENTS_TIMEOUT TRUE -# endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -# if !defined(CH_CFG_USE_MESSAGES) -# define CH_CFG_USE_MESSAGES TRUE -# endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special - * requirements. - * @note Requires @p CH_CFG_USE_MESSAGES. - */ -# if !defined(CH_CFG_USE_MESSAGES_PRIORITY) -# define CH_CFG_USE_MESSAGES_PRIORITY TRUE -# endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_SEMAPHORES. - */ -# if !defined(CH_CFG_USE_MAILBOXES) -# define CH_CFG_USE_MAILBOXES TRUE -# endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -# if !defined(CH_CFG_USE_MEMCORE) -# define CH_CFG_USE_MEMCORE TRUE -# endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or - * @p CH_CFG_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -# if !defined(CH_CFG_USE_HEAP) -# define CH_CFG_USE_HEAP TRUE -# endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -# if !defined(CH_CFG_USE_MEMPOOLS) -# define CH_CFG_USE_MEMPOOLS TRUE -# endif - -/** - * @brief Objects FIFOs APIs. - * @details If enabled then the objects FIFOs APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -# if !defined(CH_CFG_USE_OBJ_FIFOS) -# define CH_CFG_USE_OBJ_FIFOS TRUE -# endif - -/** - * @brief Pipes APIs. - * @details If enabled then the pipes APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -# if !defined(CH_CFG_USE_PIPES) -# define CH_CFG_USE_PIPES TRUE -# endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_WAITEXIT. - * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. - */ -# if !defined(CH_CFG_USE_DYNAMIC) -# define CH_CFG_USE_DYNAMIC TRUE -# endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Objects factory options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Objects Factory APIs. - * @details If enabled then the objects factory APIs are included in the - * kernel. - * - * @note The default is @p FALSE. - */ -# if !defined(CH_CFG_USE_FACTORY) -# define CH_CFG_USE_FACTORY TRUE -# endif - -/** - * @brief Maximum length for object names. - * @details If the specified length is zero then the name is stored by - * pointer but this could have unintended side effects. - */ -# if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) -# define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 -# endif - -/** - * @brief Enables the registry of generic objects. - */ -# if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) -# define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE -# endif - -/** - * @brief Enables factory for generic buffers. - */ -# if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) -# define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE -# endif - -/** - * @brief Enables factory for semaphores. - */ -# if !defined(CH_CFG_FACTORY_SEMAPHORES) -# define CH_CFG_FACTORY_SEMAPHORES TRUE -# endif - -/** - * @brief Enables factory for mailboxes. - */ -# if !defined(CH_CFG_FACTORY_MAILBOXES) -# define CH_CFG_FACTORY_MAILBOXES TRUE -# endif - -/** - * @brief Enables factory for objects FIFOs. - */ -# if !defined(CH_CFG_FACTORY_OBJ_FIFOS) -# define CH_CFG_FACTORY_OBJ_FIFOS TRUE -# endif - -/** - * @brief Enables factory for Pipes. - */ -# if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) -# define CH_CFG_FACTORY_PIPES TRUE -# endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, kernel statistics. - * - * @note The default is @p FALSE. - */ -# if !defined(CH_DBG_STATISTICS) -# define CH_DBG_STATISTICS FALSE -# endif - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -# if !defined(CH_DBG_SYSTEM_STATE_CHECK) -# define CH_DBG_SYSTEM_STATE_CHECK FALSE -# endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -# if !defined(CH_DBG_ENABLE_CHECKS) -# define CH_DBG_ENABLE_CHECKS FALSE -# endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -# if !defined(CH_DBG_ENABLE_ASSERTS) -# define CH_DBG_ENABLE_ASSERTS FALSE -# endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the trace buffer is activated. - * - * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. - */ -# if !defined(CH_DBG_TRACE_MASK) -# define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED -# endif - -/** - * @brief Trace buffer entries. - * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is - * different from @p CH_DBG_TRACE_MASK_DISABLED. - */ -# if !defined(CH_DBG_TRACE_BUFFER_SIZE) -# define CH_DBG_TRACE_BUFFER_SIZE 128 -# endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -# if !defined(CH_DBG_ENABLE_STACK_CHECK) -# define CH_DBG_ENABLE_STACK_CHECK TRUE -# endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -# if !defined(CH_DBG_FILL_THREADS) -# define CH_DBG_FILL_THREADS FALSE -# endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p thread_t structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p FALSE. - * @note This debug option is not currently compatible with the - * tickless mode. - */ -# if !defined(CH_DBG_THREADS_PROFILING) -# define CH_DBG_THREADS_PROFILING FALSE -# endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System structure extension. - * @details User fields added to the end of the @p ch_system_t structure. - */ -# define CH_CFG_SYSTEM_EXTRA_FIELDS /* Add threads custom fields here.*/ - -/** - * @brief System initialization hook. - * @details User initialization code added to the @p chSysInit() function - * just before interrupts are enabled globally. - */ -# define CH_CFG_SYSTEM_INIT_HOOK() \ - { /* Add threads initialization code here.*/ \ - } - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p thread_t structure. - */ -# define CH_CFG_THREAD_EXTRA_FIELDS /* Add threads custom fields here.*/ - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p _thread_init() function. - * - * @note It is invoked from within @p _thread_init() and implicitly from all - * the threads creation APIs. - */ -# define CH_CFG_THREAD_INIT_HOOK(tp) \ - { /* Add threads initialization code here.*/ \ - } - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - */ -# define CH_CFG_THREAD_EXIT_HOOK(tp) \ - { /* Add threads finalization code here.*/ \ - } - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -# define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) \ - { /* Context switch code here.*/ \ - } - -/** - * @brief ISR enter hook. - */ -# define CH_CFG_IRQ_PROLOGUE_HOOK() \ - { /* IRQ prologue code here.*/ \ - } - -/** - * @brief ISR exit hook. - */ -# define CH_CFG_IRQ_EPILOGUE_HOOK() \ - { /* IRQ epilogue code here.*/ \ - } - -/** - * @brief Idle thread enter hook. - * @note This hook is invoked within a critical zone, no OS functions - * should be invoked from here. - * @note This macro can be used to activate a power saving mode. - */ -# define CH_CFG_IDLE_ENTER_HOOK() \ - { /* Idle-enter code here.*/ \ - } - -/** - * @brief Idle thread leave hook. - * @note This hook is invoked within a critical zone, no OS functions - * should be invoked from here. - * @note This macro can be used to deactivate a power saving mode. - */ -# define CH_CFG_IDLE_LEAVE_HOOK() \ - { /* Idle-leave code here.*/ \ - } - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -# define CH_CFG_IDLE_LOOP_HOOK() \ - { /* Idle loop code here.*/ \ - } - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -# define CH_CFG_SYSTEM_TICK_HOOK() \ - { /* System tick event code here.*/ \ - } - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -# define CH_CFG_SYSTEM_HALT_HOOK(reason) \ - { /* System halt code here.*/ \ - } - -/** - * @brief Trace hook. - * @details This hook is invoked each time a new record is written in the - * trace buffer. - */ -# define CH_CFG_TRACE_HOOK(tep) \ - { /* Trace code here.*/ \ - } - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* CHCONF_H */ - -/** @} */ diff --git a/quantum/stm32/halconf.h b/quantum/stm32/halconf.h deleted file mode 100644 index b6c7b392c..000000000 --- a/quantum/stm32/halconf.h +++ /dev/null @@ -1,524 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef HALCONF_H -# define HALCONF_H - -# define _CHIBIOS_HAL_CONF_ -# define _CHIBIOS_HAL_CONF_VER_7_0_ - -# include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -# if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -# define HAL_USE_PAL TRUE -# endif - -/** - * @brief Enables the ADC subsystem. - */ -# if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -# define HAL_USE_ADC FALSE -# endif - -/** - * @brief Enables the CAN subsystem. - */ -# if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -# define HAL_USE_CAN FALSE -# endif - -/** - * @brief Enables the cryptographic subsystem. - */ -# if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) -# define HAL_USE_CRY FALSE -# endif - -/** - * @brief Enables the DAC subsystem. - */ -# if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) -# define HAL_USE_DAC TRUE -# endif - -/** - * @brief Enables the GPT subsystem. - */ -# if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -# define HAL_USE_GPT TRUE -# endif - -/** - * @brief Enables the I2C subsystem. - */ -# if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -# define HAL_USE_I2C TRUE -# endif - -/** - * @brief Enables the I2S subsystem. - */ -# if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) -# define HAL_USE_I2S FALSE -# endif - -/** - * @brief Enables the ICU subsystem. - */ -# if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -# define HAL_USE_ICU FALSE -# endif - -/** - * @brief Enables the MAC subsystem. - */ -# if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -# define HAL_USE_MAC FALSE -# endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -# if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -# define HAL_USE_MMC_SPI FALSE -# endif - -/** - * @brief Enables the PWM subsystem. - */ -# if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -# define HAL_USE_PWM TRUE -# endif - -/** - * @brief Enables the RTC subsystem. - */ -# if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -# define HAL_USE_RTC FALSE -# endif - -/** - * @brief Enables the SDC subsystem. - */ -# if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -# define HAL_USE_SDC FALSE -# endif - -/** - * @brief Enables the SERIAL subsystem. - */ -# if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -# define HAL_USE_SERIAL FALSE -# endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -# if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -# define HAL_USE_SERIAL_USB TRUE -# endif - -/** - * @brief Enables the SIO subsystem. - */ -# if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) -# define HAL_USE_SIO FALSE -# endif - -/** - * @brief Enables the SPI subsystem. - */ -# if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -# define HAL_USE_SPI TRUE -# endif - -/** - * @brief Enables the TRNG subsystem. - */ -# if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) -# define HAL_USE_TRNG FALSE -# endif - -/** - * @brief Enables the UART subsystem. - */ -# if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -# define HAL_USE_UART FALSE -# endif - -/** - * @brief Enables the USB subsystem. - */ -# if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -# define HAL_USE_USB TRUE -# endif - -/** - * @brief Enables the WDG subsystem. - */ -# if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) -# define HAL_USE_WDG FALSE -# endif - -/** - * @brief Enables the WSPI subsystem. - */ -# if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) -# define HAL_USE_WSPI FALSE -# endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -# if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) -# define PAL_USE_CALLBACKS TRUE -# endif - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -# if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) -# define PAL_USE_WAIT TRUE -# endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -# if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -# define ADC_USE_WAIT TRUE -# endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -# if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -# define ADC_USE_MUTUAL_EXCLUSION TRUE -# endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -# if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -# define CAN_USE_SLEEP_MODE TRUE -# endif - -/** - * @brief Enforces the driver to use direct callbacks rather than OSAL events. - */ -# if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) -# define CAN_ENFORCE_USE_CALLBACKS FALSE -# endif - -/*===========================================================================*/ -/* CRY driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the SW fall-back of the cryptographic driver. - * @details When enabled, this option, activates a fall-back software - * implementation for algorithms not supported by the underlying - * hardware. - * @note Fall-back implementations may not be present for all algorithms. - */ -# if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) -# define HAL_CRY_USE_FALLBACK FALSE -# endif - -/** - * @brief Makes the driver forcibly use the fall-back implementations. - */ -# if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) -# define HAL_CRY_ENFORCE_FALLBACK FALSE -# endif - -/*===========================================================================*/ -/* DAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -# if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) -# define DAC_USE_WAIT TRUE -# endif - -/** - * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -# if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -# define DAC_USE_MUTUAL_EXCLUSION TRUE -# endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -# if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -# define I2C_USE_MUTUAL_EXCLUSION TRUE -# endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the zero-copy API. - */ -# if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -# define MAC_USE_ZERO_COPY FALSE -# endif - -/** - * @brief Enables an event sources for incoming packets. - */ -# if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -# define MAC_USE_EVENTS TRUE -# endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -# if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -# define MMC_NICE_WAITING TRUE -# endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -# if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -# define SDC_INIT_RETRY 100 -# endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -# if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -# define SDC_MMC_SUPPORT FALSE -# endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -# if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -# define SDC_NICE_WAITING TRUE -# endif - -/** - * @brief OCR initialization constant for V20 cards. - */ -# if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) -# define SDC_INIT_OCR_V20 0x50FF8000U -# endif - -/** - * @brief OCR initialization constant for non-V20 cards. - */ -# if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) -# define SDC_INIT_OCR 0x80100000U -# endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -# if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -# define SERIAL_DEFAULT_BITRATE 38400 -# endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 16 bytes for both the transmission and receive - * buffers. - */ -# if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -# define SERIAL_BUFFERS_SIZE 16 -# endif - -/*===========================================================================*/ -/* SERIAL_USB driver related setting. */ -/*===========================================================================*/ - -/** - * @brief Serial over USB buffers size. - * @details Configuration parameter, the buffer size must be a multiple of - * the USB data endpoint maximum packet size. - * @note The default is 256 bytes for both the transmission and receive - * buffers. - */ -# if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) -# define SERIAL_USB_BUFFERS_SIZE 1 -# endif - -/** - * @brief Serial over USB number of buffers. - * @note The default is 2 buffers. - */ -# if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) -# define SERIAL_USB_BUFFERS_NUMBER 2 -# endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -# if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -# define SPI_USE_WAIT TRUE -# endif - -/** - * @brief Enables circular transfers APIs. - * @note Disabling this option saves both code and data space. - */ -# if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) -# define SPI_USE_CIRCULAR FALSE -# endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -# if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -# define SPI_USE_MUTUAL_EXCLUSION TRUE -# endif - -/** - * @brief Handling method for SPI CS line. - * @note Disabling this option saves both code and data space. - */ -# if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) -# define SPI_SELECT_MODE SPI_SELECT_MODE_PAD -# endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -# if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) -# define UART_USE_WAIT FALSE -# endif - -/** - * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -# if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -# define UART_USE_MUTUAL_EXCLUSION FALSE -# endif - -/*===========================================================================*/ -/* USB driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -# if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) -# define USB_USE_WAIT TRUE -# endif - -/*===========================================================================*/ -/* WSPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -# if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) -# define WSPI_USE_WAIT TRUE -# endif - -/** - * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -# if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -# define WSPI_USE_MUTUAL_EXCLUSION TRUE -# endif - -#endif /* HALCONF_H */ - -/** @} */ diff --git a/quantum/stm32/mcuconf.h b/quantum/stm32/mcuconf.h deleted file mode 100644 index 71994a98e..000000000 --- a/quantum/stm32/mcuconf.h +++ /dev/null @@ -1,273 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef MCUCONF_H -#define MCUCONF_H - -/* - * STM32F3xx drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32F3xx_MCUCONF -#define STM32F303_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PREDIV_VALUE 1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 -#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 -#define STM32_USART1SW STM32_USART1SW_PCLK -#define STM32_USART2SW STM32_USART2SW_PCLK -#define STM32_USART3SW STM32_USART3SW_PCLK -#define STM32_UART4SW STM32_UART4SW_PCLK -#define STM32_UART5SW STM32_UART5SW_PCLK -#define STM32_I2C1SW STM32_I2C1SW_SYSCLK -#define STM32_I2C2SW STM32_I2C2SW_SYSCLK -#define STM32_TIM1SW STM32_TIM1SW_PCLK2 -#define STM32_TIM8SW STM32_TIM8SW_PCLK2 -#define STM32_RTCSEL STM32_RTCSEL_LSI -#define STM32_USB_CLOCK_REQUIRED TRUE -#define STM32_USBPRE STM32_USBPRE_DIV1P5 - -/* - * IRQ system settings. - */ -#define STM32_IRQ_EXTI0_PRIORITY 6 -#define STM32_IRQ_EXTI1_PRIORITY 6 -#define STM32_IRQ_EXTI2_PRIORITY 6 -#define STM32_IRQ_EXTI3_PRIORITY 6 -#define STM32_IRQ_EXTI4_PRIORITY 6 -#define STM32_IRQ_EXTI5_9_PRIORITY 6 -#define STM32_IRQ_EXTI10_15_PRIORITY 6 -#define STM32_IRQ_EXTI16_PRIORITY 6 -#define STM32_IRQ_EXTI17_PRIORITY 15 -#define STM32_IRQ_EXTI18_PRIORITY 6 -#define STM32_IRQ_EXTI19_PRIORITY 15 -#define STM32_IRQ_EXTI20_PRIORITY 15 -#define STM32_IRQ_EXTI21_22_29_PRIORITY 6 -#define STM32_IRQ_EXTI30_32_PRIORITY 6 -#define STM32_IRQ_EXTI33_PRIORITY 6 -#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 -#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 -#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 -#define STM32_IRQ_TIM1_CC_PRIORITY 7 - -/* - * ADC driver system settings. - */ -#define STM32_ADC_DUAL_MODE FALSE -#define STM32_ADC_COMPACT_SAMPLES FALSE -#define STM32_ADC_USE_ADC1 FALSE -#define STM32_ADC_USE_ADC2 FALSE -#define STM32_ADC_USE_ADC3 FALSE -#define STM32_ADC_USE_ADC4 FALSE -#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) -#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) -#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) -#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC2_DMA_PRIORITY 2 -#define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_ADC4_DMA_PRIORITY 2 -#define STM32_ADC_ADC12_IRQ_PRIORITY 5 -#define STM32_ADC_ADC3_IRQ_PRIORITY 5 -#define STM32_ADC_ADC4_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 -#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 FALSE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * DAC driver system settings. - */ -#define STM32_DAC_DUAL_MODE FALSE -#define STM32_DAC_USE_DAC1_CH1 TRUE -#define STM32_DAC_USE_DAC1_CH2 TRUE -#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 -#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 -#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 -#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM6 TRUE -#define STM32_GPT_USE_TIM7 TRUE -#define STM32_GPT_USE_TIM8 TRUE -#define STM32_GPT_USE_TIM15 FALSE -#define STM32_GPT_USE_TIM16 FALSE -#define STM32_GPT_USE_TIM17 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM6_IRQ_PRIORITY 7 -#define STM32_GPT_TIM7_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * I2C driver system settings. - */ -#define STM32_I2C_USE_I2C1 TRUE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_BUSY_TIMEOUT 50 -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_USE_DMA TRUE -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_USE_TIM15 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 TRUE -#define STM32_PWM_USE_TIM4 TRUE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_USE_TIM15 FALSE -#define STM32_PWM_USE_TIM16 FALSE -#define STM32_PWM_USE_TIM17 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * RTC driver system settings. - */ -#define STM32_RTC_PRESA_VALUE 32 -#define STM32_RTC_PRESS_VALUE 1024 -#define STM32_RTC_CR_INIT 0 -#define STM32_RTC_TAMPCR_INIT 0 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") - -/* - * ST driver system settings. - */ -#define STM32_ST_IRQ_PRIORITY 8 -#define STM32_ST_USE_TIMER 2 - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 - -/* - * WDG driver system settings. - */ -#define STM32_WDG_USE_IWDG FALSE - -#endif /* MCUCONF_H */ diff --git a/quantum/stm32/proton_c.mk b/quantum/stm32/proton_c.mk deleted file mode 100644 index b25b55504..000000000 --- a/quantum/stm32/proton_c.mk +++ /dev/null @@ -1,47 +0,0 @@ -# Proton C MCU settings for converting AVR projects - -# These are defaults based on what has been implemented for ARM boards -AUDIO_ENABLE = yes -WS2812_DRIVER = bitbang - -# Force task driven PWM until ARM can provide automatic configuration -BACKLIGHT_DRIVER = software - -# The rest of these settings shouldn't change - -## chip/board settings -# - the next two should match the directories in -# /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) -MCU_FAMILY = STM32 -MCU_SERIES = STM32F3xx - -# Linker script to use -# - it should exist either in /os/common/ports/ARMCMx/compilers/GCC/ld/ -# or /ld/ -MCU_LDSCRIPT = STM32F303xC - -# Startup code to use -# - it should exist in /os/common/startup/ARMCMx/compilers/GCC/mk/ -MCU_STARTUP = stm32f3xx - -# Board: it should exist either in /os/hal/boards/ -# or /boards -BOARD = GENERIC_STM32_F303XC - -# Cortex version -MCU = cortex-m4 - -# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 -ARMV = 7 - -USE_FPU = yes - -# Vector table for application -# 0x00000000-0x00001000 area is occupied by bootlaoder.*/ -# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB -# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000 -OPT_DEFS = - -# Options to pass to dfu-util when flashing -DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave -DFU_SUFFIX_ARGS = -p df11 -v 0483 diff --git a/tmk_core/chibios.mk b/tmk_core/chibios.mk index 09aaddeef..4e8abc9be 100644 --- a/tmk_core/chibios.mk +++ b/tmk_core/chibios.mk @@ -50,11 +50,42 @@ PLATFORM_MK = $(CHIBIOS_CONTRIB)/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)/$(PLAT endif include $(PLATFORM_MK) +BOARD_MK := + +ifneq ("$(wildcard $(KEYBOARD_PATH_5)/boards/$(BOARD)/board.mk)","") + BOARD_PATH = $(KEYBOARD_PATH_5) + BOARD_MK += $(KEYBOARD_PATH_5)/boards/$(BOARD)/board.mk +else ifneq ("$(wildcard $(KEYBOARD_PATH_4)/boards/$(BOARD)/board.mk)","") + BOARD_PATH = $(KEYBOARD_PATH_4) + BOARD_MK += $(KEYBOARD_PATH_4)/boards/$(BOARD)/board.mk +else ifneq ("$(wildcard $(KEYBOARD_PATH_3)/boards/$(BOARD)/board.mk)","") + BOARD_PATH = $(KEYBOARD_PATH_3) + BOARD_MK += $(KEYBOARD_PATH_3)/boards/$(BOARD)/board.mk +else ifneq ("$(wildcard $(KEYBOARD_PATH_2)/boards/$(BOARD)/board.mk)","") + BOARD_PATH = $(KEYBOARD_PATH_2) + BOARD_MK += $(KEYBOARD_PATH_2)/boards/$(BOARD)/board.mk +else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/boards/$(BOARD)/board.mk)","") + BOARD_PATH = $(KEYBOARD_PATH_1) + BOARD_MK += $(KEYBOARD_PATH_1)/boards/$(BOARD)/board.mk +else ifneq ("$(wildcard $(TOP_DIR)/platforms/chibios/$(BOARD)/board/board.mk)","") + BOARD_PATH = $(TOP_DIR)/platforms/chibios/$(BOARD) + BOARD_MK += $(TOP_DIR)/platforms/chibios/$(BOARD)/board/board.mk + KEYBOARD_PATHS += $(BOARD_PATH)/configs +endif + +ifeq ("$(wildcard $(BOARD_MK))","") + BOARD_MK = $(CHIBIOS)/os/hal/boards/$(BOARD)/board.mk + ifeq ("$(wildcard $(BOARD_MK))","") + BOARD_MK = $(CHIBIOS_CONTRIB)/os/hal/boards/$(BOARD)/board.mk + endif +endif + # Bootloader address ifdef STM32_BOOTLOADER_ADDRESS OPT_DEFS += -DSTM32_BOOTLOADER_ADDRESS=$(STM32_BOOTLOADER_ADDRESS) endif +# Work out if we need to set up the include for the bootloader definitions ifneq ("$(wildcard $(KEYBOARD_PATH_5)/bootloader_defs.h)","") OPT_DEFS += -include $(KEYBOARD_PATH_5)/bootloader_defs.h else ifneq ("$(wildcard $(KEYBOARD_PATH_5)/boards/$(BOARD)/bootloader_defs.h)","") @@ -75,38 +106,52 @@ else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/bootloader_defs.h)","") OPT_DEFS += -include $(KEYBOARD_PATH_1)/bootloader_defs.h else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/boards/$(BOARD)/bootloader_defs.h)","") OPT_DEFS += -include $(KEYBOARD_PATH_1)/boards/$(BOARD)/bootloader_defs.h -else ifneq ("$(wildcard $(TOP_DIR)/drivers/boards/$(BOARD)/bootloader_defs.h)","") - OPT_DEFS += -include $(TOP_DIR)/drivers/boards/$(BOARD)/bootloader_defs.h +else ifneq ("$(wildcard $(BOARD_PATH)/configs/bootloader_defs.h)","") + OPT_DEFS += -include $(BOARD_PATH)/configs/bootloader_defs.h endif -BOARD_MK := +# Work out the config file directories +ifneq ("$(wildcard $(KEYBOARD_PATH_5)/chconf.h)","") + CHCONFDIR = $(KEYBOARD_PATH_5) +else ifneq ("$(wildcard $(KEYBOARD_PATH_4)/chconf.h)","") + CHCONFDIR = $(KEYBOARD_PATH_4) +else ifneq ("$(wildcard $(KEYBOARD_PATH_3)/chconf.h)","") + CHCONFDIR = $(KEYBOARD_PATH_3) +else ifneq ("$(wildcard $(KEYBOARD_PATH_2)/chconf.h)","") + CHCONFDIR = $(KEYBOARD_PATH_2) +else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/chconf.h)","") + CHCONFDIR = $(KEYBOARD_PATH_1) +else ifneq ("$(wildcard $(TOP_DIR)/platforms/chibios/$(BOARD)/configs/chconf.h)","") + CHCONFDIR = $(TOP_DIR)/platforms/chibios/$(BOARD)/configs +endif -ifneq ("$(wildcard $(KEYBOARD_PATH_5)/boards/$(BOARD)/board.mk)","") - BOARD_PATH = $(KEYBOARD_PATH_5) - BOARD_MK += $(KEYBOARD_PATH_5)/boards/$(BOARD)/board.mk -else ifneq ("$(wildcard $(KEYBOARD_PATH_4)/boards/$(BOARD)/board.mk)","") - BOARD_PATH = $(KEYBOARD_PATH_4) - BOARD_MK += $(KEYBOARD_PATH_4)/boards/$(BOARD)/board.mk -else ifneq ("$(wildcard $(KEYBOARD_PATH_3)/boards/$(BOARD)/board.mk)","") - BOARD_PATH = $(KEYBOARD_PATH_3) - BOARD_MK += $(KEYBOARD_PATH_3)/boards/$(BOARD)/board.mk -else ifneq ("$(wildcard $(KEYBOARD_PATH_2)/boards/$(BOARD)/board.mk)","") - BOARD_PATH = $(KEYBOARD_PATH_2) - BOARD_MK += $(KEYBOARD_PATH_2)/boards/$(BOARD)/board.mk -else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/boards/$(BOARD)/board.mk)","") - BOARD_PATH = $(KEYBOARD_PATH_1) - BOARD_MK += $(KEYBOARD_PATH_1)/boards/$(BOARD)/board.mk -else ifneq ("$(wildcard $(TOP_DIR)/drivers/boards/$(BOARD)/board.mk)","") - BOARD_PATH = $(TOP_DIR)/drivers - BOARD_MK += $(TOP_DIR)/drivers/boards/$(BOARD)/board.mk +ifneq ("$(wildcard $(KEYBOARD_PATH_5)/halconf.h)","") + HALCONFDIR = $(KEYBOARD_PATH_5) +else ifneq ("$(wildcard $(KEYBOARD_PATH_4)/halconf.h)","") + HALCONFDIR = $(KEYBOARD_PATH_4) +else ifneq ("$(wildcard $(KEYBOARD_PATH_3)/halconf.h)","") + HALCONFDIR = $(KEYBOARD_PATH_3) +else ifneq ("$(wildcard $(KEYBOARD_PATH_2)/halconf.h)","") + HALCONFDIR = $(KEYBOARD_PATH_2) +else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/halconf.h)","") + HALCONFDIR = $(KEYBOARD_PATH_1) +else ifneq ("$(wildcard $(TOP_DIR)/platforms/chibios/$(BOARD)/configs/halconf.h)","") + HALCONFDIR = $(TOP_DIR)/platforms/chibios/$(BOARD)/configs endif -ifeq ("$(wildcard $(BOARD_MK))","") - BOARD_MK = $(CHIBIOS)/os/hal/boards/$(BOARD)/board.mk - ifeq ("$(wildcard $(BOARD_MK))","") - BOARD_MK = $(CHIBIOS_CONTRIB)/os/hal/boards/$(BOARD)/board.mk - endif +# HAL-OSAL files (optional). +include $(CHIBIOS)/os/hal/hal.mk + +ifeq ("$(PLATFORM_NAME)","") + PLATFORM_NAME = platform +endif + +PLATFORM_MK = $(CHIBIOS)/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)/$(PLATFORM_NAME).mk +ifeq ("$(wildcard $(PLATFORM_MK))","") +PLATFORM_MK = $(CHIBIOS_CONTRIB)/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)/$(PLATFORM_NAME).mk endif +include $(PLATFORM_MK) + include $(BOARD_MK) -include $(CHIBIOS)/os/hal/osal/rt/osal.mk # ChibiOS <= 19.x @@ -138,8 +183,8 @@ else ifneq ("$(wildcard $(KEYBOARD_PATH_2)/ld/$(MCU_LDSCRIPT).ld)","") LDSCRIPT = $(KEYBOARD_PATH_2)/ld/$(MCU_LDSCRIPT).ld else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/ld/$(MCU_LDSCRIPT).ld)","") LDSCRIPT = $(KEYBOARD_PATH_1)/ld/$(MCU_LDSCRIPT).ld -else ifneq ("$(wildcard $(TOP_DIR)/drivers/boards/ld/$(MCU_LDSCRIPT).ld)","") - LDSCRIPT = $(TOP_DIR)/drivers/boards/ld/$(MCU_LDSCRIPT).ld +else ifneq ("$(wildcard $(TOP_DIR)/platforms/chibios/ld/$(MCU_LDSCRIPT).ld)","") + LDSCRIPT = $(TOP_DIR)/platforms/chibios/ld/$(MCU_LDSCRIPT).ld else ifneq ("$(wildcard $(STARTUPLD_CONTRIB)/$(MCU_LDSCRIPT).ld)","") LDSCRIPT = $(STARTUPLD_CONTRIB)/$(MCU_LDSCRIPT).ld USE_CHIBIOS_CONTRIB = yes @@ -163,6 +208,7 @@ QUANTUM_LIB_SRC += $(STARTUPASM) $(PORTASM) $(OSALASM) CHIBISRC := $(patsubst $(TOP_DIR)/%,%,$(CHIBISRC)) EXTRAINCDIRS += $(CHIBIOS)/os/license $(CHIBIOS)/os/oslib/include \ + $(TOP_DIR)/platforms/chibios/$(BOARD)/configs \ $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ $(STREAMSINC) $(CHIBIOS)/os/various $(COMMON_VPATH) @@ -182,6 +228,8 @@ else ifneq ("$(wildcard $(KEYBOARD_PATH_2)/halconf_community.h)","") USE_CHIBIOS_CONTRIB = yes else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/halconf_community.h)","") USE_CHIBIOS_CONTRIB = yes +else ifneq ("$(wildcard $(TOP_DIR)/platforms/chibios/$(BOARD)/configs/halconf_community.h)","") + USE_CHIBIOS_CONTRIB = yes endif ifeq ($(strip $(USE_CHIBIOS_CONTRIB)),yes) @@ -194,6 +242,15 @@ endif # Project, sources and paths ############################################################################## +############################################################################## +# Injected configs +# +ifneq ("$(wildcard $(BOARD_PATH)/configs/config.h)","") + CONFIG_H += $(BOARD_PATH)/configs/config.h +endif +ifneq ("$(wildcard $(BOARD_PATH)/configs/post_config.h)","") + POST_CONFIG_H += $(BOARD_PATH)/configs/post_config.h +endif ############################################################################## # Compiler settings diff --git a/util/chibios-upgrader.sh b/util/chibios-upgrader.sh index 2174da3cf..ebc12abe7 100755 --- a/util/chibios-upgrader.sh +++ b/util/chibios-upgrader.sh @@ -38,7 +38,11 @@ find_chibi_files() { local search_path="$1" shift local conditions=( "$@" ) - find -L "$search_path" -not -path '*/lib/chibios*' -and -not -path '*/lib/ugfx*' -and -not -path '*/util/*' -and \( "${conditions[@]}" \) | sort + for file in $(find -L "$search_path" -not -path '*/lib/chibios*' -and -not -path '*/lib/ugfx*' -and -not -path '*/util/*' -and \( "${conditions[@]}" \) | sort) ; do + if [ -z "$(grep 'include_next' "$file")" ] ; then + echo $file + fi + done } revert_chibi_files() { diff --git a/util/travis_compiled_push.sh b/util/travis_compiled_push.sh index 68f6d5c11..195a87208 100755 --- a/util/travis_compiled_push.sh +++ b/util/travis_compiled_push.sh @@ -13,7 +13,7 @@ if [[ "$TRAVIS_BRANCH" == "master" && "$TRAVIS_PULL_REQUEST" == "false" ]] ; the # fix formatting git checkout master git diff --diff-filter=AM --name-only -n 1 -z ${TRAVIS_COMMIT_RANGE} | xargs -0 dos2unix -git diff --diff-filter=AM --name-only -n 1 -z ${TRAVIS_COMMIT_RANGE} '*.c' '*.h' '*.cpp' | grep -z -e '^drivers' -e '^quantum' -e '^tests' -e '^tmk_core' | grep -zv -e 'quantum/template' -e 'tmk_core/protocol/usb_hid' | xargs -0 clang-format-7 -i +git diff --diff-filter=AM --name-only -n 1 -z ${TRAVIS_COMMIT_RANGE} '*.c' '*.h' '*.cpp' | grep -z -e '^drivers' -e '^quantum' -e '^tests' -e '^tmk_core' | grep -zv -e 'quantum/template' -e 'tmk_core/protocol/usb_hid' -e 'platforms/chibios' | xargs -0 clang-format-7 -i git diff --diff-filter=AM --name-only -n 1 -z ${TRAVIS_COMMIT_RANGE} | xargs -0 git add git commit -m "format code according to conventions [skip ci]" && git push git@github.com:qmk/qmk_firmware.git master -- cgit v1.3.1 From f209f91c7ce073aa0381e79c10219616cb7db523 Mon Sep 17 00:00:00 2001 From: Ryan Date: Sun, 7 Jun 2020 15:00:21 +1000 Subject: Various tidyups for USB descriptor code (#9005) --- tmk_core/protocol/chibios/usb_main.c | 8 +-- tmk_core/protocol/lufa/lufa.c | 120 ++++++++++++++++++----------------- tmk_core/protocol/lufa/lufa.h | 4 -- tmk_core/protocol/usb_descriptor.c | 10 +-- tmk_core/protocol/usb_descriptor.h | 5 -- tmk_core/protocol/vusb/vusb.c | 24 +++---- 6 files changed, 80 insertions(+), 91 deletions(-) (limited to 'tmk_core') diff --git a/tmk_core/protocol/chibios/usb_main.c b/tmk_core/protocol/chibios/usb_main.c index 65bd291be..9d68419f4 100644 --- a/tmk_core/protocol/chibios/usb_main.c +++ b/tmk_core/protocol/chibios/usb_main.c @@ -62,7 +62,7 @@ extern keymap_config_t keymap_config; uint8_t keyboard_idle __attribute__((aligned(2))) = 0; uint8_t keyboard_protocol __attribute__((aligned(2))) = 1; -uint8_t keyboard_led_stats = 0; +uint8_t keyboard_led_state = 0; volatile uint16_t keyboard_idle_count = 0; static virtual_timer_t keyboard_idle_timer; static void keyboard_idle_timer_cb(void *arg); @@ -386,10 +386,10 @@ static void set_led_transfer_cb(USBDriver *usbp) { if (usbp->setup[6] == 2) { /* LSB(wLength) */ uint8_t report_id = set_report_buf[0]; if ((report_id == REPORT_ID_KEYBOARD) || (report_id == REPORT_ID_NKRO)) { - keyboard_led_stats = set_report_buf[1]; + keyboard_led_state = set_report_buf[1]; } } else { - keyboard_led_stats = set_report_buf[0]; + keyboard_led_state = set_report_buf[0]; } } @@ -610,7 +610,7 @@ static void keyboard_idle_timer_cb(void *arg) { } /* LED status */ -uint8_t keyboard_leds(void) { return keyboard_led_stats; } +uint8_t keyboard_leds(void) { return keyboard_led_state; } /* prepare and start sending a report IN * not callable from ISR or locked state */ diff --git a/tmk_core/protocol/lufa/lufa.c b/tmk_core/protocol/lufa/lufa.c index 374add20f..19f417770 100644 --- a/tmk_core/protocol/lufa/lufa.c +++ b/tmk_core/protocol/lufa/lufa.c @@ -88,7 +88,7 @@ extern keymap_config_t keymap_config; uint8_t keyboard_idle = 0; /* 0: Boot Protocol, 1: Report Protocol(default) */ uint8_t keyboard_protocol = 1; -static uint8_t keyboard_led_stats = 0; +static uint8_t keyboard_led_state = 0; static report_keyboard_t keyboard_report_sent; @@ -103,30 +103,30 @@ host_driver_t lufa_driver = { }; #ifdef VIRTSER_ENABLE +// clang-format off + USB_ClassInfo_CDC_Device_t cdc_device = { - .Config = - { - .ControlInterfaceNumber = CCI_INTERFACE, - .DataINEndpoint = - { - .Address = CDC_IN_EPADDR, - .Size = CDC_EPSIZE, - .Banks = 1, - }, - .DataOUTEndpoint = - { - .Address = CDC_OUT_EPADDR, - .Size = CDC_EPSIZE, - .Banks = 1, - }, - .NotificationEndpoint = - { - .Address = CDC_NOTIFICATION_EPADDR, - .Size = CDC_NOTIFICATION_EPSIZE, - .Banks = 1, - }, + .Config = { + .ControlInterfaceNumber = CCI_INTERFACE, + .DataINEndpoint = { + .Address = (CDC_IN_EPNUM | ENDPOINT_DIR_IN), + .Size = CDC_EPSIZE, + .Banks = 1 + }, + .DataOUTEndpoint = { + .Address = (CDC_OUT_EPNUM | ENDPOINT_DIR_OUT), + .Size = CDC_EPSIZE, + .Banks = 1 }, + .NotificationEndpoint = { + .Address = (CDC_NOTIFICATION_EPNUM | ENDPOINT_DIR_IN), + .Size = CDC_NOTIFICATION_EPSIZE, + .Banks = 1 + } + } }; + +// clang-format on #endif #ifdef RAW_ENABLE @@ -254,7 +254,7 @@ static void Console_Task(void) { // fill empty bank while (Endpoint_IsReadWriteAllowed()) Endpoint_Write_8(0); - // flash senchar packet + // flush sendchar packet if (Endpoint_IsINReady()) { Endpoint_ClearIN(); } @@ -370,45 +370,46 @@ void EVENT_USB_Device_StartOfFrame(void) { void EVENT_USB_Device_ConfigurationChanged(void) { bool ConfigSuccess = true; - /* Setup Keyboard HID Report Endpoints */ #ifndef KEYBOARD_SHARED_EP - ConfigSuccess &= ENDPOINT_CONFIG(KEYBOARD_IN_EPNUM, EP_TYPE_INTERRUPT, ENDPOINT_DIR_IN, KEYBOARD_EPSIZE, ENDPOINT_BANK_SINGLE); + /* Setup keyboard report endpoint */ + ConfigSuccess &= Endpoint_ConfigureEndpoint((KEYBOARD_IN_EPNUM | ENDPOINT_DIR_IN), EP_TYPE_INTERRUPT, KEYBOARD_EPSIZE, 1); #endif #if defined(MOUSE_ENABLE) && !defined(MOUSE_SHARED_EP) - /* Setup Mouse HID Report Endpoint */ - ConfigSuccess &= ENDPOINT_CONFIG(MOUSE_IN_EPNUM, EP_TYPE_INTERRUPT, ENDPOINT_DIR_IN, MOUSE_EPSIZE, ENDPOINT_BANK_SINGLE); + /* Setup mouse report endpoint */ + ConfigSuccess &= Endpoint_ConfigureEndpoint((MOUSE_IN_EPNUM | ENDPOINT_DIR_IN), EP_TYPE_INTERRUPT, MOUSE_EPSIZE, 1); #endif #ifdef SHARED_EP_ENABLE - /* Setup Shared HID Report Endpoint */ - ConfigSuccess &= ENDPOINT_CONFIG(SHARED_IN_EPNUM, EP_TYPE_INTERRUPT, ENDPOINT_DIR_IN, SHARED_EPSIZE, ENDPOINT_BANK_SINGLE); + /* Setup shared report endpoint */ + ConfigSuccess &= Endpoint_ConfigureEndpoint((SHARED_IN_EPNUM | ENDPOINT_DIR_IN), EP_TYPE_INTERRUPT, SHARED_EPSIZE, 1); #endif #ifdef RAW_ENABLE - /* Setup Raw HID Report Endpoints */ - ConfigSuccess &= ENDPOINT_CONFIG(RAW_IN_EPNUM, EP_TYPE_INTERRUPT, ENDPOINT_DIR_IN, RAW_EPSIZE, ENDPOINT_BANK_SINGLE); - ConfigSuccess &= ENDPOINT_CONFIG(RAW_OUT_EPNUM, EP_TYPE_INTERRUPT, ENDPOINT_DIR_OUT, RAW_EPSIZE, ENDPOINT_BANK_SINGLE); + /* Setup raw HID endpoints */ + ConfigSuccess &= Endpoint_ConfigureEndpoint((RAW_IN_EPNUM | ENDPOINT_DIR_IN), EP_TYPE_INTERRUPT, RAW_EPSIZE, 1); + ConfigSuccess &= Endpoint_ConfigureEndpoint((RAW_OUT_EPNUM | ENDPOINT_DIR_OUT), EP_TYPE_INTERRUPT, RAW_EPSIZE, 1); #endif #ifdef CONSOLE_ENABLE - /* Setup Console HID Report Endpoints */ - ConfigSuccess &= ENDPOINT_CONFIG(CONSOLE_IN_EPNUM, EP_TYPE_INTERRUPT, ENDPOINT_DIR_IN, CONSOLE_EPSIZE, ENDPOINT_BANK_SINGLE); + /* Setup console endpoint */ + ConfigSuccess &= Endpoint_ConfigureEndpoint((CONSOLE_IN_EPNUM | ENDPOINT_DIR_IN), EP_TYPE_INTERRUPT, CONSOLE_EPSIZE, 1); # if 0 - ConfigSuccess &= ENDPOINT_CONFIG(CONSOLE_OUT_EPNUM, EP_TYPE_INTERRUPT, ENDPOINT_DIR_OUT, - CONSOLE_EPSIZE, ENDPOINT_BANK_SINGLE); + ConfigSuccess &= Endpoint_ConfigureEndpoint((CONSOLE_OUT_EPNUM | ENDPOINT_DIR_OUT), EP_TYPE_INTERRUPT, CONSOLE_EPSIZE, 1); # endif #endif #ifdef MIDI_ENABLE - ConfigSuccess &= Endpoint_ConfigureEndpoint(MIDI_STREAM_IN_EPADDR, EP_TYPE_BULK, MIDI_STREAM_EPSIZE, ENDPOINT_BANK_SINGLE); - ConfigSuccess &= Endpoint_ConfigureEndpoint(MIDI_STREAM_OUT_EPADDR, EP_TYPE_BULK, MIDI_STREAM_EPSIZE, ENDPOINT_BANK_SINGLE); + /* Setup MIDI stream endpoints */ + ConfigSuccess &= Endpoint_ConfigureEndpoint((MIDI_STREAM_IN_EPNUM | ENDPOINT_DIR_IN), EP_TYPE_BULK, MIDI_STREAM_EPSIZE, 1); + ConfigSuccess &= Endpoint_ConfigureEndpoint((MIDI_STREAM_OUT_EPNUM | ENDPOINT_DIR_IN), EP_TYPE_BULK, MIDI_STREAM_EPSIZE, 1); #endif #ifdef VIRTSER_ENABLE - ConfigSuccess &= Endpoint_ConfigureEndpoint(CDC_NOTIFICATION_EPADDR, EP_TYPE_INTERRUPT, CDC_NOTIFICATION_EPSIZE, ENDPOINT_BANK_SINGLE); - ConfigSuccess &= Endpoint_ConfigureEndpoint(CDC_OUT_EPADDR, EP_TYPE_BULK, CDC_EPSIZE, ENDPOINT_BANK_SINGLE); - ConfigSuccess &= Endpoint_ConfigureEndpoint(CDC_IN_EPADDR, EP_TYPE_BULK, CDC_EPSIZE, ENDPOINT_BANK_SINGLE); + /* Setup virtual serial endpoints */ + ConfigSuccess &= Endpoint_ConfigureEndpoint((CDC_NOTIFICATION_EPNUM | ENDPOINT_DIR_IN), EP_TYPE_INTERRUPT, CDC_NOTIFICATION_EPSIZE, 1); + ConfigSuccess &= Endpoint_ConfigureEndpoint((CDC_OUT_EPNUM | ENDPOINT_DIR_OUT), EP_TYPE_BULK, CDC_EPSIZE, 1); + ConfigSuccess &= Endpoint_ConfigureEndpoint((CDC_IN_EPNUM | ENDPOINT_DIR_IN), EP_TYPE_BULK, CDC_EPSIZE, 1); #endif } @@ -472,10 +473,10 @@ void EVENT_USB_Device_ControlRequest(void) { uint8_t report_id = Endpoint_Read_8(); if (report_id == REPORT_ID_KEYBOARD || report_id == REPORT_ID_NKRO) { - keyboard_led_stats = Endpoint_Read_8(); + keyboard_led_state = Endpoint_Read_8(); } } else { - keyboard_led_stats = Endpoint_Read_8(); + keyboard_led_state = Endpoint_Read_8(); } Endpoint_ClearOUT(); @@ -545,7 +546,7 @@ void EVENT_USB_Device_ControlRequest(void) { * * FIXME: Needs doc */ -static uint8_t keyboard_leds(void) { return keyboard_led_stats; } +static uint8_t keyboard_leds(void) { return keyboard_led_state; } /** \brief Send Keyboard * @@ -808,25 +809,26 @@ ERROR_EXIT: ******************************************************************************/ #ifdef MIDI_ENABLE +// clang-format off + USB_ClassInfo_MIDI_Device_t USB_MIDI_Interface = { - .Config = - { - .StreamingInterfaceNumber = AS_INTERFACE, - .DataINEndpoint = - { - .Address = MIDI_STREAM_IN_EPADDR, - .Size = MIDI_STREAM_EPSIZE, - .Banks = 1, - }, - .DataOUTEndpoint = - { - .Address = MIDI_STREAM_OUT_EPADDR, - .Size = MIDI_STREAM_EPSIZE, - .Banks = 1, - }, + .Config = { + .StreamingInterfaceNumber = AS_INTERFACE, + .DataINEndpoint = { + .Address = (MIDI_STREAM_IN_EPNUM | ENDPOINT_DIR_IN), + .Size = MIDI_STREAM_EPSIZE, + .Banks = 1 }, + .DataOUTEndpoint = { + .Address = (MIDI_STREAM_OUT_EPNUM | ENDPOINT_DIR_OUT), + .Size = MIDI_STREAM_EPSIZE, + .Banks = 1 + } + } }; +// clang-format on + void send_midi_packet(MIDI_EventPacket_t *event) { MIDI_Device_SendEventPacket(&USB_MIDI_Interface, event); } bool recv_midi_packet(MIDI_EventPacket_t *const event) { return MIDI_Device_ReceiveEventPacket(&USB_MIDI_Interface, event); } diff --git a/tmk_core/protocol/lufa/lufa.h b/tmk_core/protocol/lufa/lufa.h index 82a5f8e05..71fd7aad8 100644 --- a/tmk_core/protocol/lufa/lufa.h +++ b/tmk_core/protocol/lufa/lufa.h @@ -69,8 +69,4 @@ extern host_driver_t lufa_driver; # define MIDI_SYSEX_BUFFER (API_SYSEX_MAX_SIZE + API_SYSEX_MAX_SIZE / 7 + (API_SYSEX_MAX_SIZE % 7 ? 1 : 0)) #endif -#define ENDPOINT_BANK_SINGLE 1 -#define ENDPOINT_BANK_DOUBLE 2 -#define ENDPOINT_CONFIG(epnum, eptype, epdir, epsize, epbank) Endpoint_ConfigureEndpoint((epdir) | (epnum), eptype, epsize, epbank) - #endif diff --git a/tmk_core/protocol/usb_descriptor.c b/tmk_core/protocol/usb_descriptor.c index 8c71dd1dd..bcca24586 100644 --- a/tmk_core/protocol/usb_descriptor.c +++ b/tmk_core/protocol/usb_descriptor.c @@ -673,7 +673,7 @@ const USB_Descriptor_Configuration_t PROGMEM ConfigurationDescriptor = { .Size = sizeof(USB_Audio_Descriptor_StreamEndpoint_Std_t), .Type = DTYPE_Endpoint }, - .EndpointAddress = MIDI_STREAM_OUT_EPADDR, + .EndpointAddress = (ENDPOINT_DIR_OUT | MIDI_STREAM_OUT_EPNUM), .Attributes = (EP_TYPE_BULK | ENDPOINT_ATTR_NO_SYNC | ENDPOINT_USAGE_DATA), .EndpointSize = MIDI_STREAM_EPSIZE, .PollingIntervalMS = 0x05 @@ -696,7 +696,7 @@ const USB_Descriptor_Configuration_t PROGMEM ConfigurationDescriptor = { .Size = sizeof(USB_Audio_Descriptor_StreamEndpoint_Std_t), .Type = DTYPE_Endpoint }, - .EndpointAddress = MIDI_STREAM_IN_EPADDR, + .EndpointAddress = (ENDPOINT_DIR_IN | MIDI_STREAM_IN_EPNUM), .Attributes = (EP_TYPE_BULK | ENDPOINT_ATTR_NO_SYNC | ENDPOINT_USAGE_DATA), .EndpointSize = MIDI_STREAM_EPSIZE, .PollingIntervalMS = 0x05 @@ -774,7 +774,7 @@ const USB_Descriptor_Configuration_t PROGMEM ConfigurationDescriptor = { .Size = sizeof(USB_Descriptor_Endpoint_t), .Type = DTYPE_Endpoint }, - .EndpointAddress = CDC_NOTIFICATION_EPADDR, + .EndpointAddress = (ENDPOINT_DIR_IN | CDC_NOTIFICATION_EPNUM), .Attributes = (EP_TYPE_INTERRUPT | ENDPOINT_ATTR_NO_SYNC | ENDPOINT_USAGE_DATA), .EndpointSize = CDC_NOTIFICATION_EPSIZE, .PollingIntervalMS = 0xFF @@ -797,7 +797,7 @@ const USB_Descriptor_Configuration_t PROGMEM ConfigurationDescriptor = { .Size = sizeof(USB_Descriptor_Endpoint_t), .Type = DTYPE_Endpoint }, - .EndpointAddress = CDC_OUT_EPADDR, + .EndpointAddress = (ENDPOINT_DIR_OUT | CDC_OUT_EPNUM), .Attributes = (EP_TYPE_BULK | ENDPOINT_ATTR_NO_SYNC | ENDPOINT_USAGE_DATA), .EndpointSize = CDC_EPSIZE, .PollingIntervalMS = 0x05 @@ -807,7 +807,7 @@ const USB_Descriptor_Configuration_t PROGMEM ConfigurationDescriptor = { .Size = sizeof(USB_Descriptor_Endpoint_t), .Type = DTYPE_Endpoint }, - .EndpointAddress = CDC_IN_EPADDR, + .EndpointAddress = (ENDPOINT_DIR_IN | CDC_IN_EPNUM), .Attributes = (EP_TYPE_BULK | ENDPOINT_ATTR_NO_SYNC | ENDPOINT_USAGE_DATA), .EndpointSize = CDC_EPSIZE, .PollingIntervalMS = 0x05 diff --git a/tmk_core/protocol/usb_descriptor.h b/tmk_core/protocol/usb_descriptor.h index b2423fa7e..34a85978a 100644 --- a/tmk_core/protocol/usb_descriptor.h +++ b/tmk_core/protocol/usb_descriptor.h @@ -212,17 +212,12 @@ enum usb_endpoints { #ifdef MIDI_ENABLE MIDI_STREAM_IN_EPNUM = NEXT_EPNUM, MIDI_STREAM_OUT_EPNUM = NEXT_EPNUM, -# define MIDI_STREAM_IN_EPADDR (ENDPOINT_DIR_IN | MIDI_STREAM_IN_EPNUM) -# define MIDI_STREAM_OUT_EPADDR (ENDPOINT_DIR_OUT | MIDI_STREAM_OUT_EPNUM) #endif #ifdef VIRTSER_ENABLE CDC_NOTIFICATION_EPNUM = NEXT_EPNUM, CDC_IN_EPNUM = NEXT_EPNUM, CDC_OUT_EPNUM = NEXT_EPNUM, -# define CDC_NOTIFICATION_EPADDR (ENDPOINT_DIR_IN | CDC_NOTIFICATION_EPNUM) -# define CDC_IN_EPADDR (ENDPOINT_DIR_IN | CDC_IN_EPNUM) -# define CDC_OUT_EPADDR (ENDPOINT_DIR_OUT | CDC_OUT_EPNUM) #endif }; diff --git a/tmk_core/protocol/vusb/vusb.c b/tmk_core/protocol/vusb/vusb.c index 5feff889a..f4727a0c3 100644 --- a/tmk_core/protocol/vusb/vusb.c +++ b/tmk_core/protocol/vusb/vusb.c @@ -65,7 +65,7 @@ enum usb_interfaces { # error There are not enough available interfaces to support all functions. Please disable one or more of the following: Mouse Keys, Extra Keys, Raw HID, Console #endif -static uint8_t vusb_keyboard_leds = 0; +static uint8_t keyboard_led_state = 0; static uint8_t vusb_idle_rate = 0; /* Keyboard report send buffer */ @@ -74,13 +74,7 @@ static report_keyboard_t kbuf[KBUF_SIZE]; static uint8_t kbuf_head = 0; static uint8_t kbuf_tail = 0; -typedef struct { - uint8_t modifier; - uint8_t reserved; - uint8_t keycode[6]; -} keyboard_report_t; - -static keyboard_report_t keyboard_report; // sent to PC +static report_keyboard_t keyboard_report_sent; #define VUSB_TRANSFER_KEYBOARD_MAX_TRIES 10 @@ -218,7 +212,7 @@ static host_driver_t driver = {keyboard_leds, send_keyboard, send_mouse, send_sy host_driver_t *vusb_driver(void) { return &driver; } -static uint8_t keyboard_leds(void) { return vusb_keyboard_leds; } +static uint8_t keyboard_leds(void) { return keyboard_led_state; } static void send_keyboard(report_keyboard_t *report) { uint8_t next = (kbuf_head + 1) % KBUF_SIZE; @@ -232,6 +226,7 @@ static void send_keyboard(report_keyboard_t *report) { // NOTE: send key strokes of Macro usbPoll(); vusb_transfer_keyboard(); + keyboard_report_sent = *report; } typedef struct { @@ -289,9 +284,10 @@ usbMsgLen_t usbFunctionSetup(uchar data[8]) { if ((rq->bmRequestType & USBRQ_TYPE_MASK) == USBRQ_TYPE_CLASS) { /* class request type */ if (rq->bRequest == USBRQ_HID_GET_REPORT) { debug("GET_REPORT:"); - /* we only have one report type, so don't look at wValue */ - usbMsgPtr = (usbMsgPtr_t)&keyboard_report; - return sizeof(keyboard_report); + if (rq->wIndex.word == KEYBOARD_INTERFACE) { + usbMsgPtr = (usbMsgPtr_t)&keyboard_report_sent; + return sizeof(keyboard_report_sent); + } } else if (rq->bRequest == USBRQ_HID_GET_IDLE) { debug("GET_IDLE: "); // debug_hex(vusb_idle_rate); @@ -304,7 +300,7 @@ usbMsgLen_t usbFunctionSetup(uchar data[8]) { } else if (rq->bRequest == USBRQ_HID_SET_REPORT) { debug("SET_REPORT: "); // Report Type: 0x02(Out)/ReportID: 0x00(none) && Interface: 0(keyboard) - if (rq->wValue.word == 0x0200 && rq->wIndex.word == 0) { + if (rq->wValue.word == 0x0200 && rq->wIndex.word == KEYBOARD_INTERFACE) { debug("SET_LED: "); last_req.kind = SET_LED; last_req.len = rq->wLength.word; @@ -330,7 +326,7 @@ uchar usbFunctionWrite(uchar *data, uchar len) { debug("SET_LED: "); debug_hex(data[0]); debug("\n"); - vusb_keyboard_leds = data[0]; + keyboard_led_state = data[0]; last_req.len = 0; return 1; break; -- cgit v1.3.1 From 1193e45bf4c8c69e33c054c6eb3d545d5d52fcb5 Mon Sep 17 00:00:00 2001 From: Ryan Date: Sun, 7 Jun 2020 15:00:59 +1000 Subject: Convert `CONSUMER2BLUEFRUIT()` and `CONSUMER2RN42()` macros to static inline functions (#9055) --- tmk_core/common/report.h | 7 ++- tmk_core/protocol/lufa/bluetooth.h | 98 ++++++++++++++++++++++++++++---------- tmk_core/protocol/lufa/lufa.c | 2 +- 3 files changed, 79 insertions(+), 28 deletions(-) (limited to 'tmk_core') diff --git a/tmk_core/common/report.h b/tmk_core/common/report.h index c2b1b7c71..1b2f13bdd 100644 --- a/tmk_core/common/report.h +++ b/tmk_core/common/report.h @@ -46,8 +46,9 @@ enum mouse_buttons { * See https://www.usb.org/sites/default/files/documents/hut1_12v2.pdf#page=75 */ enum consumer_usages { - // 15.5 Display Controls (https://www.usb.org/sites/default/files/hutrr41_0.pdf) - BRIGHTNESS_UP = 0x06F, + // 15.5 Display Controls + SNAPSHOT = 0x065, + BRIGHTNESS_UP = 0x06F, // https://www.usb.org/sites/default/files/hutrr41_0.pdf BRIGHTNESS_DOWN = 0x070, // 15.7 Transport Controls TRANSPORT_RECORD = 0x0B2, @@ -57,6 +58,7 @@ enum consumer_usages { TRANSPORT_PREV_TRACK = 0x0B6, TRANSPORT_STOP = 0x0B7, TRANSPORT_EJECT = 0x0B8, + TRANSPORT_RANDOM_PLAY = 0x0B9, TRANSPORT_STOP_EJECT = 0x0CC, TRANSPORT_PLAY_PAUSE = 0x0CD, // 15.9.1 Audio Controls - Volume @@ -71,6 +73,7 @@ enum consumer_usages { AL_LOCK = 0x19E, AL_CONTROL_PANEL = 0x19F, AL_ASSISTANT = 0x1CB, + AL_KEYBOARD_LAYOUT = 0x1AE, // 15.16 Generic GUI Application Controls AC_MINIMIZE = 0x206, AC_SEARCH = 0x221, diff --git a/tmk_core/protocol/lufa/bluetooth.h b/tmk_core/protocol/lufa/bluetooth.h index 081271a4e..67f031439 100644 --- a/tmk_core/protocol/lufa/bluetooth.h +++ b/tmk_core/protocol/lufa/bluetooth.h @@ -15,34 +15,82 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ -#ifndef BLUETOOTH_H -#define BLUETOOTH_H +#pragma once #include "../serial.h" void bluefruit_serial_send(uint8_t data); -/* -+-----------------+-------------------+-------+ -| Consumer Key | Bit Map | Hex | -+-----------------+-------------------+-------+ -| Home | 00000001 00000000 | 01 00 | -| KeyboardLayout | 00000010 00000000 | 02 00 | -| Search | 00000100 00000000 | 04 00 | -| Snapshot | 00001000 00000000 | 08 00 | -| VolumeUp | 00010000 00000000 | 10 00 | -| VolumeDown | 00100000 00000000 | 20 00 | -| Play/Pause | 01000000 00000000 | 40 00 | -| Fast Forward | 10000000 00000000 | 80 00 | -| Rewind | 00000000 00000001 | 00 01 | -| Scan Next Track | 00000000 00000010 | 00 02 | -| Scan Prev Track | 00000000 00000100 | 00 04 | -| Random Play | 00000000 00001000 | 00 08 | -| Stop | 00000000 00010000 | 00 10 | -+-------------------------------------+-------+ -*/ -#define CONSUMER2BLUEFRUIT(usage) (usage == AUDIO_MUTE ? 0x0000 : (usage == AUDIO_VOL_UP ? 0x1000 : (usage == AUDIO_VOL_DOWN ? 0x2000 : (usage == TRANSPORT_NEXT_TRACK ? 0x0002 : (usage == TRANSPORT_PREV_TRACK ? 0x0004 : (usage == TRANSPORT_STOP ? 0x0010 : (usage == TRANSPORT_STOP_EJECT ? 0x0000 : (usage == TRANSPORT_PLAY_PAUSE ? 0x4000 : (usage == AL_CC_CONFIG ? 0x0000 : (usage == AL_EMAIL ? 0x0000 : (usage == AL_CALCULATOR ? 0x0000 : (usage == AL_LOCAL_BROWSER ? 0x0000 : (usage == AC_SEARCH ? 0x0400 : (usage == AC_HOME ? 0x0100 : (usage == AC_BACK ? 0x0000 : (usage == AC_FORWARD ? 0x0000 : (usage == AC_STOP ? 0x0000 : (usage == AC_REFRESH ? 0x0000 : (usage == AC_BOOKMARKS ? 0x0000 : 0))))))))))))))))))) - -#define CONSUMER2RN42(usage) (usage == AUDIO_MUTE ? 0x0040 : (usage == AUDIO_VOL_UP ? 0x0010 : (usage == AUDIO_VOL_DOWN ? 0x0020 : (usage == TRANSPORT_NEXT_TRACK ? 0x0100 : (usage == TRANSPORT_PREV_TRACK ? 0x0200 : (usage == TRANSPORT_STOP ? 0x0400 : (usage == TRANSPORT_STOP_EJECT ? 0x0800 : (usage == TRANSPORT_PLAY_PAUSE ? 0x0080 : (usage == AL_EMAIL ? 0x0200 : (usage == AL_LOCAL_BROWSER ? 0x8000 : (usage == AC_SEARCH ? 0x0400 : (usage == AC_HOME ? 0x0100 : 0)))))))))))) +// https://learn.adafruit.com/introducing-bluefruit-ez-key-diy-bluetooth-hid-keyboard/sending-keys-via-serial#raw-hid-consumer-reports-8-14 +static inline uint16_t CONSUMER2BLUEFRUIT(uint16_t usage) { + switch (usage) { + case AC_HOME: + return 0x0001; + case AL_KEYBOARD_LAYOUT: + return 0x0002; + case AC_SEARCH: + return 0x0004; + case SNAPSHOT: + return 0x0008; + case AUDIO_VOL_UP: + return 0x0010; + case AUDIO_VOL_DOWN: + return 0x0020; + case TRANSPORT_PLAY_PAUSE: + return 0x0040; + case TRANSPORT_FAST_FORWARD: + return 0x0080; + case TRANSPORT_REWIND: + return 0x0100; + case TRANSPORT_NEXT_TRACK: + return 0x0200; + case TRANSPORT_PREV_TRACK: + return 0x0400; + case TRANSPORT_RANDOM_PLAY: + return 0x0800; + case TRANSPORT_STOP: + return 0x1000; + default: + return 0; + } +} -#endif +// https://cdn.sparkfun.com/datasheets/Wireless/Bluetooth/bluetooth_cr_UG-v1.0r.pdf#G7.663734 +static inline uint16_t CONSUMER2RN42(uint16_t usage) { + switch (usage) { + case AC_HOME: + return 0x0001; + case AL_EMAIL: + return 0x0002; + case AC_SEARCH: + return 0x0004; + case AL_KEYBOARD_LAYOUT: + return 0x0008; + case AUDIO_VOL_UP: + return 0x0010; + case AUDIO_VOL_DOWN: + return 0x0020; + case AUDIO_MUTE: + return 0x0040; + case TRANSPORT_PLAY_PAUSE: + return 0x0080; + case TRANSPORT_NEXT_TRACK: + return 0x0100; + case TRANSPORT_PREV_TRACK: + return 0x0200; + case TRANSPORT_STOP: + return 0x0400; + case TRANSPORT_EJECT: + return 0x0800; + case TRANSPORT_FAST_FORWARD: + return 0x1000; + case TRANSPORT_REWIND: + return 0x2000; + case TRANSPORT_STOP_EJECT: + return 0x4000; + case AL_LOCAL_BROWSER: + return 0x8000; + default: + return 0; + } +} diff --git a/tmk_core/protocol/lufa/lufa.c b/tmk_core/protocol/lufa/lufa.c index 19f417770..3ca1a809d 100644 --- a/tmk_core/protocol/lufa/lufa.c +++ b/tmk_core/protocol/lufa/lufa.c @@ -720,8 +720,8 @@ static void send_consumer(uint16_t data) { bluefruit_serial_send(0xFD); bluefruit_serial_send(0x00); bluefruit_serial_send(0x02); - bluefruit_serial_send((bitmap >> 8) & 0xFF); bluefruit_serial_send(bitmap & 0xFF); + bluefruit_serial_send((bitmap >> 8) & 0xFF); bluefruit_serial_send(0x00); bluefruit_serial_send(0x00); bluefruit_serial_send(0x00); -- cgit v1.3.1 From 69e0ad1b2ce43fbf1daa85d22007570430ddf0c7 Mon Sep 17 00:00:00 2001 From: Ryan Date: Wed, 10 Jun 2020 06:30:37 +1000 Subject: Additional cleanups for V-USB code (#9310) --- quantum/mcu_selection.mk | 3 - tmk_core/common.mk | 4 -- tmk_core/protocol/vusb.mk | 7 --- tmk_core/protocol/vusb/main.c | 37 ++++-------- tmk_core/protocol/vusb/sendchar_usart.c | 19 ------ tmk_core/protocol/vusb/vusb.c | 102 ++++++++++++++------------------ 6 files changed, 53 insertions(+), 119 deletions(-) delete mode 100644 tmk_core/protocol/vusb/sendchar_usart.c (limited to 'tmk_core') diff --git a/quantum/mcu_selection.mk b/quantum/mcu_selection.mk index a1d2c5fbf..61fd7b6e4 100644 --- a/quantum/mcu_selection.mk +++ b/quantum/mcu_selection.mk @@ -266,7 +266,6 @@ ifneq (,$(filter $(MCU),atmega32a)) F_CPU ?= 12000000 # unsupported features for now - NO_UART ?= yes NO_SUSPEND_POWER_DOWN ?= yes endif @@ -284,7 +283,6 @@ ifneq (,$(filter $(MCU),atmega328p)) F_CPU ?= 16000000 # unsupported features for now - NO_UART ?= yes NO_SUSPEND_POWER_DOWN ?= yes endif @@ -317,6 +315,5 @@ ifneq (,$(filter $(MCU),attiny85)) F_CPU ?= 16500000 # unsupported features for now - NO_UART ?= yes NO_SUSPEND_POWER_DOWN ?= yes endif diff --git a/tmk_core/common.mk b/tmk_core/common.mk index 63de7c7ed..b7fe45afd 100644 --- a/tmk_core/common.mk +++ b/tmk_core/common.mk @@ -113,10 +113,6 @@ ifeq ($(strip $(SLEEP_LED_ENABLE)), yes) TMK_COMMON_DEFS += -DNO_SUSPEND_POWER_DOWN endif -ifeq ($(strip $(NO_UART)), yes) - TMK_COMMON_DEFS += -DNO_UART -endif - ifeq ($(strip $(NO_SUSPEND_POWER_DOWN)), yes) TMK_COMMON_DEFS += -DNO_SUSPEND_POWER_DOWN endif diff --git a/tmk_core/protocol/vusb.mk b/tmk_core/protocol/vusb.mk index 5e564f748..1de600308 100644 --- a/tmk_core/protocol/vusb.mk +++ b/tmk_core/protocol/vusb.mk @@ -9,13 +9,6 @@ SRC += $(VUSB_DIR)/main.c \ $(VUSB_PATH)/usbdrv/usbdrvasm.S \ $(VUSB_PATH)/usbdrv/oddebug.c -ifneq ($(strip $(CONSOLE_ENABLE)), yes) -ifndef NO_UART -SRC += $(COMMON_DIR)/sendchar_uart.c \ - $(COMMON_DIR)/uart.c -endif -endif - # Search Path VPATH += $(TMK_PATH)/$(VUSB_DIR) VPATH += $(VUSB_PATH) diff --git a/tmk_core/protocol/vusb/main.c b/tmk_core/protocol/vusb/main.c index b4063273d..a57df5ce0 100644 --- a/tmk_core/protocol/vusb/main.c +++ b/tmk_core/protocol/vusb/main.c @@ -7,19 +7,22 @@ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) * This Revision: $Id: main.c 790 2010-05-30 21:00:26Z cs $ */ + #include + #include +#include #include #include -#include + #include -#include + #include "vusb.h" + #include "keyboard.h" #include "host.h" #include "timer.h" -#include "uart.h" -#include "debug.h" +#include "print.h" #include "suspend.h" #include "wait.h" #include "sendchar.h" @@ -28,8 +31,6 @@ # include "sleep_led.h" #endif -#define UART_BAUD_RATE 115200 - #ifdef CONSOLE_ENABLE void console_task(void); #endif @@ -47,7 +48,7 @@ static void initForUsbConnectivity(void) { usbDeviceDisconnect(); /* do this while interrupts are disabled */ while (--i) { /* fake USB disconnect for > 250 ms */ wdt_reset(); - _delay_ms(1); + wait_ms(1); } usbDeviceConnect(); } @@ -60,7 +61,7 @@ static void usb_remote_wakeup(void) { USBDDR = ddr_orig | USBMASK; USBOUT ^= USBMASK; - _delay_ms(25); + wait_ms(25); USBOUT ^= USBMASK; USBDDR = ddr_orig; @@ -74,7 +75,6 @@ static void usb_remote_wakeup(void) { * FIXME: Needs doc */ static void setup_usb(void) { - // debug("initForUsbConnectivity()\n"); initForUsbConnectivity(); // for Console_Task @@ -95,10 +95,7 @@ int main(void) { #ifdef CLKPR // avoid unintentional changes of clock frequency in devices that have a // clock prescaler - CLKPR = 0x80, CLKPR = 0; -#endif -#ifndef NO_UART - uart_init(UART_BAUD_RATE); + clock_prescale_set(clock_div_1); #endif keyboard_setup(); @@ -113,7 +110,6 @@ int main(void) { sleep_led_init(); #endif - debug("main loop\n"); while (1) { #if USB_COUNT_SOF if (usbSofCount != 0) { @@ -130,19 +126,6 @@ int main(void) { # ifdef SLEEP_LED_ENABLE sleep_led_enable(); # endif - /* - uart_putchar('S'); - _delay_ms(1); - cli(); - set_sleep_mode(SLEEP_MODE_PWR_DOWN); - sleep_enable(); - sleep_bod_disable(); - sei(); - sleep_cpu(); - sleep_disable(); - _delay_ms(10); - uart_putchar('W'); - */ } } #endif diff --git a/tmk_core/protocol/vusb/sendchar_usart.c b/tmk_core/protocol/vusb/sendchar_usart.c deleted file mode 100644 index a920a9a53..000000000 --- a/tmk_core/protocol/vusb/sendchar_usart.c +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH - * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) - */ -#include -#include -#include "sendchar.h" - -#if DEBUG_LEVEL > 0 -/* from oddebug.c */ -int8_t sendchar(uint8_t c) { - while (!(ODDBG_USR & (1 << ODDBG_UDRE))) - ; /* wait for data register empty */ - ODDBG_UDR = c; - return 1; -} -#else -int8_t sendchar(uint8_t c) { return 1; } -#endif diff --git a/tmk_core/protocol/vusb/vusb.c b/tmk_core/protocol/vusb/vusb.c index f4727a0c3..735a1c1d3 100644 --- a/tmk_core/protocol/vusb/vusb.c +++ b/tmk_core/protocol/vusb/vusb.c @@ -15,10 +15,12 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ -#include -#include #include + +#include + #include + #include "usbconfig.h" #include "host.h" #include "report.h" @@ -26,6 +28,7 @@ along with this program. If not, see . #include "vusb.h" #include "print.h" #include "debug.h" +#include "wait.h" #include "usb_descriptor_common.h" #ifdef RAW_ENABLE @@ -56,7 +59,7 @@ enum usb_interfaces { #ifdef CONSOLE_ENABLE CONSOLE_INTERFACE = NEXT_INTERFACE, #endif - TOTAL_INTERFACES = NEXT_INTERFACE, + TOTAL_INTERFACES = NEXT_INTERFACE }; #define MAX_INTERFACES 2 @@ -86,19 +89,13 @@ void vusb_transfer_keyboard(void) { usbSetInterrupt((void *)&kbuf[kbuf_tail], sizeof(report_keyboard_t)); kbuf_tail = (kbuf_tail + 1) % KBUF_SIZE; if (debug_keyboard) { - print("V-USB: kbuf["); - pdec(kbuf_tail); - print("->"); - pdec(kbuf_head); - print("]("); - phex((kbuf_head < kbuf_tail) ? (KBUF_SIZE - kbuf_tail + kbuf_head) : (kbuf_head - kbuf_tail)); - print(")\n"); + dprintf("V-USB: kbuf[%d->%d](%02X)\n", kbuf_tail, kbuf_head, (kbuf_head < kbuf_tail) ? (KBUF_SIZE - kbuf_tail + kbuf_head) : (kbuf_head - kbuf_tail)); } } break; } usbPoll(); - _delay_ms(1); + wait_ms(1); } } @@ -220,7 +217,7 @@ static void send_keyboard(report_keyboard_t *report) { kbuf[kbuf_head] = *report; kbuf_head = next; } else { - debug("kbuf: full\n"); + dprint("kbuf: full\n"); } // NOTE: send key strokes of Macro @@ -283,37 +280,35 @@ usbMsgLen_t usbFunctionSetup(uchar data[8]) { if ((rq->bmRequestType & USBRQ_TYPE_MASK) == USBRQ_TYPE_CLASS) { /* class request type */ if (rq->bRequest == USBRQ_HID_GET_REPORT) { - debug("GET_REPORT:"); + dprint("GET_REPORT:"); if (rq->wIndex.word == KEYBOARD_INTERFACE) { usbMsgPtr = (usbMsgPtr_t)&keyboard_report_sent; return sizeof(keyboard_report_sent); } } else if (rq->bRequest == USBRQ_HID_GET_IDLE) { - debug("GET_IDLE: "); - // debug_hex(vusb_idle_rate); + dprint("GET_IDLE:"); usbMsgPtr = (usbMsgPtr_t)&vusb_idle_rate; return 1; } else if (rq->bRequest == USBRQ_HID_SET_IDLE) { vusb_idle_rate = rq->wValue.bytes[1]; - debug("SET_IDLE: "); - debug_hex(vusb_idle_rate); + dprintf("SET_IDLE: %02X", vusb_idle_rate); } else if (rq->bRequest == USBRQ_HID_SET_REPORT) { - debug("SET_REPORT: "); + dprint("SET_REPORT:"); // Report Type: 0x02(Out)/ReportID: 0x00(none) && Interface: 0(keyboard) if (rq->wValue.word == 0x0200 && rq->wIndex.word == KEYBOARD_INTERFACE) { - debug("SET_LED: "); + dprint("SET_LED:"); last_req.kind = SET_LED; last_req.len = rq->wLength.word; } return USB_NO_MSG; // to get data in usbFunctionWrite } else { - debug("UNKNOWN:"); + dprint("UNKNOWN:"); } } else { - debug("VENDOR:"); + dprint("VENDOR:"); /* no vendor specific requests implemented */ } - debug("\n"); + dprint("\n"); return 0; /* default for not implemented requests: return no data back to host */ } @@ -323,9 +318,7 @@ uchar usbFunctionWrite(uchar *data, uchar len) { } switch (last_req.kind) { case SET_LED: - debug("SET_LED: "); - debug_hex(data[0]); - debug("\n"); + dprintf("SET_LED: %02X\n", data[0]); keyboard_led_state = data[0]; last_req.len = 0; return 1; @@ -342,13 +335,13 @@ void usbFunctionWriteOut(uchar *data, uchar len) { #ifdef RAW_ENABLE // Data from host must be divided every 8bytes if (len != 8) { - debug("RAW: invalid length"); + dprint("RAW: invalid length\n"); raw_output_received_bytes = 0; return; } if (raw_output_received_bytes + len > RAW_BUFFER_SIZE) { - debug("RAW: buffer full"); + dprint("RAW: buffer full\n"); raw_output_received_bytes = 0; } else { for (uint8_t i = 0; i < 8; i++) { @@ -404,29 +397,6 @@ const PROGMEM uchar keyboard_hid_report[] = { 0xC0 // End Collection }; -#ifdef RAW_ENABLE -const PROGMEM uchar raw_hid_report[] = { - 0x06, RAW_USAGE_PAGE_LO, RAW_USAGE_PAGE_HI, // Usage Page (Vendor Defined) - 0x09, RAW_USAGE_ID, // Usage (Vendor Defined) - 0xA1, 0x01, // Collection (Application) - // Data to host - 0x09, 0x62, // Usage (Vendor Defined) - 0x15, 0x00, // Logical Minimum (0) - 0x26, 0xFF, 0x00, // Logical Maximum (255) - 0x95, RAW_BUFFER_SIZE, // Report Count - 0x75, 0x08, // Report Size (8) - 0x81, 0x02, // Input (Data, Variable, Absolute) - // Data from host - 0x09, 0x63, // Usage (Vendor Defined) - 0x15, 0x00, // Logical Minimum (0) - 0x26, 0xFF, 0x00, // Logical Maximum (255) - 0x95, RAW_BUFFER_SIZE, // Report Count - 0x75, 0x08, // Report Size (8) - 0x91, 0x02, // Output (Data, Variable, Absolute) - 0xC0 // End Collection -}; -#endif - #if defined(MOUSE_ENABLE) || defined(EXTRAKEY_ENABLE) const PROGMEM uchar mouse_extra_hid_report[] = { # ifdef MOUSE_ENABLE @@ -511,6 +481,29 @@ const PROGMEM uchar mouse_extra_hid_report[] = { }; #endif +#ifdef RAW_ENABLE +const PROGMEM uchar raw_hid_report[] = { + 0x06, RAW_USAGE_PAGE_LO, RAW_USAGE_PAGE_HI, // Usage Page (Vendor Defined) + 0x09, RAW_USAGE_ID, // Usage (Vendor Defined) + 0xA1, 0x01, // Collection (Application) + // Data to host + 0x09, 0x62, // Usage (Vendor Defined) + 0x15, 0x00, // Logical Minimum (0) + 0x26, 0xFF, 0x00, // Logical Maximum (255) + 0x95, RAW_BUFFER_SIZE, // Report Count + 0x75, 0x08, // Report Size (8) + 0x81, 0x02, // Input (Data, Variable, Absolute) + // Data from host + 0x09, 0x63, // Usage (Vendor Defined) + 0x15, 0x00, // Logical Minimum (0) + 0x26, 0xFF, 0x00, // Logical Maximum (255) + 0x95, RAW_BUFFER_SIZE, // Report Count + 0x75, 0x08, // Report Size (8) + 0x91, 0x02, // Output (Data, Variable, Absolute) + 0xC0 // End Collection +}; +#endif + #if defined(CONSOLE_ENABLE) const PROGMEM uchar console_hid_report[] = { 0x06, 0x31, 0xFF, // Usage Page (Vendor Defined - PJRC Teensy compatible) @@ -801,14 +794,6 @@ const PROGMEM usbConfigurationDescriptor_t usbConfigurationDescriptor = { USB_PUBLIC usbMsgLen_t usbFunctionDescriptor(struct usbRequest *rq) { usbMsgLen_t len = 0; - /* - debug("usbFunctionDescriptor: "); - debug_hex(rq->bmRequestType); debug(" "); - debug_hex(rq->bRequest); debug(" "); - debug_hex16(rq->wValue.word); debug(" "); - debug_hex16(rq->wIndex.word); debug(" "); - debug_hex16(rq->wLength.word); debug("\n"); - */ switch (rq->wValue.bytes[1]) { case USBDESCR_DEVICE: usbMsgPtr = (usbMsgPtr_t)&usbDeviceDescriptor; @@ -892,6 +877,5 @@ USB_PUBLIC usbMsgLen_t usbFunctionDescriptor(struct usbRequest *rq) { } break; } - // debug("desc len: "); debug_hex(len); debug("\n"); return len; } -- cgit v1.3.1 From 3b34858b772cda36fa9988e4d45039ff7ff9146a Mon Sep 17 00:00:00 2001 From: Ryan Date: Wed, 17 Jun 2020 21:43:20 +1000 Subject: Don't compile outputselect.c if Bluetooth is disabled (#9356) --- quantum/quantum.c | 4 ++-- tmk_core/protocol/lufa.mk | 21 ++++++++++++--------- tmk_core/protocol/lufa/lufa.c | 16 +++++++++------- 3 files changed, 23 insertions(+), 18 deletions(-) (limited to 'tmk_core') diff --git a/quantum/quantum.c b/quantum/quantum.c index 044a15612..9d63f4de2 100644 --- a/quantum/quantum.c +++ b/quantum/quantum.c @@ -17,7 +17,7 @@ #include #include "quantum.h" -#ifdef PROTOCOL_LUFA +#ifdef BLUETOOTH_ENABLE # include "outputselect.h" #endif @@ -618,7 +618,7 @@ void matrix_init_quantum() { #ifdef HAPTIC_ENABLE haptic_init(); #endif -#ifdef OUTPUT_AUTO_ENABLE +#if defined(BLUETOOTH_ENABLE) && defined(OUTPUT_AUTO_ENABLE) set_output(OUTPUT_AUTO); #endif diff --git a/tmk_core/protocol/lufa.mk b/tmk_core/protocol/lufa.mk index d87802992..9bc972c26 100644 --- a/tmk_core/protocol/lufa.mk +++ b/tmk_core/protocol/lufa.mk @@ -15,9 +15,8 @@ else endif LUFA_SRC = lufa.c \ - usb_descriptor.c \ - outputselect.c \ - $(LUFA_SRC_USB) + usb_descriptor.c \ + $(LUFA_SRC_USB) ifeq ($(strip $(MIDI_ENABLE)), yes) include $(TMK_PATH)/protocol/midi.mk @@ -25,23 +24,27 @@ endif ifeq ($(strip $(BLUETOOTH_ENABLE)), yes) LUFA_SRC += $(LUFA_DIR)/bluetooth.c \ - $(TMK_DIR)/protocol/serial_uart.c + outputselect.c \ + $(TMK_DIR)/protocol/serial_uart.c endif ifeq ($(strip $(BLUETOOTH)), AdafruitBLE) - LUFA_SRC += spi_master.c - LUFA_SRC += analog.c - LUFA_SRC += $(LUFA_DIR)/adafruit_ble.cpp + LUFA_SRC += spi_master.c \ + analog.c \ + outputselect.c \ + $(LUFA_DIR)/adafruit_ble.cpp endif ifeq ($(strip $(BLUETOOTH)), AdafruitEZKey) LUFA_SRC += $(LUFA_DIR)/bluetooth.c \ - $(TMK_DIR)/protocol/serial_uart.c + outputselect.c \ + $(TMK_DIR)/protocol/serial_uart.c endif ifeq ($(strip $(BLUETOOTH)), RN42) LUFA_SRC += $(LUFA_DIR)/bluetooth.c \ - $(TMK_DIR)/protocol/serial_uart.c + outputselect.c \ + $(TMK_DIR)/protocol/serial_uart.c endif ifeq ($(strip $(VIRTSER_ENABLE)), yes) diff --git a/tmk_core/protocol/lufa/lufa.c b/tmk_core/protocol/lufa/lufa.c index 3ca1a809d..ca3384ba2 100644 --- a/tmk_core/protocol/lufa/lufa.c +++ b/tmk_core/protocol/lufa/lufa.c @@ -53,7 +53,6 @@ #include "lufa.h" #include "quantum.h" #include -#include "outputselect.h" #ifdef NKRO_ENABLE # include "keycode_config.h" @@ -66,6 +65,7 @@ extern keymap_config_t keymap_config; #endif #ifdef BLUETOOTH_ENABLE +# include "outputselect.h" # ifdef MODULE_ADAFRUIT_BLE # include "adafruit_ble.h" # else @@ -554,9 +554,10 @@ static uint8_t keyboard_leds(void) { return keyboard_led_state; } */ static void send_keyboard(report_keyboard_t *report) { uint8_t timeout = 255; - uint8_t where = where_to_send(); #ifdef BLUETOOTH_ENABLE + uint8_t where = where_to_send(); + if (where == OUTPUT_BLUETOOTH || where == OUTPUT_USB_AND_BT) { # ifdef MODULE_ADAFRUIT_BLE adafruit_ble_send_keys(report->mods, report->keys, sizeof(report->keys)); @@ -578,11 +579,11 @@ static void send_keyboard(report_keyboard_t *report) { } # endif } -#endif if (where != OUTPUT_USB && where != OUTPUT_USB_AND_BT) { return; } +#endif /* Select the Keyboard Report Endpoint */ uint8_t ep = KEYBOARD_IN_EPNUM; @@ -618,9 +619,10 @@ static void send_keyboard(report_keyboard_t *report) { static void send_mouse(report_mouse_t *report) { #ifdef MOUSE_ENABLE uint8_t timeout = 255; - uint8_t where = where_to_send(); # ifdef BLUETOOTH_ENABLE + uint8_t where = where_to_send(); + if (where == OUTPUT_BLUETOOTH || where == OUTPUT_USB_AND_BT) { # ifdef MODULE_ADAFRUIT_BLE // FIXME: mouse buttons @@ -637,11 +639,11 @@ static void send_mouse(report_mouse_t *report) { bluefruit_serial_send(0x00); # endif } -# endif if (where != OUTPUT_USB && where != OUTPUT_USB_AND_BT) { return; } +# endif /* Select the Mouse Report Endpoint */ Endpoint_SelectEndpoint(MOUSE_IN_EPNUM); @@ -696,9 +698,9 @@ static void send_system(uint16_t data) { */ static void send_consumer(uint16_t data) { #ifdef EXTRAKEY_ENABLE +# ifdef BLUETOOTH_ENABLE uint8_t where = where_to_send(); -# ifdef BLUETOOTH_ENABLE if (where == OUTPUT_BLUETOOTH || where == OUTPUT_USB_AND_BT) { # ifdef MODULE_ADAFRUIT_BLE adafruit_ble_send_consumer_key(data, 0); @@ -728,11 +730,11 @@ static void send_consumer(uint16_t data) { bluefruit_serial_send(0x00); # endif } -# endif if (where != OUTPUT_USB && where != OUTPUT_USB_AND_BT) { return; } +# endif send_extra(REPORT_ID_CONSUMER, data); #endif -- cgit v1.3.1 From 60e5733c487cc0435e7d3b913f31ce4acc405d4a Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Mon, 22 Jun 2020 11:22:00 +1000 Subject: `qmk cformat` on `develop` (#9501) --- tmk_core/protocol/chibios/usb_main.c | 4 +--- tmk_core/protocol/lufa/lufa.c | 4 ++-- 2 files changed, 3 insertions(+), 5 deletions(-) (limited to 'tmk_core') diff --git a/tmk_core/protocol/chibios/usb_main.c b/tmk_core/protocol/chibios/usb_main.c index 9d68419f4..21e9f14e5 100644 --- a/tmk_core/protocol/chibios/usb_main.c +++ b/tmk_core/protocol/chibios/usb_main.c @@ -796,9 +796,7 @@ int8_t sendchar(uint8_t c) { } #endif /* CONSOLE_ENABLE */ -void _putchar(char character) { - sendchar(character); -} +void _putchar(char character) { sendchar(character); } #ifdef RAW_ENABLE void raw_hid_send(uint8_t *data, uint8_t length) { diff --git a/tmk_core/protocol/lufa/lufa.c b/tmk_core/protocol/lufa/lufa.c index ca3384ba2..6776a964e 100644 --- a/tmk_core/protocol/lufa/lufa.c +++ b/tmk_core/protocol/lufa/lufa.c @@ -556,7 +556,7 @@ static void send_keyboard(report_keyboard_t *report) { uint8_t timeout = 255; #ifdef BLUETOOTH_ENABLE - uint8_t where = where_to_send(); + uint8_t where = where_to_send(); if (where == OUTPUT_BLUETOOTH || where == OUTPUT_USB_AND_BT) { # ifdef MODULE_ADAFRUIT_BLE @@ -621,7 +621,7 @@ static void send_mouse(report_mouse_t *report) { uint8_t timeout = 255; # ifdef BLUETOOTH_ENABLE - uint8_t where = where_to_send(); + uint8_t where = where_to_send(); if (where == OUTPUT_BLUETOOTH || where == OUTPUT_USB_AND_BT) { # ifdef MODULE_ADAFRUIT_BLE -- cgit v1.3.1 From 8a4a0c25fdb2c4d0ac3ac8fd5f6ba14b56f4cd28 Mon Sep 17 00:00:00 2001 From: Ryan Date: Thu, 2 Jul 2020 13:12:34 +1000 Subject: Change analogRead calls to analogReadPin (#9023) * Change analogRead calls to analogReadPin * Add ChangeLog * Update docs, remove mention of `analogRead()` * Retarget changelog for next round --- docs/ChangeLog/20200829/PR9023.md | 5 ++++ docs/adc_driver.md | 39 +++++++++++++---------------- keyboards/handwired/promethium/config.h | 1 - keyboards/handwired/promethium/promethium.c | 3 ++- tmk_core/protocol/lufa/adafruit_ble.cpp | 4 +-- 5 files changed, 27 insertions(+), 25 deletions(-) create mode 100644 docs/ChangeLog/20200829/PR9023.md (limited to 'tmk_core') diff --git a/docs/ChangeLog/20200829/PR9023.md b/docs/ChangeLog/20200829/PR9023.md new file mode 100644 index 000000000..79ca2cb2f --- /dev/null +++ b/docs/ChangeLog/20200829/PR9023.md @@ -0,0 +1,5 @@ +# Deprecation of `analogRead()` + +[#9023](https://github.com/qmk/qmk_firmware/pull/9023) + +This function takes Arduino pin numbers (eg. `9` vs. `B5`), which is at odds with the rest of the codebase. The replacement for this function is `analogReadPin()`. diff --git a/docs/adc_driver.md b/docs/adc_driver.md index f8fb94094..6e3d51386 100644 --- a/docs/adc_driver.md +++ b/docs/adc_driver.md @@ -45,9 +45,9 @@ Then place this include at the top of your code: Note that some of these pins are doubled-up on ADCs with the same channel. This is because the pins can be used for either ADC. -Also note that the F0 and F3 use different numbering schemes. The F0 has a single ADC and the channels are 0-based, whereas the F3 has 4 ADCs and the channels are 1 based. This is because the F0 uses the `ADCv1` implementation of the ADC, whereas the F3 uses the `ADCv3` implementation. +Also note that the F0 and F3 use different numbering schemes. The F0 has a single ADC and the channels are 0-indexed, whereas the F3 has 4 ADCs and the channels are 1-indexed. This is because the F0 uses the `ADCv1` implementation of the ADC, whereas the F3 uses the `ADCv3` implementation. -|ADC|Channel|STM32F0XX|STM32F3XX| +|ADC|Channel|STM32F0xx|STM32F3xx| |---|-------|---------|---------| |1 |0 |`A0` | | |1 |1 |`A1` |`A0` | @@ -122,32 +122,29 @@ Also note that the F0 and F3 use different numbering schemes. The F0 has a singl |Function |Description | |----------------------------|-------------------------------------------------------------------------------------------------------------------| |`analogReference(mode)` |Sets the analog voltage reference source. Must be one of `ADC_REF_EXTERNAL`, `ADC_REF_POWER` or `ADC_REF_INTERNAL`.| -|`analogRead(pin)` |Reads the value from the specified Arduino pin, eg. `4` for ADC6 on the ATmega32U4. | -|`analogReadPin(pin)` |Reads the value from the specified QMK pin, eg. `F6` for ADC6 on the ATmega32U4. | -|`pinToMux(pin)` |Translates a given QMK pin to a mux value. If an unsupported pin is given, returns the mux value for "0V (GND)". | +|`analogReadPin(pin)` |Reads the value from the specified pin, eg. `F6` for ADC6 on the ATmega32U4. | +|`pinToMux(pin)` |Translates a given pin to a mux value. If an unsupported pin is given, returns the mux value for "0V (GND)". | |`adc_read(mux)` |Reads the value from the ADC according to the specified mux. See your MCU's datasheet for more information. | ### ARM -Note that care was taken to match all of the functions used for AVR devices, however complications in the ARM platform prevent that from always being possible. For example, the `STM32` chips do not have assigned Arduino pins. We could use the default pin numbers, but those numbers change based on the package type of the device. For this reason, please specify your target pins with their identifiers (`A0`, `F3`, etc.). Also note that there are some variants of functions that accept the target ADC for the pin. Some pins can be used for multiple ADCs, and this specified can help you pick which ADC will be used to interact with that pin. - -|Function |Description | -|----------------------------|--------------------------------------------------------------------------------------------------------------------| -|`analogReadPin(pin)` |Reads the value from the specified QMK pin, eg. `A0` for channel 0 on the STM32F0 and ADC1 channel 1 on the STM32F3. Note that if a pin can be used for multiple ADCs, it will pick the lower numbered ADC for this function. eg. `C0` will be channel 6 of ADC 1 when it could be used for ADC 2 as well.| -|`analogReadPinAdc(pin, adc)`|Reads the value from the specified QMK pin and ADC, eg. `C0, 1` will read from channel 6, ADC 2 instead of ADC 1. Note that the ADCs are 0-indexed for this function.| -|`pinToMux(pin)` |Translates a given QMK pin to a channel and ADC combination. If an unsupported pin is given, returns the mux value for "0V (GND)".| -|`adc_read(mux)` |Reads the value from the ADC according to the specified pin and adc combination. See your MCU's datasheet for more information.| +|Function |Description | +|----------------------------|------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +|`analogReadPin(pin)` |Reads the value from the specified pin, eg. `A0` for channel 0 on the STM32F0 and ADC1 channel 1 on the STM32F3. Note that if a pin can be used for multiple ADCs, it will pick the lower numbered ADC for this function. eg. `C0` will be channel 6 of ADC 1 when it could be used for ADC 2 as well.| +|`analogReadPinAdc(pin, adc)`|Reads the value from the specified pin and ADC, eg. `C0, 1` will read from channel 6, ADC 2 instead of ADC 1. Note that the ADCs are 0-indexed for this function. | +|`pinToMux(pin)` |Translates a given pin to a channel and ADC combination. If an unsupported pin is given, returns the mux value for "0V (GND)". | +|`adc_read(mux)` |Reads the value from the ADC according to the specified pin and ADC combination. See your MCU's datasheet for more information. | ## Configuration ## ARM -The ARM implementation of the ADC has a few additional options that you can override in your own keyboards and keymaps to change how it operates. +The ARM implementation of the ADC has a few additional options that you can override in your own keyboards and keymaps to change how it operates. Please consult the corresponding `hal_adc_lld.h` in ChibiOS for your specific microcontroller for further documentation on your available options. -|`#define` |Type |Default |Description| -|-------------------|------|---------------------|-----------| -|ADC_CIRCULAR_BUFFER|`bool`|`false` |If `TRUE`, then the implementation will use a circular buffer.| -|ADC_NUM_CHANNELS |`int` |`1` |Sets the number of channels that will be scanned as part of an ADC operation. The current implementation only supports `1`.| -|ADC_BUFFER_DEPTH |`int` |`2` |Sets the depth of each result. Since we are only getting a 12-bit result by default, we set this to `2` bytes so we can contain our one value. This could be set to 1 if you opt for a 8-bit or lower result.| -|ADC_SAMPLING_RATE |`int` |`ADC_SMPR_SMP_1P5` |Sets the sampling rate of the ADC. By default, it is set to the fastest setting. Please consult the corresponding `hal_adc_lld.h` in ChibiOS for your specific microcontroller for further documentation on your available options.| -|ADC_RESOLUTION |`int` |`ADC_CFGR1_RES_12BIT`|The resolution of your result. We choose 12 bit by default, but you can opt for 12, 10, 8, or 6 bit. Please consult the corresponding `hal_adc_lld.h` in ChibiOS for your specific microcontroller for further documentation on your available options.| +|`#define` |Type |Default |Description | +|---------------------|------|---------------------|------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +|`ADC_CIRCULAR_BUFFER`|`bool`|`false` |If `true`, then the implementation will use a circular buffer. | +|`ADC_NUM_CHANNELS` |`int` |`1` |Sets the number of channels that will be scanned as part of an ADC operation. The current implementation only supports `1`. | +|`ADC_BUFFER_DEPTH` |`int` |`2` |Sets the depth of each result. Since we are only getting a 12-bit result by default, we set this to 2 bytes so we can contain our one value. This could be set to 1 if you opt for an 8-bit or lower result.| +|`ADC_SAMPLING_RATE` |`int` |`ADC_SMPR_SMP_1P5` |Sets the sampling rate of the ADC. By default, it is set to the fastest setting. | +|`ADC_RESOLUTION` |`int` |`ADC_CFGR1_RES_12BIT`|The resolution of your result. We choose 12 bit by default, but you can opt for 12, 10, 8, or 6 bit. | diff --git a/keyboards/handwired/promethium/config.h b/keyboards/handwired/promethium/config.h index f9560206b..20c5e6a85 100644 --- a/keyboards/handwired/promethium/config.h +++ b/keyboards/handwired/promethium/config.h @@ -150,7 +150,6 @@ along with this program. If not, see . //#define NO_ACTION_FUNCTION #define PS2_MOUSE_INIT_DELAY 2000 -#define BATTERY_PIN 9 #define BATTERY_POLL 30000 #define MAX_VOLTAGE 4.2 #define MIN_VOLTAGE 3.2 diff --git a/keyboards/handwired/promethium/promethium.c b/keyboards/handwired/promethium/promethium.c index 3cc0f5a8c..96bcf3ce1 100644 --- a/keyboards/handwired/promethium/promethium.c +++ b/keyboards/handwired/promethium/promethium.c @@ -3,6 +3,7 @@ #include "timer.h" #include "matrix.h" #include "musical_notes.h" +#include "adafruit_ble.h" float fauxclicky_pressed_note[2] = MUSICAL_NOTE(_A4, 0.0625); float fauxclicky_released_note[2] = MUSICAL_NOTE(_A4, 0.0625); @@ -11,7 +12,7 @@ float fauxclicky_beep_note[2] = MUSICAL_NOTE(_C6, 0.25); // cubic fit {3.3, 0}, {3.5, 2.9}, {3.6, 5}, {3.7, 8.6}, {3.8, 36}, {3.9, 62}, {4.0, 73}, {4.05, 83}, {4.1, 89}, {4.15, 94}, {4.2, 100} uint8_t battery_level(void) { - float voltage = analogRead(BATTERY_PIN) * 2 * 3.3 / 1024; + float voltage = adafruit_ble_read_battery_voltage() * 2 * 3.3 / 1024; if (voltage < MIN_VOLTAGE) return 0; if (voltage > MAX_VOLTAGE) return 255; return (voltage - MIN_VOLTAGE) / (MAX_VOLTAGE - MIN_VOLTAGE) * 255; diff --git a/tmk_core/protocol/lufa/adafruit_ble.cpp b/tmk_core/protocol/lufa/adafruit_ble.cpp index b07407f38..79b35fca3 100644 --- a/tmk_core/protocol/lufa/adafruit_ble.cpp +++ b/tmk_core/protocol/lufa/adafruit_ble.cpp @@ -38,7 +38,7 @@ #ifdef SAMPLE_BATTERY # ifndef BATTERY_LEVEL_PIN -# define BATTERY_LEVEL_PIN 7 +# define BATTERY_LEVEL_PIN B5 # endif #endif @@ -556,7 +556,7 @@ void adafruit_ble_task(void) { if (timer_elapsed(state.last_battery_update) > BatteryUpdateInterval && resp_buf.empty()) { state.last_battery_update = timer_read(); - state.vbat = analogRead(BATTERY_LEVEL_PIN); + state.vbat = analogReadPin(BATTERY_LEVEL_PIN); } #endif } -- cgit v1.3.1 From d0abad27abd6d58f88985c1c28463ee51b7a116e Mon Sep 17 00:00:00 2001 From: dhong44 Date: Thu, 16 Jul 2020 02:47:43 -0400 Subject: Fix the mousekey scrolling (#9174) Mousekey scrolling should have a separate repeat variable to keep track of scrolling acceleration, instead of being tied to mouse movement scolling in mousekeys. The send function should record when the last movement was made since this is when movement is actually sent. Doing this fixes the bug where the initial press of a mousekey scroll button causes a double scroll. Signed-off-by: Daniel Hong --- tmk_core/common/mousekey.c | 82 ++++++++++++++++++++++++---------------------- 1 file changed, 43 insertions(+), 39 deletions(-) (limited to 'tmk_core') diff --git a/tmk_core/common/mousekey.c b/tmk_core/common/mousekey.c index 42bf231f4..390c74e0f 100644 --- a/tmk_core/common/mousekey.c +++ b/tmk_core/common/mousekey.c @@ -35,7 +35,7 @@ static report_mouse_t mouse_report = {0}; static void mousekey_debug(void); static uint8_t mousekey_accel = 0; static uint8_t mousekey_repeat = 0; -static uint16_t last_timer = 0; +static uint8_t mousekey_wheel_repeat = 0; #ifndef MK_3_SPEED @@ -94,12 +94,12 @@ static uint8_t wheel_unit(void) { unit = (MOUSEKEY_WHEEL_DELTA * mk_wheel_max_speed) / 2; } else if (mousekey_accel & (1 << 2)) { unit = (MOUSEKEY_WHEEL_DELTA * mk_wheel_max_speed); - } else if (mousekey_repeat == 0) { + } else if (mousekey_wheel_repeat == 0) { unit = MOUSEKEY_WHEEL_DELTA; - } else if (mousekey_repeat >= mk_wheel_time_to_max) { + } else if (mousekey_wheel_repeat >= mk_wheel_time_to_max) { unit = MOUSEKEY_WHEEL_DELTA * mk_wheel_max_speed; } else { - unit = (MOUSEKEY_WHEEL_DELTA * mk_wheel_max_speed * mousekey_repeat) / mk_wheel_time_to_max; + unit = (MOUSEKEY_WHEEL_DELTA * mk_wheel_max_speed * mousekey_wheel_repeat) / mk_wheel_time_to_max; } return (unit > MOUSEKEY_WHEEL_MAX ? MOUSEKEY_WHEEL_MAX : (unit == 0 ? 1 : unit)); } @@ -147,14 +147,17 @@ static uint8_t wheel_unit(void) { void mousekey_task(void) { // report cursor and scroll movement independently report_mouse_t const tmpmr = mouse_report; - if ((mouse_report.x || mouse_report.y) && timer_elapsed(last_timer_c) > (mousekey_repeat ? mk_interval : mk_delay * 10)) { + + mouse_report.x = 0; + mouse_report.y = 0; + mouse_report.v = 0; + mouse_report.h = 0; + + if ((tmpmr.x || tmpmr.y) && timer_elapsed(last_timer_c) > (mousekey_repeat ? mk_interval : mk_delay * 10)) { if (mousekey_repeat != UINT8_MAX) mousekey_repeat++; - mouse_report.v = 0; - mouse_report.h = 0; - if (mouse_report.x > 0) mouse_report.x = move_unit(); - if (mouse_report.x < 0) mouse_report.x = move_unit() * -1; - if (mouse_report.y > 0) mouse_report.y = move_unit(); - if (mouse_report.y < 0) mouse_report.y = move_unit() * -1; + if (tmpmr.x != 0) mouse_report.x = move_unit() * ((tmpmr.x > 0) ? 1 : -1); + if (tmpmr.y != 0) mouse_report.y = move_unit() * ((tmpmr.y > 0) ? 1 : -1); + /* diagonal move [1/sqrt(2)] */ if (mouse_report.x && mouse_report.y) { mouse_report.x = times_inv_sqrt2(mouse_report.x); @@ -166,18 +169,12 @@ void mousekey_task(void) { mouse_report.y = 1; } } - mousekey_send(); - last_timer_c = last_timer; - mouse_report = tmpmr; } - if ((mouse_report.v || mouse_report.h) && timer_elapsed(last_timer_w) > (mousekey_repeat ? mk_wheel_interval : mk_wheel_delay * 10)) { - if (mousekey_repeat != UINT8_MAX) mousekey_repeat++; - mouse_report.x = 0; - mouse_report.y = 0; - if (mouse_report.v > 0) mouse_report.v = wheel_unit(); - if (mouse_report.v < 0) mouse_report.v = wheel_unit() * -1; - if (mouse_report.h > 0) mouse_report.h = wheel_unit(); - if (mouse_report.h < 0) mouse_report.h = wheel_unit() * -1; + if ((tmpmr.v || tmpmr.h) && timer_elapsed(last_timer_w) > (mousekey_wheel_repeat ? mk_wheel_interval : mk_wheel_delay * 10)) { + if (mousekey_wheel_repeat != UINT8_MAX) mousekey_wheel_repeat++; + if (tmpmr.v != 0) mouse_report.v = wheel_unit() * ((tmpmr.v > 0) ? 1 : -1); + if (tmpmr.h != 0) mouse_report.h = wheel_unit() * ((tmpmr.h > 0) ? 1 : -1); + /* diagonal move [1/sqrt(2)] */ if (mouse_report.v && mouse_report.h) { mouse_report.v = times_inv_sqrt2(mouse_report.v); @@ -189,10 +186,10 @@ void mousekey_task(void) { mouse_report.h = 1; } } - mousekey_send(); - last_timer_w = last_timer; - mouse_report = tmpmr; } + + if (mouse_report.x || mouse_report.y || mouse_report.v || mouse_report.h) mousekey_send(); + mouse_report = tmpmr; } void mousekey_on(uint8_t code) { @@ -228,6 +225,7 @@ void mousekey_on(uint8_t code) { mousekey_accel |= (1 << 1); else if (code == KC_MS_ACCEL2) mousekey_accel |= (1 << 2); + } void mousekey_off(uint8_t code) { @@ -263,7 +261,8 @@ void mousekey_off(uint8_t code) { mousekey_accel &= ~(1 << 1); else if (code == KC_MS_ACCEL2) mousekey_accel &= ~(1 << 2); - if (mouse_report.x == 0 && mouse_report.y == 0 && mouse_report.v == 0 && mouse_report.h == 0) mousekey_repeat = 0; + if (mouse_report.x == 0 && mouse_report.y == 0) mousekey_repeat = 0; + if (mouse_report.v == 0 && mouse_report.h == 0) mousekey_wheel_repeat = 0; } #else /* #ifndef MK_3_SPEED */ @@ -285,20 +284,22 @@ uint16_t w_intervals[mkspd_COUNT] = {MK_W_INTERVAL_UNMOD, MK_W_INTERVAL_0 void mousekey_task(void) { // report cursor and scroll movement independently report_mouse_t const tmpmr = mouse_report; - if ((mouse_report.x || mouse_report.y) && timer_elapsed(last_timer_c) > c_intervals[mk_speed]) { - mouse_report.h = 0; - mouse_report.v = 0; - mousekey_send(); - last_timer_c = last_timer; - mouse_report = tmpmr; + mouse_report.x = 0; + mouse_report.y = 0; + mouse_report.v = 0; + mouse_report.h = 0; + + if ((tmpmr.x || tmpmr.y) && timer_elapsed(last_timer_c) > c_intervals[mk_speed]) { + mouse_report.x = tmpmr.x; + mouse_report.y = tmpmr.y; } - if ((mouse_report.h || mouse_report.v) && timer_elapsed(last_timer_w) > w_intervals[mk_speed]) { - mouse_report.x = 0; - mouse_report.y = 0; - mousekey_send(); - last_timer_w = last_timer; - mouse_report = tmpmr; + if ((tmpmr.h || tmpmr.v) && timer_elapsed(last_timer_w) > w_intervals[mk_speed]) { + mouse_report.v = tmpmr.v; + mouse_report.h = tmpmr.h; } + + if (mouse_report.x || mouse_report.y || mouse_report.v || mouse_report.h) mousekey_send(); + mouse_report = tmpmr; } void adjust_speed(void) { @@ -413,13 +414,16 @@ void mousekey_off(uint8_t code) { void mousekey_send(void) { mousekey_debug(); + uint16_t time = timer_read(); + if (mouse_report.x || mouse_report.y) last_timer_c = time; + if (mouse_report.v || mouse_report.h) last_timer_w = time; host_mouse_send(&mouse_report); - last_timer = timer_read(); } void mousekey_clear(void) { mouse_report = (report_mouse_t){}; mousekey_repeat = 0; + mousekey_wheel_repeat = 0; mousekey_accel = 0; } -- cgit v1.3.1 From 93e7a8f74cc2c9c7bc50b413654642a0347a55d2 Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Thu, 16 Jul 2020 16:58:14 +1000 Subject: Add dual-bank STM32 bootloader support, given GPIO toggle on BOOT0 to charge RC circuit. (#8778) --- docs/platformdev_chibios_earlyinit.md | 19 ++++++-- tmk_core/common/chibios/bootloader.c | 84 ++++++++++++++++++++++++++++------- tmk_core/protocol/chibios/main.c | 1 + 3 files changed, 85 insertions(+), 19 deletions(-) (limited to 'tmk_core') diff --git a/docs/platformdev_chibios_earlyinit.md b/docs/platformdev_chibios_earlyinit.md index 699c22377..5fd78bb33 100644 --- a/docs/platformdev_chibios_earlyinit.md +++ b/docs/platformdev_chibios_earlyinit.md @@ -4,17 +4,28 @@ This page describes a part of QMK that is a somewhat advanced concept, and is on QMK uses ChibiOS as the underlying layer to support a multitude of Arm-based devices. Each ChibiOS-supported keyboard has a low-level board definition which is responsible for initializing hardware peripherals such as the clocks, and GPIOs. -Older QMK revisions required duplication of these board definitions inside your keyboard's directory in order to override such early initialization points; this is now abstracted into the following APIs, and allows usage of the board definitions supplied with ChibiOS itself. Check `/lib/chibios/os/hal/boards` for the list of official definitions. If your keyboard needs extra initialization at a very early stage, consider providing keyboard-level overrides of the following APIs: +Older QMK revisions required duplication of these board definitions inside your keyboard's directory in order to override such early initialization points; this is now abstracted into the following APIs, and allows usage of the board definitions supplied with ChibiOS itself. Check `/lib/chibios/os/hal/boards` for the list of official definitions. If your keyboard needs extra initialization at a very early stage, consider providing keyboard-level overrides of the following APIs instead of duplicating the board definitions: ## `early_hardware_init_pre()` :id=early-hardware-init-pre The function `early_hardware_init_pre` is the earliest possible code that can be executed by a keyboard firmware. This is intended as a replacement for the ChibiOS board definition's `__early_init` function, and is the equivalent of executing at the start of the function. -This is executed before RAM gets cleared, and before clocks or GPIOs are configured; any delays or preparation using GPIOs is not likely to work at this point. After executing this function, RAM on the MCU may be zero'ed. Assigning values to variables during execution of this function may be overwritten. +This is executed before RAM gets cleared, and before clocks or GPIOs are configured; for example, ChibiOS delays are not likely to work at this point. After executing this function, RAM on the MCU may be zero'ed. Assigning values to variables during execution of this function may be overwritten. -As such, if you wish to override this API consider limiting use to writing to low-level registers. The default implementation of this function can be configured to jump to bootloader if a `RESET` key was pressed, by ensuring `#define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE` is in the keyboard's `config.h` file. +As such, if you wish to override this API consider limiting use to writing to low-level registers. The default implementation of this function can be configured to jump to bootloader if a `RESET` key was pressed: -To implement your own version of this function, in your keyboard's source files: +| `config.h` override | Description | Default | +|-----------------------------------------------|----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|----------| +| `#define EARLY_INIT_PERFORM_BOOTLOADER_JUMP` | Whether or not bootloader is to be executed during the early initialisation code of QMK. | `FALSE` | +| `#define STM32_BOOTLOADER_ADDRESS` | Relevant for single-bank STM32 MCUs, signifies the memory address to jump to bootloader. Consult [AN2606](https://www.st.com/content/st_com/en/search.html#q=an2606-t=resources-page=1) for the _System Memory_ address for your MCU. This value should be of the format `0x11111111`. | `` | +| `#define STM32_BOOTLOADER_DUAL_BANK` | Relevant for dual-bank STM32 MCUs, signifies that a GPIO is to be toggled in order to enter bootloader mode. | `FALSE` | +| `#define STM32_BOOTLOADER_DUAL_BANK_GPIO` | Relevant for dual-bank STM32 MCUs, the pin to toggle when attempting to enter bootloader mode, e.g. `B8` | `` | +| `#define STM32_BOOTLOADER_DUAL_BANK_POLARITY` | Relevant for dual-bank STM32 MCUs, the value to set the pin to in order to trigger charging of the RC circuit. e.g. `0` or `1`. | `0` | +| `#define STM32_BOOTLOADER_DUAL_BANK_DELAY` | Relevant for dual-bank STM32 MCUs, an arbitrary measurement of time to delay before resetting the MCU. Increasing number increases the delay. | `100000` | + +Kinetis MCUs have no configurable options. + +Alternatively, to implement your own version of this function, in your keyboard's source files: ```c void early_hardware_init_pre(void) { diff --git a/tmk_core/common/chibios/bootloader.c b/tmk_core/common/chibios/bootloader.c index 4cf5dae7e..dceeaa6b1 100644 --- a/tmk_core/common/chibios/bootloader.c +++ b/tmk_core/common/chibios/bootloader.c @@ -3,28 +3,82 @@ #include "ch.h" #include "hal.h" -#ifdef STM32_BOOTLOADER_ADDRESS -/* STM32 */ - /* This code should be checked whether it runs correctly on platforms */ -# define SYMVAL(sym) (uint32_t)(((uint8_t *)&(sym)) - ((uint8_t *)0)) +#define SYMVAL(sym) (uint32_t)(((uint8_t *)&(sym)) - ((uint8_t *)0)) +#define BOOTLOADER_MAGIC 0xDEADBEEF +#define MAGIC_ADDR (unsigned long *)(SYMVAL(__ram0_end__) - 4) + +#ifndef STM32_BOOTLOADER_DUAL_BANK +# define STM32_BOOTLOADER_DUAL_BANK FALSE +#endif + +#if STM32_BOOTLOADER_DUAL_BANK + +// Need pin definitions +# include "config_common.h" + +# ifndef STM32_BOOTLOADER_DUAL_BANK_GPIO +# error "No STM32_BOOTLOADER_DUAL_BANK_GPIO defined, don't know which pin to toggle" +# endif + +# ifndef STM32_BOOTLOADER_DUAL_BANK_POLARITY +# define STM32_BOOTLOADER_DUAL_BANK_POLARITY 0 +# endif + +# ifndef STM32_BOOTLOADER_DUAL_BANK_DELAY +# define STM32_BOOTLOADER_DUAL_BANK_DELAY 100000 +# endif + +extern uint32_t __ram0_end__; + +# define bootdelay(loopcount) \ + do { \ + for (int i = 0; i < loopcount; ++i) { \ + __asm__ volatile("nop\n\t" \ + "nop\n\t" \ + "nop\n\t"); \ + } \ + } while (0) + +void bootloader_jump(void) { + *MAGIC_ADDR = BOOTLOADER_MAGIC; // set magic flag => reset handler will jump into boot loader + NVIC_SystemReset(); +} + +void enter_bootloader_mode_if_requested(void) { + unsigned long *check = MAGIC_ADDR; + if (*check == BOOTLOADER_MAGIC) { + *check = 0; + + // For STM32 MCUs with dual-bank flash, and we're incapable of jumping to the bootloader. The first valid flash + // bank is executed unconditionally after a reset, so it doesn't enter DFU unless BOOT0 is high. Instead, we do + // it with hardware...in this case, we pull a GPIO high/low depending on the configuration, connects 3.3V to + // BOOT0's RC charging circuit, lets it charge the capacitor, and issue a system reset. See the QMK discord + // #hardware channel pins for an example circuit. + palSetPadMode(PAL_PORT(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_PAD(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_MODE_OUTPUT_PUSHPULL); +# if STM32_BOOTLOADER_DUAL_BANK_POLARITY + palSetPad(PAL_PORT(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_PAD(STM32_BOOTLOADER_DUAL_BANK_GPIO)); +# else + palClearPad(PAL_PORT(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_PAD(STM32_BOOTLOADER_DUAL_BANK_GPIO)); +# endif + + // Wait for a while for the capacitor to charge + bootdelay(STM32_BOOTLOADER_DUAL_BANK_DELAY); + + // Issue a system reset to get the ROM bootloader to execute, with BOOT0 high + NVIC_SystemReset(); + } +} + +#elif defined(STM32_BOOTLOADER_ADDRESS) // STM32_BOOTLOADER_DUAL_BANK + extern uint32_t __ram0_end__; -# define BOOTLOADER_MAGIC 0xDEADBEEF -# define MAGIC_ADDR (unsigned long *)(SYMVAL(__ram0_end__) - 4) -/** \brief Jump to the bootloader - * - * FIXME: needs doc - */ void bootloader_jump(void) { *MAGIC_ADDR = BOOTLOADER_MAGIC; // set magic flag => reset handler will jump into boot loader NVIC_SystemReset(); } -/** \brief Enter bootloader mode if requested - * - * FIXME: needs doc - */ void enter_bootloader_mode_if_requested(void) { unsigned long *check = MAGIC_ADDR; if (*check == BOOTLOADER_MAGIC) { @@ -41,7 +95,7 @@ void enter_bootloader_mode_if_requested(void) { } } -#elif defined(KL2x) || defined(K20x) /* STM32_BOOTLOADER_ADDRESS */ +#elif defined(KL2x) || defined(K20x) // STM32_BOOTLOADER_DUAL_BANK // STM32_BOOTLOADER_ADDRESS /* Kinetis */ # if defined(KIIBOHD_BOOTLOADER) diff --git a/tmk_core/protocol/chibios/main.c b/tmk_core/protocol/chibios/main.c index 7d32c16ed..a0d28f9af 100644 --- a/tmk_core/protocol/chibios/main.c +++ b/tmk_core/protocol/chibios/main.c @@ -35,6 +35,7 @@ #ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP // Change this to be TRUE once we've migrated keyboards to the new init system +// Remember to change docs/platformdev_chibios_earlyinit.md as well. # define EARLY_INIT_PERFORM_BOOTLOADER_JUMP FALSE #endif -- cgit v1.3.1 From 686a9d35ffe1cf834673be2991d7bf1025423ae6 Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Fri, 17 Jul 2020 06:19:18 +1000 Subject: Re-fix the STM32 dual-bank bootloader stuff. (#9738) * Re-fix the dual-bank bootloader stuff. * Use wait_ms() instead of using nop's for a delay, as ChibiOS is actually running at the time of bootloader jump. --- tmk_core/common/chibios/bootloader.c | 46 ++++++++++++------------------------ 1 file changed, 15 insertions(+), 31 deletions(-) (limited to 'tmk_core') diff --git a/tmk_core/common/chibios/bootloader.c b/tmk_core/common/chibios/bootloader.c index dceeaa6b1..743448ee1 100644 --- a/tmk_core/common/chibios/bootloader.c +++ b/tmk_core/common/chibios/bootloader.c @@ -2,6 +2,7 @@ #include "ch.h" #include "hal.h" +#include "wait.h" /* This code should be checked whether it runs correctly on platforms */ #define SYMVAL(sym) (uint32_t)(((uint8_t *)&(sym)) - ((uint8_t *)0)) @@ -31,45 +32,28 @@ extern uint32_t __ram0_end__; -# define bootdelay(loopcount) \ - do { \ - for (int i = 0; i < loopcount; ++i) { \ - __asm__ volatile("nop\n\t" \ - "nop\n\t" \ - "nop\n\t"); \ - } \ - } while (0) - void bootloader_jump(void) { - *MAGIC_ADDR = BOOTLOADER_MAGIC; // set magic flag => reset handler will jump into boot loader - NVIC_SystemReset(); -} - -void enter_bootloader_mode_if_requested(void) { - unsigned long *check = MAGIC_ADDR; - if (*check == BOOTLOADER_MAGIC) { - *check = 0; - - // For STM32 MCUs with dual-bank flash, and we're incapable of jumping to the bootloader. The first valid flash - // bank is executed unconditionally after a reset, so it doesn't enter DFU unless BOOT0 is high. Instead, we do - // it with hardware...in this case, we pull a GPIO high/low depending on the configuration, connects 3.3V to - // BOOT0's RC charging circuit, lets it charge the capacitor, and issue a system reset. See the QMK discord - // #hardware channel pins for an example circuit. - palSetPadMode(PAL_PORT(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_PAD(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_MODE_OUTPUT_PUSHPULL); + // For STM32 MCUs with dual-bank flash, and we're incapable of jumping to the bootloader. The first valid flash + // bank is executed unconditionally after a reset, so it doesn't enter DFU unless BOOT0 is high. Instead, we do + // it with hardware...in this case, we pull a GPIO high/low depending on the configuration, connects 3.3V to + // BOOT0's RC charging circuit, lets it charge the capacitor, and issue a system reset. See the QMK discord + // #hardware channel pins for an example circuit. + palSetPadMode(PAL_PORT(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_PAD(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_MODE_OUTPUT_PUSHPULL); # if STM32_BOOTLOADER_DUAL_BANK_POLARITY - palSetPad(PAL_PORT(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_PAD(STM32_BOOTLOADER_DUAL_BANK_GPIO)); + palSetPad(PAL_PORT(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_PAD(STM32_BOOTLOADER_DUAL_BANK_GPIO)); # else - palClearPad(PAL_PORT(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_PAD(STM32_BOOTLOADER_DUAL_BANK_GPIO)); + palClearPad(PAL_PORT(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_PAD(STM32_BOOTLOADER_DUAL_BANK_GPIO)); # endif - // Wait for a while for the capacitor to charge - bootdelay(STM32_BOOTLOADER_DUAL_BANK_DELAY); + // Wait for a while for the capacitor to charge + wait_ms(100); - // Issue a system reset to get the ROM bootloader to execute, with BOOT0 high - NVIC_SystemReset(); - } + // Issue a system reset to get the ROM bootloader to execute, with BOOT0 high + NVIC_SystemReset(); } +void enter_bootloader_mode_if_requested(void) {} // not needed at all, but if anybody attempts to invoke it.... + #elif defined(STM32_BOOTLOADER_ADDRESS) // STM32_BOOTLOADER_DUAL_BANK extern uint32_t __ram0_end__; -- cgit v1.3.1 From 3c74edbc691502228b2d2c4d42d5888311f0ca4c Mon Sep 17 00:00:00 2001 From: Drashna Jaelre Date: Wed, 22 Jul 2020 13:57:47 -0700 Subject: Disable NKRO on V-USB controllers (#9054) * Disable NKRO on V-USB controllers * not _currently_ supported text Co-authored-by: Ryan Co-authored-by: Ryan --- tmk_core/common.mk | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'tmk_core') diff --git a/tmk_core/common.mk b/tmk_core/common.mk index b7fe45afd..56ed4a857 100644 --- a/tmk_core/common.mk +++ b/tmk_core/common.mk @@ -99,8 +99,12 @@ ifeq ($(strip $(COMMAND_ENABLE)), yes) endif ifeq ($(strip $(NKRO_ENABLE)), yes) - TMK_COMMON_DEFS += -DNKRO_ENABLE - SHARED_EP_ENABLE = yes + ifneq ($(PROTOCOL),VUSB) + TMK_COMMON_DEFS += -DNKRO_ENABLE + SHARED_EP_ENABLE = yes + else + $(info NKRO is not currently supported on V-USB, and has been disabled.) + endif endif ifeq ($(strip $(USB_6KRO_ENABLE)), yes) -- cgit v1.3.1 From d4be07dad368c57669c88ead6c093c9e23086855 Mon Sep 17 00:00:00 2001 From: a-chol Date: Sat, 25 Jul 2020 14:01:15 +0200 Subject: Hid joystick interface (#4226) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * add support for hid gamepad interface add documentation for HID joystick Add joystick_task to read analog axes values even when no key is pressed or release. update doc Update docs/feature_joystick.md Manage pin setup and read to maintain matrix scan after analog read * Incorporates patches and changes to HID reporting There are some patches provided by @a-chol incorporated on this commit, and also some changes I made to the HID Report structure. The most interesting is the one dealing with number of buttons: Linux doesn't seem to care, but Windows requires the HID structure to be byte aligned (that's in the spec). So if one declares 8/16/32... buttons they should not have any issues, but this is what happens when you have 9 buttons: ``` bits |0|1|2|3|4|5|6|7| |*|*|*|*|*|*|*|*| axis 0 (report size 8) |*|*|*|*|*|*|*|*| ... |*|*|*|*|*|*|*|*| |*|*|*|*|*|*|*|*| |*|*|*|*|*|*|*|*| |*|*|*|*|*|*|*|*| |*|*|*|*|*|*|*|*| axis 6 |*|*|*|*|*|*|*|*| first 8 buttons (report size 1) |*| | | | | | | | last of 9 buttons, not aligned ``` So for that I added a conditonal that will add a number of reports with size 1 to make sure it aligns to the next multiple of 8. Those reports send dummy inputs that don't do anything aside from aligning the data. Tested on Linux, Windows 10 and Street Fighter (where the joystick is recognized as direct-input) * Add save and restore of each pin used in reading joystick (AVR). Allow output pin to be JS_VIRTUAL_AXIS if the axis is connected to Vcc instead of an output pin from the MCU. Fix joystick report id Fix broken v-usb hid joystick interface. Make it more resilient to unusual settings (none multiple of eight button count, 0 buttons or 0 axes) Correct adc reading for multiple axes. Piecewise range conversion for uncentered raw value range. Input, output and ground pin configuration per axis. Documentation fixes * Fix port addressing for joystick analog read * The other required set of changes As per the PR, the changes still holding it up. Add onekey for testing. Fix ARM builds. Fix device descriptor when either axes or buttons is zero. Add compile-time check for at least one axis or button. Move definition to try to fix conflict. PR review comments. qmk cformat * avoid float functions to compute range mapping for axis adc reading * Remove V-USB support for now. Updated docs accordingly. * Update tmk_core/protocol/lufa/lufa.c Co-Authored-By: Ryan * Update tmk_core/protocol/usb_descriptor.c Co-Authored-By: Ryan * Update tmk_core/protocol/usb_descriptor.c Co-Authored-By: Ryan * Update tmk_core/protocol/usb_descriptor.c Co-Authored-By: Ryan * Add support for joystick adc reading for stm32 MCUs. Fix joystick hid report sending for chibios * Fix HID joystick report sending for ChibiOS. Add one analog axis to the onekey:joystick keymap. Fix pin state save and restore during joystick analog read for STM32 MCUs. * Update tmk_core/protocol/chibios/usb_main.c Co-Authored-By: Ryan * Update tmk_core/protocol/lufa/lufa.c Co-Authored-By: Ryan * Add missing mcuconf.h and halconf.h to onekey:joystick keymap. Add suggested fixes from PR. * Switch saveState and restoreState signature to use pin_t type. onekey:joystick : add a second axis, virtual and programmatically animated. * Update docs/feature_joystick.md Co-Authored-By: Ryan * Update docs/feature_joystick.md Co-Authored-By: Ryan * Add PR corrections * Remove halconf.h and mcuconf.h from onekey keymaps * Change ADC_PIN to A0 Co-authored-by: achol Co-authored-by: José Júnior Co-authored-by: a-chol Co-authored-by: Nick Brassel Co-authored-by: Ryan --- common_features.mk | 7 + docs/_summary.md | 1 + docs/feature_joystick.md | 145 ++++++++++++++++++ drivers/avr/analog.c | 10 +- .../handwired/onekey/keymaps/joystick/config.h | 3 + .../handwired/onekey/keymaps/joystick/keymap.c | 25 +++ .../handwired/onekey/keymaps/joystick/rules.mk | 1 + quantum/joystick.c | 13 ++ quantum/joystick.h | 54 +++++++ quantum/process_keycode/process_joystick.c | 168 +++++++++++++++++++++ quantum/process_keycode/process_joystick.h | 11 ++ quantum/quantum.c | 3 + quantum/quantum.h | 4 + quantum/quantum_keycodes.h | 35 +++++ tmk_core/common/keyboard.c | 7 + tmk_core/common/report.h | 13 +- tmk_core/protocol/chibios/usb_main.c | 69 +++++++++ tmk_core/protocol/lufa/lufa.c | 67 ++++++++ tmk_core/protocol/usb_descriptor.c | 111 +++++++++++++- tmk_core/protocol/usb_descriptor.h | 15 ++ 20 files changed, 758 insertions(+), 4 deletions(-) create mode 100644 docs/feature_joystick.md create mode 100644 keyboards/handwired/onekey/keymaps/joystick/config.h create mode 100644 keyboards/handwired/onekey/keymaps/joystick/keymap.c create mode 100644 keyboards/handwired/onekey/keymaps/joystick/rules.mk create mode 100644 quantum/joystick.c create mode 100644 quantum/joystick.h create mode 100644 quantum/process_keycode/process_joystick.c create mode 100644 quantum/process_keycode/process_joystick.h (limited to 'tmk_core') diff --git a/common_features.mk b/common_features.mk index 8443a759b..f9fca4669 100644 --- a/common_features.mk +++ b/common_features.mk @@ -529,3 +529,10 @@ ifeq ($(strip $(AUTO_SHIFT_ENABLE)), yes) OPT_DEFS += -DAUTO_SHIFT_MODIFIERS endif endif + +ifeq ($(strip $(JOYSTICK_ENABLE)), yes) + OPT_DEFS += -DJOYSTICK_ENABLE + SRC += $(QUANTUM_DIR)/process_keycode/process_joystick.c + SRC += $(QUANTUM_DIR)/joystick.c + SRC += analog.c +endif diff --git a/docs/_summary.md b/docs/_summary.md index 9ed55a3d0..0c4371215 100644 --- a/docs/_summary.md +++ b/docs/_summary.md @@ -103,6 +103,7 @@ * [DIP Switch](feature_dip_switch.md) * [Encoders](feature_encoders.md) * [Haptic Feedback](feature_haptic_feedback.md) + * [Joystick](feature_joystick.md) * [Proton C Conversion](proton_c_conversion.md) * [PS/2 Mouse](feature_ps2_mouse.md) * [Split Keyboard](feature_split_keyboard.md) diff --git a/docs/feature_joystick.md b/docs/feature_joystick.md new file mode 100644 index 000000000..58dfc7b8d --- /dev/null +++ b/docs/feature_joystick.md @@ -0,0 +1,145 @@ +## Joystick + +The keyboard can be made to be recognized as a joystick HID device by the operating system. + +This is enabled by adding the following to `rules.mk`: + +```makefile +JOYSTICK_ENABLE = yes +``` + +!> Joystick support is not currently available on V-USB devices. + +The joystick feature provides two services: + * reading analog input devices (eg. potentiometers) + * sending gamepad HID reports + +Both services can be used without the other, depending on whether you just want to read a device but not send gamepad reports (for volume control for instance) +or send gamepad reports based on values computed by the keyboard. + +### Analog Input + +An analog device such as a potentiometer found on a gamepad's analog axes is based on a [voltage divider](https://en.wikipedia.org/wiki/Voltage_divider). +It is composed of three connectors linked to the ground, the power input and power output (usually the middle one). The power output holds the voltage that varies based on the position of the cursor, +which value will be read using your MCU's [ADC](https://en.wikipedia.org/wiki/Analog-to-digital_converter). +Depending on which pins are already used by your keyboard's matrix, the rest of the circuit can get a little bit more complicated, +feeding the power input and ground connection through pins and using diodes to avoid bad interactions with the matrix scanning procedures. + +### Configuring the Joystick + +By default, two axes and eight buttons are defined. This can be changed in your `config.h`: + +```c +// Max 32 +#define JOYSTICK_BUTTON_COUNT 16 +// Max 6: X, Y, Z, Rx, Ry, Rz +#define JOYSTICK_AXES_COUNT 3 +``` + +When defining axes for your joystick, you have to provide a definition array. You can do this from your keymap.c file. +A joystick will either be read from an input pin that allows the use of the ADC, or can be virtual, so that its value is provided by your code. +You have to define an array of type ''joystick_config_t'' and of proper size. + +There are three ways for your circuit to work with the ADC, that relies on the use of 1, 2 or 3 pins of the MCU: + * 1 pin: your analog device is directly connected to your device GND and VCC. The only pin used is the ADC pin of your choice. + * 2 pins: your analog device is powered through a pin that allows toggling it on or off. The other pin is used to read the input value through the ADC. + * 3 pins: both the power input and ground are connected to pins that must be set to a proper state before reading and restored afterwards. + +The configuration of each axis is performed using one of four macros: + * `JOYSTICK_AXIS_VIRTUAL`: no ADC reading must be performed, that value will be provided by keyboard/keymap-level code + * `JOYSTICK_AXIS_IN(INPUT_PIN, LOW, REST, HIGH)`: a voltage will be read on the provided pin, which must be an ADC-capable pin. + * `JOYSTICK_AXIS_IN_OUT(INPUT_PIN, OUTPUT_PIN, LOW, REST, HIGH)`: the provided `OUTPUT_PIN` will be set high before `INPUT_PIN` is read. + * `JOYSTICK_AXIS_IN_OUT_GROUND(INPUT_PIN, OUTPUT_PIN, GROUND_PIN, LOW, REST, HIGH)`: the `OUTPUT_PIN` will be set high and `GROUND_PIN` will be set low before reading from `INPUT_PIN`. + +In any case where an ADC reading takes place (when `INPUT_PIN` is provided), additional `LOW`, `REST` and `HIGH` parameters are used. +These implement the calibration of the analog device by defining the range of read values that will be mapped to the lowest, resting position and highest possible value for the axis (-127 to 127). +In practice, you have to provide the lowest/highest raw ADC reading, and the raw reading at resting position, when no deflection is applied. You can provide inverted `LOW` and `HIGH` to invert the axis. + +For instance, an axes configuration can be defined in the following way: + +```c +//joystick config +joystick_config_t joystick_axes[JOYSTICK_AXES_COUNT] = { + [0] = JOYSTICK_AXIS_IN_OUT_GROUND(A4, B0, A7, 900, 575, 285), + [1] = JOYSTICK_AXIS_VIRTUAL +}; +``` + +When the ADC reads 900 or higher, the returned axis value will be -127, whereas it will be 127 when the ADC reads 285 or lower. Zero is returned when 575 is read. + +In this example, the first axis will be read from the `A4` pin while `B0` is set high and `A7` is set low, using `analogReadPin()`, whereas the second axis will not be read. + +In order to give a value to the second axis, you can do so in any customizable entry point: as an action, in `process_record_user()` or in `matrix_scan_user()`, or even in `joystick_task()` which is called even when no key has been pressed. +You assign a value by writing to `joystick_status.axes[axis_index]` a signed 8-bit value (ranging from -127 to 127). Then it is necessary to assign the flag `JS_UPDATED` to `joystick_status.status` in order for an updated HID report to be sent. + +The following example writes two axes based on keypad presses, with `KC_P5` as a precision modifier: + +```c +#ifdef JOYSTICK_ENABLE +static uint8_t precision_val = 70; +static uint8_t axesFlags = 0; +enum axes { + Precision = 1, + Axis1High = 2, + Axis1Low = 4, + Axis2High = 8, + Axis2Low = 16 +}; +#endif + +bool process_record_user(uint16_t keycode, keyrecord_t *record) { + switch(keycode) { +#ifdef JOYSTICK_ENABLE + // virtual joystick +# if JOYSTICK_AXES_COUNT > 1 + case KC_P8: + if (record->event.pressed) { + axesFlags |= Axis2Low; + } else { + axesFlags &= ~Axis2Low; + } + joystick_status.status |= JS_UPDATED; + break; + case KC_P2: + if (record->event.pressed) { + axesFlags |= Axis2High; + } else { + axesFlags &= ~Axis2High; + } + joystick_status.status |= JS_UPDATED; + break; +# endif + case KC_P4: + if (record->event.pressed) { + axesFlags |= Axis1Low; + } else { + axesFlags &= ~Axis1Low; + } + joystick_status.status |= JS_UPDATED; + break; + case KC_P6: + if (record->event.pressed) { + axesFlags |= Axis1High; + } else { + axesFlags &= ~Axis1High; + } + joystick_status.status |= JS_UPDATED; + break; + case KC_P5: + if (record->event.pressed) { + axesFlags |= Precision; + } else { + axesFlags &= ~Precision; + } + joystick_status.status |= JS_UPDATED; + break; +#endif + } + return true; +} +``` + +### Triggering Joystick Buttons + +Joystick buttons are normal Quantum keycodes, defined as `JS_BUTTON0` to `JS_BUTTON31`, depending on the number of buttons you have configured. +To trigger a joystick button, just add the corresponding keycode to your keymap. diff --git a/drivers/avr/analog.c b/drivers/avr/analog.c index 9b8397b93..8d299ffdb 100644 --- a/drivers/avr/analog.c +++ b/drivers/avr/analog.c @@ -97,10 +97,11 @@ uint8_t pinToMux(pin_t pin) { #endif // clang-format on } + return 0; } int16_t adc_read(uint8_t mux) { - uint8_t low; + uint16_t low; // Enable ADC and configure prescaler ADCSRA = _BV(ADEN) | ADC_PRESCALER; @@ -128,5 +129,10 @@ int16_t adc_read(uint8_t mux) { // Must read LSB first low = ADCL; // Must read MSB only once! - return (ADCH << 8) | low; + low |= (ADCH << 8); + + // turn off the ADC + ADCSRA &= ~(1 << ADEN); + + return low; } diff --git a/keyboards/handwired/onekey/keymaps/joystick/config.h b/keyboards/handwired/onekey/keymaps/joystick/config.h new file mode 100644 index 000000000..5701d80c8 --- /dev/null +++ b/keyboards/handwired/onekey/keymaps/joystick/config.h @@ -0,0 +1,3 @@ +#pragma once +#define JOYSTICK_AXES_COUNT 2 +#define JOYSTICK_BUTTON_COUNT 1 diff --git a/keyboards/handwired/onekey/keymaps/joystick/keymap.c b/keyboards/handwired/onekey/keymaps/joystick/keymap.c new file mode 100644 index 000000000..60802f464 --- /dev/null +++ b/keyboards/handwired/onekey/keymaps/joystick/keymap.c @@ -0,0 +1,25 @@ +#include QMK_KEYBOARD_H + +#include "joystick.h" + +#ifndef ADC_PIN +# define ADC_PIN F6 +#endif + +const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { + LAYOUT( JS_BUTTON0 ) +}; + +void matrix_scan_user() { + int16_t val = (((uint32_t)timer_read()%5000 - 2500) * 255) / 5000; + if (val != joystick_status.axes[1]) { + joystick_status.axes[1] = val; + joystick_status.status |= JS_UPDATED; + } +} + +//joystick config +joystick_config_t joystick_axes[JOYSTICK_AXES_COUNT] = { + [0] = JOYSTICK_AXIS_IN(ADC_PIN, 0, 512, 1023) + , [1] = JOYSTICK_AXIS_VIRTUAL +}; \ No newline at end of file diff --git a/keyboards/handwired/onekey/keymaps/joystick/rules.mk b/keyboards/handwired/onekey/keymaps/joystick/rules.mk new file mode 100644 index 000000000..fbddbc6de --- /dev/null +++ b/keyboards/handwired/onekey/keymaps/joystick/rules.mk @@ -0,0 +1 @@ +JOYSTICK_ENABLE = yes diff --git a/quantum/joystick.c b/quantum/joystick.c new file mode 100644 index 000000000..7b87201ae --- /dev/null +++ b/quantum/joystick.c @@ -0,0 +1,13 @@ +#include "joystick.h" + +joystick_t joystick_status = {.buttons = {0}, + .axes = + { +#if JOYSTICK_AXES_COUNT > 0 + 0 +#endif + }, + .status = 0}; + +// array defining the reading of analog values for each axis +__attribute__((weak)) joystick_config_t joystick_axes[JOYSTICK_AXES_COUNT] = {}; diff --git a/quantum/joystick.h b/quantum/joystick.h new file mode 100644 index 000000000..a95472b9f --- /dev/null +++ b/quantum/joystick.h @@ -0,0 +1,54 @@ +#pragma once + +#ifndef JOYSTICK_BUTTON_COUNT +# define JOYSTICK_BUTTON_COUNT 8 +#endif + +#ifndef JOYSTICK_AXES_COUNT +# define JOYSTICK_AXES_COUNT 4 +#endif + +#include "quantum.h" + +#include + +// configure on input_pin of the joystick_axes array entry to JS_VIRTUAL_AXIS +// to prevent it from being read from the ADC. This allows outputing forged axis value. +// +#define JS_VIRTUAL_AXIS 0xFF + +#define JOYSTICK_AXIS_VIRTUAL \ + { JS_VIRTUAL_AXIS, JS_VIRTUAL_AXIS, JS_VIRTUAL_AXIS, 0, 1023 } +#define JOYSTICK_AXIS_IN(INPUT_PIN, LOW, REST, HIGH) \ + { JS_VIRTUAL_AXIS, INPUT_PIN, JS_VIRTUAL_AXIS, LOW, REST, HIGH } +#define JOYSTICK_AXIS_IN_OUT(INPUT_PIN, OUTPUT_PIN, LOW, REST, HIGH) \ + { OUTPUT_PIN, INPUT_PIN, JS_VIRTUAL_AXIS, LOW, REST, HIGH } +#define JOYSTICK_AXIS_IN_OUT_GROUND(INPUT_PIN, OUTPUT_PIN, GROUND_PIN, LOW, REST, HIGH) \ + { OUTPUT_PIN, INPUT_PIN, GROUND_PIN, LOW, REST, HIGH } + +typedef struct { + pin_t output_pin; + pin_t input_pin; + pin_t ground_pin; + + // the AVR ADC offers 10 bit precision, with significant bits on the higher part + uint16_t min_digit; + uint16_t mid_digit; + uint16_t max_digit; +} joystick_config_t; + +extern joystick_config_t joystick_axes[JOYSTICK_AXES_COUNT]; + +enum joystick_status { JS_INITIALIZED = 1, JS_UPDATED = 2 }; + +typedef struct { + uint8_t buttons[JOYSTICK_BUTTON_COUNT / 8 + 1]; + + int16_t axes[JOYSTICK_AXES_COUNT]; + uint8_t status : 2; +} joystick_t; + +extern joystick_t joystick_status; + +// to be implemented in the hid protocol library +void send_joystick_packet(joystick_t *joystick); diff --git a/quantum/process_keycode/process_joystick.c b/quantum/process_keycode/process_joystick.c new file mode 100644 index 000000000..c12f75685 --- /dev/null +++ b/quantum/process_keycode/process_joystick.c @@ -0,0 +1,168 @@ +#include "joystick.h" +#include "process_joystick.h" + +#include "analog.h" + +#include +#include + +bool process_joystick_buttons(uint16_t keycode, keyrecord_t *record); + +bool process_joystick(uint16_t keycode, keyrecord_t *record) { + if (process_joystick_buttons(keycode, record) && (joystick_status.status & JS_UPDATED) > 0) { + send_joystick_packet(&joystick_status); + joystick_status.status &= ~JS_UPDATED; + } + + return true; +} + +__attribute__((weak)) +void joystick_task(void) { + if (process_joystick_analogread() && (joystick_status.status & JS_UPDATED)) { + send_joystick_packet(&joystick_status); + joystick_status.status &= ~JS_UPDATED; + } +} + +bool process_joystick_buttons(uint16_t keycode, keyrecord_t *record) { + if (keycode < JS_BUTTON0 || keycode > JS_BUTTON_MAX) { + return true; + } else { + if (record->event.pressed) { + joystick_status.buttons[(keycode - JS_BUTTON0) / 8] |= 1 << (keycode % 8); + } else { + joystick_status.buttons[(keycode - JS_BUTTON0) / 8] &= ~(1 << (keycode % 8)); + } + + joystick_status.status |= JS_UPDATED; + } + + return true; +} + +uint16_t savePinState(pin_t pin) { +#ifdef __AVR__ + uint8_t pinNumber = pin & 0xF; + return ((PORTx_ADDRESS(pin) >> pinNumber) & 0x1) << 1 | ((DDRx_ADDRESS(pin) >> pinNumber) & 0x1); +#elif defined(PROTOCOL_CHIBIOS) + /* + The pin configuration is backed up in the following format : + bit 15 9 8 7 6 5 4 3 2 1 0 + |unused|ODR|IDR|PUPDR|OSPEEDR|OTYPER|MODER| + */ + return (( PAL_PORT(pin)->MODER >> (2*PAL_PAD(pin))) & 0x3) + | (((PAL_PORT(pin)->OTYPER >> (1*PAL_PAD(pin))) & 0x1) << 2) + | (((PAL_PORT(pin)->OSPEEDR >> (2*PAL_PAD(pin))) & 0x3) << 3) + | (((PAL_PORT(pin)->PUPDR >> (2*PAL_PAD(pin))) & 0x3) << 5) + | (((PAL_PORT(pin)->IDR >> (1*PAL_PAD(pin))) & 0x1) << 7) + | (((PAL_PORT(pin)->ODR >> (1*PAL_PAD(pin))) & 0x1) << 8); +#else + return 0; +#endif +} + +void restorePinState(pin_t pin, uint16_t restoreState) { +#if defined(PROTOCOL_LUFA) + uint8_t pinNumber = pin & 0xF; + PORTx_ADDRESS(pin) = (PORTx_ADDRESS(pin) & ~_BV(pinNumber)) | (((restoreState >> 1) & 0x1) << pinNumber); + DDRx_ADDRESS(pin) = (DDRx_ADDRESS(pin) & ~_BV(pinNumber)) | ((restoreState & 0x1) << pinNumber); +#elif defined(PROTOCOL_CHIBIOS) + PAL_PORT(pin)->MODER = (PAL_PORT(pin)->MODER & ~(0x3<< (2*PAL_PAD(pin)))) | (restoreState & 0x3) << (2*PAL_PAD(pin)); + PAL_PORT(pin)->OTYPER = (PAL_PORT(pin)->OTYPER & ~(0x1<< (1*PAL_PAD(pin)))) | ((restoreState>>2) & 0x1) << (1*PAL_PAD(pin)); + PAL_PORT(pin)->OSPEEDR= (PAL_PORT(pin)->OSPEEDR & ~(0x3<< (2*PAL_PAD(pin)))) | ((restoreState>>3) & 0x3) << (2*PAL_PAD(pin)); + PAL_PORT(pin)->PUPDR = (PAL_PORT(pin)->PUPDR & ~(0x3<< (2*PAL_PAD(pin)))) | ((restoreState>>5) & 0x3) << (2*PAL_PAD(pin)); + PAL_PORT(pin)->IDR = (PAL_PORT(pin)->IDR & ~(0x1<< (1*PAL_PAD(pin)))) | ((restoreState>>7) & 0x1) << (1*PAL_PAD(pin)); + PAL_PORT(pin)->ODR = (PAL_PORT(pin)->ODR & ~(0x1<< (1*PAL_PAD(pin)))) | ((restoreState>>8) & 0x1) << (1*PAL_PAD(pin)); +#else + return; +#endif +} + +__attribute__((weak)) bool process_joystick_analogread() { return process_joystick_analogread_quantum(); } + +bool process_joystick_analogread_quantum() { +#if JOYSTICK_AXES_COUNT > 0 + for (int axis_index = 0; axis_index < JOYSTICK_AXES_COUNT; ++axis_index) { + if (joystick_axes[axis_index].input_pin == JS_VIRTUAL_AXIS) { + continue; + } + + // save previous input pin status as well + uint16_t inputSavedState = savePinState(joystick_axes[axis_index].input_pin); + + // disable pull-up resistor + writePinLow(joystick_axes[axis_index].input_pin); + + // if pin was a pull-up input, we need to uncharge it by turning it low + // before making it a low input + setPinOutput(joystick_axes[axis_index].input_pin); + + wait_us(10); + + // save and apply output pin status + uint16_t outputSavedState = 0; + if (joystick_axes[axis_index].output_pin != JS_VIRTUAL_AXIS) { + // save previous output pin status + outputSavedState = savePinState(joystick_axes[axis_index].output_pin); + + setPinOutput(joystick_axes[axis_index].output_pin); + writePinHigh(joystick_axes[axis_index].output_pin); + } + + uint16_t groundSavedState = 0; + if (joystick_axes[axis_index].ground_pin != JS_VIRTUAL_AXIS) { + // save previous output pin status + groundSavedState = savePinState(joystick_axes[axis_index].ground_pin); + + setPinOutput(joystick_axes[axis_index].ground_pin); + writePinLow(joystick_axes[axis_index].ground_pin); + } + + wait_us(10); + + setPinInput(joystick_axes[axis_index].input_pin); + + wait_us(10); + +# if defined(__AVR__) || defined(PROTOCOL_CHIBIOS) + int16_t axis_val = analogReadPin(joystick_axes[axis_index].input_pin); +# else + // default to resting position + int16_t axis_val = joystick_axes[axis_index].mid_digit; +# endif + + //test the converted value against the lower range + int32_t ref = joystick_axes[axis_index].mid_digit; + int32_t range = joystick_axes[axis_index].min_digit; + int32_t ranged_val = ((axis_val - ref) * -127) / (range - ref) ; + + if (ranged_val > 0) { + //the value is in the higher range + range = joystick_axes[axis_index].max_digit; + ranged_val = ((axis_val - ref) * 127) / (range - ref); + } + + //clamp the result in the valid range + ranged_val = ranged_val < -127 ? -127 : ranged_val; + ranged_val = ranged_val > 127 ? 127 : ranged_val; + + if (ranged_val != joystick_status.axes[axis_index]) { + joystick_status.axes[axis_index] = ranged_val; + joystick_status.status |= JS_UPDATED; + } + + // restore output, ground and input status + if (joystick_axes[axis_index].output_pin != JS_VIRTUAL_AXIS) { + restorePinState(joystick_axes[axis_index].output_pin, outputSavedState); + } + if (joystick_axes[axis_index].ground_pin != JS_VIRTUAL_AXIS) { + restorePinState(joystick_axes[axis_index].ground_pin, groundSavedState); + } + + restorePinState(joystick_axes[axis_index].input_pin, inputSavedState); + } + +#endif + return true; +} diff --git a/quantum/process_keycode/process_joystick.h b/quantum/process_keycode/process_joystick.h new file mode 100644 index 000000000..7a8b82913 --- /dev/null +++ b/quantum/process_keycode/process_joystick.h @@ -0,0 +1,11 @@ +#pragma once + +#include +#include "quantum.h" + +bool process_joystick(uint16_t keycode, keyrecord_t *record); + +void joystick_task(void); + +bool process_joystick_analogread(void); +bool process_joystick_analogread_quantum(void); diff --git a/quantum/quantum.c b/quantum/quantum.c index 9d63f4de2..dab6c9172 100644 --- a/quantum/quantum.c +++ b/quantum/quantum.c @@ -276,6 +276,9 @@ bool process_record_quantum(keyrecord_t *record) { #endif #if defined(RGBLIGHT_ENABLE) || defined(RGB_MATRIX_ENABLE) process_rgb(keycode, record) && +#endif +#ifdef JOYSTICK_ENABLE + process_joystick(keycode, record) && #endif true)) { return false; diff --git a/quantum/quantum.h b/quantum/quantum.h index 51deac0cd..a2c0ec9a2 100644 --- a/quantum/quantum.h +++ b/quantum/quantum.h @@ -142,6 +142,10 @@ extern layer_state_t layer_state; # include "process_magic.h" #endif +#ifdef JOYSTICK_ENABLE +# include "process_joystick.h" +#endif + #ifdef GRAVE_ESC_ENABLE # include "process_grave_esc.h" #endif diff --git a/quantum/quantum_keycodes.h b/quantum/quantum_keycodes.h index 437921aeb..5e7c9ad33 100644 --- a/quantum/quantum_keycodes.h +++ b/quantum/quantum_keycodes.h @@ -512,6 +512,41 @@ enum quantum_keycodes { DYN_MACRO_PLAY1, DYN_MACRO_PLAY2, + JS_BUTTON0, + JS_BUTTON_MIN = JS_BUTTON0, + JS_BUTTON1, + JS_BUTTON2, + JS_BUTTON3, + JS_BUTTON4, + JS_BUTTON5, + JS_BUTTON6, + JS_BUTTON7, + JS_BUTTON8, + JS_BUTTON9, + JS_BUTTON10, + JS_BUTTON11, + JS_BUTTON12, + JS_BUTTON13, + JS_BUTTON14, + JS_BUTTON15, + JS_BUTTON16, + JS_BUTTON17, + JS_BUTTON18, + JS_BUTTON19, + JS_BUTTON20, + JS_BUTTON21, + JS_BUTTON22, + JS_BUTTON23, + JS_BUTTON24, + JS_BUTTON25, + JS_BUTTON26, + JS_BUTTON27, + JS_BUTTON28, + JS_BUTTON29, + JS_BUTTON30, + JS_BUTTON31, + JS_BUTTON_MAX = JS_BUTTON31, + // always leave at the end SAFE_RANGE }; diff --git a/tmk_core/common/keyboard.c b/tmk_core/common/keyboard.c index 714c3d048..a45af56df 100644 --- a/tmk_core/common/keyboard.c +++ b/tmk_core/common/keyboard.c @@ -74,6 +74,9 @@ along with this program. If not, see . #ifdef MIDI_ENABLE # include "process_midi.h" #endif +#ifdef JOYSTICK_ENABLE +# include "process_joystick.h" +#endif #ifdef HD44780_ENABLE # include "hd44780.h" #endif @@ -420,6 +423,10 @@ MATRIX_LOOP_END: } #endif +#ifdef JOYSTICK_ENABLE + joystick_task(); +#endif + // update LED if (led_status != host_keyboard_leds()) { led_status = host_keyboard_leds(); diff --git a/tmk_core/common/report.h b/tmk_core/common/report.h index 1b2f13bdd..1aa33c998 100644 --- a/tmk_core/common/report.h +++ b/tmk_core/common/report.h @@ -29,7 +29,8 @@ enum hid_report_ids { REPORT_ID_MOUSE, REPORT_ID_SYSTEM, REPORT_ID_CONSUMER, - REPORT_ID_NKRO + REPORT_ID_NKRO, + REPORT_ID_JOYSTICK }; /* Mouse buttons */ @@ -189,6 +190,16 @@ typedef struct { int8_t h; } __attribute__((packed)) report_mouse_t; +typedef struct { +#if JOYSTICK_AXES_COUNT > 0 + int8_t axes[JOYSTICK_AXES_COUNT]; +#endif + +#if JOYSTICK_BUTTON_COUNT > 0 + uint8_t buttons[(JOYSTICK_BUTTON_COUNT - 1) / 8 + 1]; +#endif +} __attribute__((packed)) joystick_report_t; + /* keycode to system usage */ static inline uint16_t KEYCODE2SYSTEM(uint8_t key) { switch (key) { diff --git a/tmk_core/protocol/chibios/usb_main.c b/tmk_core/protocol/chibios/usb_main.c index 21e9f14e5..68c61cf55 100644 --- a/tmk_core/protocol/chibios/usb_main.c +++ b/tmk_core/protocol/chibios/usb_main.c @@ -47,6 +47,10 @@ extern keymap_config_t keymap_config; #endif +#ifdef JOYSTICK_ENABLE +# include "joystick.h" +#endif + /* --------------------------------------------------------- * Global interface variables and declarations * --------------------------------------------------------- @@ -246,6 +250,9 @@ typedef struct { #endif #ifdef VIRTSER_ENABLE usb_driver_config_t serial_driver; +#endif +#ifdef JOYSTICK_ENABLE + usb_driver_config_t joystick_driver; #endif }; usb_driver_config_t array[0]; @@ -283,6 +290,14 @@ static usb_driver_configs_t drivers = { # define CDC_OUT_MODE USB_EP_MODE_TYPE_BULK .serial_driver = QMK_USB_DRIVER_CONFIG(CDC, CDC_NOTIFICATION_EPNUM, false), #endif + +#ifdef JOYSTICK_ENABLE +# define JOYSTICK_IN_CAPACITY 4 +# define JOYSTICK_OUT_CAPACITY 4 +# define JOYSTICK_IN_MODE USB_EP_MODE_TYPE_BULK +# define JOYSTICK_OUT_MODE USB_EP_MODE_TYPE_BULK + .joystick_driver = QMK_USB_DRIVER_CONFIG(JOYSTICK, 0, false), +#endif }; #define NUM_USB_DRIVERS (sizeof(drivers) / sizeof(usb_driver_config_t)) @@ -867,3 +882,57 @@ void virtser_task(void) { } #endif + +#ifdef JOYSTICK_ENABLE + +void send_joystick_packet(joystick_t *joystick) { + joystick_report_t rep = { +# if JOYSTICK_AXES_COUNT > 0 + .axes = {joystick->axes[0], + +# if JOYSTICK_AXES_COUNT >= 2 + joystick->axes[1], +# endif +# if JOYSTICK_AXES_COUNT >= 3 + joystick->axes[2], +# endif +# if JOYSTICK_AXES_COUNT >= 4 + joystick->axes[3], +# endif +# if JOYSTICK_AXES_COUNT >= 5 + joystick->axes[4], +# endif +# if JOYSTICK_AXES_COUNT >= 6 + joystick->axes[5], +# endif + }, +# endif // JOYSTICK_AXES_COUNT>0 + +# if JOYSTICK_BUTTON_COUNT > 0 + .buttons = {joystick->buttons[0], + +# if JOYSTICK_BUTTON_COUNT > 8 + joystick->buttons[1], +# endif +# if JOYSTICK_BUTTON_COUNT > 16 + joystick->buttons[2], +# endif +# if JOYSTICK_BUTTON_COUNT > 24 + joystick->buttons[3], +# endif + } +# endif // JOYSTICK_BUTTON_COUNT>0 + }; + + // chnWrite(&drivers.joystick_driver.driver, (uint8_t *)&rep, sizeof(rep)); + osalSysLock(); + if (usbGetDriverStateI(&USB_DRIVER) != USB_ACTIVE) { + osalSysUnlock(); + return; + } + + usbStartTransmitI(&USB_DRIVER, JOYSTICK_IN_EPNUM, (uint8_t *)&rep, sizeof(joystick_report_t)); + osalSysUnlock(); +} + +#endif diff --git a/tmk_core/protocol/lufa/lufa.c b/tmk_core/protocol/lufa/lufa.c index 6776a964e..85603646d 100644 --- a/tmk_core/protocol/lufa/lufa.c +++ b/tmk_core/protocol/lufa/lufa.c @@ -85,6 +85,10 @@ extern keymap_config_t keymap_config; # include "raw_hid.h" #endif +#ifdef JOYSTICK_ENABLE +# include "joystick.h" +#endif + uint8_t keyboard_idle = 0; /* 0: Boot Protocol, 1: Report Protocol(default) */ uint8_t keyboard_protocol = 1; @@ -263,6 +267,66 @@ static void Console_Task(void) { } #endif +/******************************************************************************* + * Joystick + ******************************************************************************/ +#ifdef JOYSTICK_ENABLE +void send_joystick_packet(joystick_t *joystick) { + uint8_t timeout = 255; + + joystick_report_t r = { +# if JOYSTICK_AXES_COUNT > 0 + .axes = {joystick->axes[0], + +# if JOYSTICK_AXES_COUNT >= 2 + joystick->axes[1], +# endif +# if JOYSTICK_AXES_COUNT >= 3 + joystick->axes[2], +# endif +# if JOYSTICK_AXES_COUNT >= 4 + joystick->axes[3], +# endif +# if JOYSTICK_AXES_COUNT >= 5 + joystick->axes[4], +# endif +# if JOYSTICK_AXES_COUNT >= 6 + joystick->axes[5], +# endif + }, +# endif // JOYSTICK_AXES_COUNT>0 + +# if JOYSTICK_BUTTON_COUNT > 0 + .buttons = {joystick->buttons[0], + +# if JOYSTICK_BUTTON_COUNT > 8 + joystick->buttons[1], +# endif +# if JOYSTICK_BUTTON_COUNT > 16 + joystick->buttons[2], +# endif +# if JOYSTICK_BUTTON_COUNT > 24 + joystick->buttons[3], +# endif + } +# endif // JOYSTICK_BUTTON_COUNT>0 + }; + + /* Select the Joystick Report Endpoint */ + Endpoint_SelectEndpoint(JOYSTICK_IN_EPNUM); + + /* Check if write ready for a polling interval around 10ms */ + while (timeout-- && !Endpoint_IsReadWriteAllowed()) _delay_us(40); + if (!Endpoint_IsReadWriteAllowed()) return; + + /* Write Joystick Report Data */ + Endpoint_Write_Stream_LE(&r, sizeof(joystick_report_t), NULL); + + /* Finalize the stream transfer to send the last packet */ + Endpoint_ClearIN(); +} +#endif + /******************************************************************************* * USB Events ******************************************************************************/ @@ -411,6 +475,9 @@ void EVENT_USB_Device_ConfigurationChanged(void) { ConfigSuccess &= Endpoint_ConfigureEndpoint((CDC_OUT_EPNUM | ENDPOINT_DIR_OUT), EP_TYPE_BULK, CDC_EPSIZE, 1); ConfigSuccess &= Endpoint_ConfigureEndpoint((CDC_IN_EPNUM | ENDPOINT_DIR_IN), EP_TYPE_BULK, CDC_EPSIZE, 1); #endif +#ifdef JOYSTICK_ENABLE + ConfigSuccess &= ENDPOINT_CONFIG(JOYSTICK_IN_EPNUM, EP_TYPE_INTERRUPT, ENDPOINT_DIR_IN, JOYSTICK_EPSIZE, ENDPOINT_BANK_SINGLE); +#endif } /* FIXME: Expose this table in the docs somehow diff --git a/tmk_core/protocol/usb_descriptor.c b/tmk_core/protocol/usb_descriptor.c index bcca24586..f5d32445d 100644 --- a/tmk_core/protocol/usb_descriptor.c +++ b/tmk_core/protocol/usb_descriptor.c @@ -279,6 +279,63 @@ const USB_Descriptor_HIDReport_Datatype_t PROGMEM ConsoleReport[] = { }; #endif +#ifdef JOYSTICK_ENABLE +# if JOYSTICK_AXES_COUNT == 0 && JOYSTICK_BUTTON_COUNT == 0 +# error Need at least one axis or button for joystick +# endif +const USB_Descriptor_HIDReport_Datatype_t PROGMEM JoystickReport[] = { + HID_RI_USAGE_PAGE(8, 0x01), // Generic Desktop + HID_RI_USAGE(8, 0x04), // Joystick + HID_RI_COLLECTION(8, 0x01), // Application + HID_RI_COLLECTION(8, 0x00), // Physical + HID_RI_USAGE_PAGE(8, 0x01), // Generic Desktop +# if JOYSTICK_AXES_COUNT >= 1 + HID_RI_USAGE(8, 0x30), // X +# endif +# if JOYSTICK_AXES_COUNT >= 2 + HID_RI_USAGE(8, 0x31), // Y +# endif +# if JOYSTICK_AXES_COUNT >= 3 + HID_RI_USAGE(8, 0x32), // Z +# endif +# if JOYSTICK_AXES_COUNT >= 4 + HID_RI_USAGE(8, 0x33), // Rx +# endif +# if JOYSTICK_AXES_COUNT >= 5 + HID_RI_USAGE(8, 0x34), // Ry +# endif +# if JOYSTICK_AXES_COUNT >= 6 + HID_RI_USAGE(8, 0x35), // Rz +# endif +# if JOYSTICK_AXES_COUNT >= 1 + HID_RI_LOGICAL_MINIMUM(8, -127), + HID_RI_LOGICAL_MAXIMUM(8, 127), + HID_RI_REPORT_COUNT(8, JOYSTICK_AXES_COUNT), + HID_RI_REPORT_SIZE(8, 0x08), + HID_RI_INPUT(8, HID_IOF_DATA | HID_IOF_VARIABLE | HID_IOF_ABSOLUTE), +# endif + +# if JOYSTICK_BUTTON_COUNT >= 1 + HID_RI_USAGE_PAGE(8, 0x09), // Button + HID_RI_USAGE_MINIMUM(8, 0x01), + HID_RI_USAGE_MAXIMUM(8, JOYSTICK_BUTTON_COUNT), + HID_RI_LOGICAL_MINIMUM(8, 0x00), + HID_RI_LOGICAL_MAXIMUM(8, 0x01), + HID_RI_REPORT_COUNT(8, JOYSTICK_BUTTON_COUNT), + HID_RI_REPORT_SIZE(8, 0x01), + HID_RI_INPUT(8, HID_IOF_DATA | HID_IOF_VARIABLE | HID_IOF_ABSOLUTE), + +# if (JOYSTICK_BUTTON_COUNT % 8) != 0 + HID_RI_REPORT_COUNT(8, 8 - (JOYSTICK_BUTTON_COUNT % 8)), + HID_RI_REPORT_SIZE(8, 0x01), + HID_RI_INPUT(8, HID_IOF_CONSTANT), +# endif +# endif + HID_RI_END_COLLECTION(0), + HID_RI_END_COLLECTION(0) +}; +#endif + /* * Device descriptor */ @@ -288,7 +345,7 @@ const USB_Descriptor_Device_t PROGMEM DeviceDescriptor = { .Type = DTYPE_Device }, .USBSpecification = VERSION_BCD(1, 1, 0), - + #if VIRTSER_ENABLE .Class = USB_CSCP_IADDeviceClass, .SubClass = USB_CSCP_IADDeviceSubclass, @@ -813,6 +870,46 @@ const USB_Descriptor_Configuration_t PROGMEM ConfigurationDescriptor = { .PollingIntervalMS = 0x05 }, #endif + + /* + * Joystick + */ +#ifdef JOYSTICK_ENABLE + .Joystick_Interface = { + .Header = { + .Size = sizeof(USB_Descriptor_Interface_t), + .Type = DTYPE_Interface + }, + .InterfaceNumber = JOYSTICK_INTERFACE, + .AlternateSetting = 0x00, + .TotalEndpoints = 1, + .Class = HID_CSCP_HIDClass, + .SubClass = HID_CSCP_NonBootSubclass, + .Protocol = HID_CSCP_NonBootProtocol, + .InterfaceStrIndex = NO_DESCRIPTOR + }, + .Joystick_HID = { + .Header = { + .Size = sizeof(USB_HID_Descriptor_HID_t), + .Type = HID_DTYPE_HID + }, + .HIDSpec = VERSION_BCD(1, 1, 1), + .CountryCode = 0x00, + .TotalReportDescriptors = 1, + .HIDReportType = HID_DTYPE_Report, + .HIDReportLength = sizeof(JoystickReport) + }, + .Joystick_INEndpoint = { + .Header = { + .Size = sizeof(USB_Descriptor_Endpoint_t), + .Type = DTYPE_Endpoint + }, + .EndpointAddress = (ENDPOINT_DIR_IN | JOYSTICK_IN_EPNUM), + .Attributes = (EP_TYPE_INTERRUPT | ENDPOINT_ATTR_NO_SYNC | ENDPOINT_USAGE_DATA), + .EndpointSize = JOYSTICK_EPSIZE, + .PollingIntervalMS = USB_POLLING_INTERVAL_MS + } +#endif }; /* @@ -945,6 +1042,12 @@ uint16_t get_usb_descriptor(const uint16_t wValue, const uint16_t wIndex, const break; #endif +#ifdef JOYSTICK_ENABLE + case JOYSTICK_INTERFACE: + Address = &ConfigurationDescriptor.Joystick_HID; + Size = sizeof(USB_HID_Descriptor_HID_t); + break; +#endif } break; @@ -989,6 +1092,12 @@ uint16_t get_usb_descriptor(const uint16_t wValue, const uint16_t wIndex, const break; #endif +#ifdef JOYSTICK_ENABLE + case JOYSTICK_INTERFACE: + Address = &JoystickReport; + Size = sizeof(JoystickReport); + break; +#endif } break; diff --git a/tmk_core/protocol/usb_descriptor.h b/tmk_core/protocol/usb_descriptor.h index 34a85978a..79dd87014 100644 --- a/tmk_core/protocol/usb_descriptor.h +++ b/tmk_core/protocol/usb_descriptor.h @@ -123,6 +123,13 @@ typedef struct { USB_Descriptor_Endpoint_t CDC_DataOutEndpoint; USB_Descriptor_Endpoint_t CDC_DataInEndpoint; #endif + +#ifdef JOYSTICK_ENABLE + // Joystick HID Interface + USB_Descriptor_Interface_t Joystick_Interface; + USB_HID_Descriptor_HID_t Joystick_HID; + USB_Descriptor_Endpoint_t Joystick_INEndpoint; +#endif } USB_Descriptor_Configuration_t; /* @@ -164,6 +171,9 @@ enum usb_interfaces { CDI_INTERFACE, #endif +#if defined(JOYSTICK_ENABLE) + JOYSTICK_INTERFACE, +#endif TOTAL_INTERFACES }; @@ -219,6 +229,10 @@ enum usb_endpoints { CDC_IN_EPNUM = NEXT_EPNUM, CDC_OUT_EPNUM = NEXT_EPNUM, #endif +#ifdef JOYSTICK_ENABLE + JOYSTICK_IN_EPNUM = NEXT_EPNUM, + JOYSTICK_OUT_EPNUM = NEXT_EPNUM, +#endif }; #ifdef PROTOCOL_LUFA @@ -243,6 +257,7 @@ enum usb_endpoints { #define MIDI_STREAM_EPSIZE 64 #define CDC_NOTIFICATION_EPSIZE 8 #define CDC_EPSIZE 16 +#define JOYSTICK_EPSIZE 8 uint16_t get_usb_descriptor(const uint16_t wValue, const uint16_t wIndex, const void** const DescriptorAddress); #endif -- cgit v1.3.1 From e6266b19be46c1340209bdd0a6c519452d5b9f2a Mon Sep 17 00:00:00 2001 From: Drashna Jaelre Date: Mon, 27 Jul 2020 14:46:39 -0700 Subject: Initialize Layer State on startup (#8318) * Initialize Layer State on startup Right now, on startup, the default layer state gets called and set, triggering the callback functions for the default layer state. However, the normal layer state never actually gets initialized. It's set to 0 directly, by default, but the callback functions are never actually called. This creates some inconsistency in the behavior for end users. This adds a simple "clear" that triggers the callback on startup. This should produce more consisten behavior between the two functions and layer masks. * Stupid hack * Fix type casting? * Fix compile issues with magic is disabled --- tmk_core/common/action_layer.h | 6 ++++-- tmk_core/common/bootmagic.c | 2 ++ tmk_core/common/magic.c | 3 +++ 3 files changed, 9 insertions(+), 2 deletions(-) (limited to 'tmk_core') diff --git a/tmk_core/common/action_layer.h b/tmk_core/common/action_layer.h index 16922c1ff..9b9173c33 100644 --- a/tmk_core/common/action_layer.h +++ b/tmk_core/common/action_layer.h @@ -85,6 +85,8 @@ void layer_invert(uint8_t layer); void layer_or(layer_state_t state); void layer_and(layer_state_t state); void layer_xor(layer_state_t state); +layer_state_t layer_state_set_user(layer_state_t state); +layer_state_t layer_state_set_kb(layer_state_t state); #else # define layer_state 0 @@ -101,10 +103,10 @@ void layer_xor(layer_state_t state); # define layer_or(state) (void)state # define layer_and(state) (void)state # define layer_xor(state) (void)state +# define layer_state_set_kb(state) (void)state +# define layer_state_set_user(state) (void)state #endif -layer_state_t layer_state_set_user(layer_state_t state); -layer_state_t layer_state_set_kb(layer_state_t state); /* pressed actions cache */ #if !defined(NO_ACTION_LAYER) && !defined(STRICT_LAYER_RELEASE) diff --git a/tmk_core/common/bootmagic.c b/tmk_core/common/bootmagic.c index bb2aa0db8..c1b3adf94 100644 --- a/tmk_core/common/bootmagic.c +++ b/tmk_core/common/bootmagic.c @@ -122,6 +122,8 @@ void bootmagic(void) { default_layer = eeconfig_read_default_layer(); default_layer_set((layer_state_t)default_layer); } + /* Also initialize layer state to trigger callback functions for layer_state */ + layer_state_set_kb((layer_state_t)layer_state); /* EE_HANDS handedness */ if (bootmagic_scan_keycode(BOOTMAGIC_KEY_EE_HANDS_LEFT)) { diff --git a/tmk_core/common/magic.c b/tmk_core/common/magic.c index d8ab52573..e14994164 100644 --- a/tmk_core/common/magic.c +++ b/tmk_core/common/magic.c @@ -33,4 +33,7 @@ void magic(void) { uint8_t default_layer = 0; default_layer = eeconfig_read_default_layer(); default_layer_set((layer_state_t)default_layer); + + /* Also initialize layer state to trigger callback functions for layer_state */ + layer_state_set_kb((layer_state_t)layer_state); } -- cgit v1.3.1 From 12333b7c5e47f935c8e11276caebae464331df8a Mon Sep 17 00:00:00 2001 From: Ryan Date: Sat, 8 Aug 2020 10:24:29 +1000 Subject: Fix joystick compile issues (#9949) --- .../handwired/onekey/keymaps/joystick/config.h | 1 + .../handwired/onekey/keymaps/joystick/keymap.c | 21 +++++++++++---------- tmk_core/protocol/lufa/lufa.c | 4 +++- 3 files changed, 15 insertions(+), 11 deletions(-) (limited to 'tmk_core') diff --git a/keyboards/handwired/onekey/keymaps/joystick/config.h b/keyboards/handwired/onekey/keymaps/joystick/config.h index 5701d80c8..ac09aa7cf 100644 --- a/keyboards/handwired/onekey/keymaps/joystick/config.h +++ b/keyboards/handwired/onekey/keymaps/joystick/config.h @@ -1,3 +1,4 @@ #pragma once + #define JOYSTICK_AXES_COUNT 2 #define JOYSTICK_BUTTON_COUNT 1 diff --git a/keyboards/handwired/onekey/keymaps/joystick/keymap.c b/keyboards/handwired/onekey/keymaps/joystick/keymap.c index 60802f464..f427b9d77 100644 --- a/keyboards/handwired/onekey/keymaps/joystick/keymap.c +++ b/keyboards/handwired/onekey/keymaps/joystick/keymap.c @@ -7,19 +7,20 @@ #endif const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { - LAYOUT( JS_BUTTON0 ) + LAYOUT_ortho_1x1(JS_BUTTON0) }; void matrix_scan_user() { - int16_t val = (((uint32_t)timer_read()%5000 - 2500) * 255) / 5000; - if (val != joystick_status.axes[1]) { - joystick_status.axes[1] = val; - joystick_status.status |= JS_UPDATED; - } + int16_t val = (((uint32_t)timer_read() % 5000 - 2500) * 255) / 5000; + + if (val != joystick_status.axes[1]) { + joystick_status.axes[1] = val; + joystick_status.status |= JS_UPDATED; + } } -//joystick config +// Joystick config joystick_config_t joystick_axes[JOYSTICK_AXES_COUNT] = { - [0] = JOYSTICK_AXIS_IN(ADC_PIN, 0, 512, 1023) - , [1] = JOYSTICK_AXIS_VIRTUAL -}; \ No newline at end of file + [0] = JOYSTICK_AXIS_IN(ADC_PIN, 0, 512, 1023), + [1] = JOYSTICK_AXIS_VIRTUAL +}; diff --git a/tmk_core/protocol/lufa/lufa.c b/tmk_core/protocol/lufa/lufa.c index 85603646d..8410eb483 100644 --- a/tmk_core/protocol/lufa/lufa.c +++ b/tmk_core/protocol/lufa/lufa.c @@ -475,8 +475,10 @@ void EVENT_USB_Device_ConfigurationChanged(void) { ConfigSuccess &= Endpoint_ConfigureEndpoint((CDC_OUT_EPNUM | ENDPOINT_DIR_OUT), EP_TYPE_BULK, CDC_EPSIZE, 1); ConfigSuccess &= Endpoint_ConfigureEndpoint((CDC_IN_EPNUM | ENDPOINT_DIR_IN), EP_TYPE_BULK, CDC_EPSIZE, 1); #endif + #ifdef JOYSTICK_ENABLE - ConfigSuccess &= ENDPOINT_CONFIG(JOYSTICK_IN_EPNUM, EP_TYPE_INTERRUPT, ENDPOINT_DIR_IN, JOYSTICK_EPSIZE, ENDPOINT_BANK_SINGLE); + /* Setup joystick endpoint */ + ConfigSuccess &= Endpoint_ConfigureEndpoint((JOYSTICK_IN_EPNUM | ENDPOINT_DIR_IN), EP_TYPE_INTERRUPT, JOYSTICK_EPSIZE, 1); #endif } -- cgit v1.3.1 From d00ac5dfb6388957d51f2666d8bd223bd3529151 Mon Sep 17 00:00:00 2001 From: Sergey Vlasov Date: Wed, 12 Aug 2020 18:53:53 +0300 Subject: Add `st-flash` flash target (#9964) * Add `st-flash` flash target Add support for flashing the firmware via the `st-flash` utility from the STLink Tools package (https://github.com/stlink-org/stlink). * Add `st-flash` to the `qmk flash -b` output --- docs/flashing.md | 1 + lib/python/qmk/cli/flash.py | 1 + tmk_core/chibios.mk | 5 +++++ 3 files changed, 7 insertions(+) (limited to 'tmk_core') diff --git a/docs/flashing.md b/docs/flashing.md index 1f71c253c..5c245c567 100644 --- a/docs/flashing.md +++ b/docs/flashing.md @@ -239,3 +239,4 @@ There are a number of DFU commands that you can use to flash firmware to a STM32 * `:dfu-util-split-left` - This flashes the normal firmware, just like the default option (`:dfu-util`). However, this also configures the "Left Side" EEPROM setting for split keyboards. * `:dfu-util-split-right` - This flashes the normal firmware, just like the default option (`:dfu-util`). However, this also configures the "Right Side" EEPROM setting for split keyboards. * `:st-link-cli` - This allows you to flash the firmware via ST-LINK's CLI utility, rather than dfu-util. +* `:st-flash` - This allows you to flash the firmware via the `st-flash` utility from [STLink Tools](https://github.com/stlink-org/stlink), rather than dfu-util. diff --git a/lib/python/qmk/cli/flash.py b/lib/python/qmk/cli/flash.py index f8497071e..cefb9ca31 100644 --- a/lib/python/qmk/cli/flash.py +++ b/lib/python/qmk/cli/flash.py @@ -27,6 +27,7 @@ def print_bootloader_help(): cli.echo('\tdfu-util-split-left') cli.echo('\tdfu-util-split-right') cli.echo('\tst-link-cli') + cli.echo('\tst-flash') cli.echo('For more info, visit https://docs.qmk.fm/#/flashing') diff --git a/tmk_core/chibios.mk b/tmk_core/chibios.mk index 4e8abc9be..a218488a1 100644 --- a/tmk_core/chibios.mk +++ b/tmk_core/chibios.mk @@ -318,12 +318,14 @@ ifneq ("$(SERIAL)","") endif ST_LINK_ARGS ?= +ST_FLASH_ARGS ?= # List any extra directories to look for libraries here. EXTRALIBDIRS = $(RULESPATH)/ld DFU_UTIL ?= dfu-util ST_LINK_CLI ?= st-link_cli +ST_FLASH ?= st-flash define EXEC_DFU_UTIL until $(DFU_UTIL) -l | grep -q "Found DFU"; do\ @@ -357,6 +359,9 @@ dfu-util-split-right: dfu-util st-link-cli: $(BUILD_DIR)/$(TARGET).hex sizeafter $(ST_LINK_CLI) $(ST_LINK_ARGS) -q -c SWD -p $(BUILD_DIR)/$(TARGET).hex -Rst +st-flash: $(BUILD_DIR)/$(TARGET).hex sizeafter + $(ST_FLASH) $(ST_FLASH_ARGS) --reset --format ihex write $(BUILD_DIR)/$(TARGET).hex + # Autodetect teensy loader ifndef TEENSY_LOADER_CLI -- cgit v1.3.1 From 167daa9cf8c6376a1c9b92ae7dfaa8bdac21f62a Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Sun, 16 Aug 2020 06:51:35 +1000 Subject: Add ability to dump all makefile variables for the specified target. (#8256) --- tmk_core/rules.mk | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'tmk_core') diff --git a/tmk_core/rules.mk b/tmk_core/rules.mk index 9bb341ecb..a7053d185 100644 --- a/tmk_core/rules.mk +++ b/tmk_core/rules.mk @@ -396,6 +396,12 @@ show_path: @echo SRC=$(SRC) @echo OBJ=$(OBJ) +dump_vars: ERROR_IF_EMPTY="" +dump_vars: ERROR_IF_NONBOOL="" +dump_vars: ERROR_IF_UNSET="" +dump_vars: + @$(foreach V,$(sort $(.VARIABLES)),$(if $(filter-out environment% default automatic,$(origin $V)),$(info $V=$($V)))) + objs-size: for i in $(OBJ); do echo $$i; done | sort | xargs $(SIZE) @@ -436,7 +442,7 @@ $(eval $(foreach OUTPUT,$(OUTPUTS),$(shell mkdir -p $(OUTPUT) 2>/dev/null))) # Listing of phony targets. -.PHONY : all finish sizebefore sizeafter qmkversion \ +.PHONY : all dump_vars finish sizebefore sizeafter qmkversion \ gccversion build elf hex eep lss sym coff extcoff \ clean clean_list debug gdb-config show_path \ program teensy dfu dfu-ee dfu-start \ -- cgit v1.3.1 From 47f8947bf5aa3ff1cbb484a2d6dc3fa818987700 Mon Sep 17 00:00:00 2001 From: yiancar Date: Wed, 19 Aug 2020 02:16:35 +0100 Subject: Update vusb to match 3rd endpoint. (#9020) * Update vusb to match 3rd endpoint. - With the addition of https://github.com/qmk/v-usb/pull/1 a 3rd endpoint (endpoint4) becomes available. - We can assign mouse/extrakeys to that endpoint as its a desirable feature and leave rawhid and console to compete for the 2nd endpoint. NOTE: The version of vusb.c in future branch is older than master. Just remember that it will need a #error if both raw_hid and console are enabled at the same time. * Final Fixes * Update tmk_core/protocol/vusb/vusb.c * Update tmk_core/protocol/vusb/vusb.c * Update tmk_core/protocol/vusb/usbconfig.h * Update tmk_core/protocol/vusb/usbconfig.h * Update tmk_core/protocol/vusb/usbconfig.h * Update tmk_core/protocol/vusb/usbconfig.h * Updated vusb submodule to latest commit --- lib/vusb | 2 +- tmk_core/protocol/vusb/usbconfig.h | 20 +++++++++++++++----- tmk_core/protocol/vusb/vusb.c | 18 +++++++++++------- 3 files changed, 27 insertions(+), 13 deletions(-) (limited to 'tmk_core') diff --git a/lib/vusb b/lib/vusb index 9a42d205e..bdb53e4c0 160000 --- a/lib/vusb +++ b/lib/vusb @@ -1 +1 @@ -Subproject commit 9a42d205eb60faca494ff4eabce8d59f0ec0fc7f +Subproject commit bdb53e4c043d089279d9891b68bea77614cb97ee diff --git a/tmk_core/protocol/vusb/usbconfig.h b/tmk_core/protocol/vusb/usbconfig.h index dcef7584c..041f7bd09 100644 --- a/tmk_core/protocol/vusb/usbconfig.h +++ b/tmk_core/protocol/vusb/usbconfig.h @@ -85,9 +85,19 @@ section at the end of this file). /* If the so-called endpoint 3 is used, it can now be configured to any other * endpoint number (except 0) with this macro. Default if undefined is 3. */ +#define USB_CFG_HAVE_INTRIN_ENDPOINT4 1 +/* Define this to 1 if you want to compile a version with three endpoints: The + * default control endpoint 0, an interrupt-in endpoint 4 (or the number + * configured below) and a catch-all default interrupt-in endpoint as above. + * You must also define USB_CFG_HAVE_INTRIN_ENDPOINT to 1 for this feature. + */ +#define USB_CFG_EP4_NUMBER 4 +/* If the so-called endpoint 4 is used, it can now be configured to any other + * endpoint number (except 0) with this macro. Default if undefined is 4. + */ /* #define USB_INITIAL_DATATOKEN USBPID_DATA1 */ /* The above macro defines the startup condition for data toggling on the - * interrupt/bulk endpoints 1 and 3. Defaults to USBPID_DATA1. + * interrupt/bulk endpoints 1, 3 and 4. Defaults to USBPID_DATA1. * Since the token is toggled BEFORE sending any data, the first packet is * sent with the oposite value of this configuration! */ @@ -100,10 +110,10 @@ section at the end of this file). #define USB_CFG_SUPPRESS_INTR_CODE 0 /* Define this to 1 if you want to declare interrupt-in endpoints, but don't * want to send any data over them. If this macro is defined to 1, functions - * usbSetInterrupt() and usbSetInterrupt3() are omitted. This is useful if - * you need the interrupt-in endpoints in order to comply to an interface - * (e.g. HID), but never want to send any data. This option saves a couple - * of bytes in flash memory and the transmit buffers in RAM. + * usbSetInterrupt(), usbSetInterrupt3() and usbSetInterrupt4() are omitted. + * This is useful if you need the interrupt-in endpoints in order to comply + * to an interface (e.g. HID), but never want to send any data. This option + * saves a couple of bytes in flash memory and the transmit buffers in RAM. */ #define USB_CFG_IS_SELF_POWERED 0 /* Define this to 1 if the device has its own power supply. Set it to 0 if the diff --git a/tmk_core/protocol/vusb/vusb.c b/tmk_core/protocol/vusb/vusb.c index 735a1c1d3..77bbbd7bd 100644 --- a/tmk_core/protocol/vusb/vusb.c +++ b/tmk_core/protocol/vusb/vusb.c @@ -62,12 +62,16 @@ enum usb_interfaces { TOTAL_INTERFACES = NEXT_INTERFACE }; -#define MAX_INTERFACES 2 +#define MAX_INTERFACES 3 #if (NEXT_INTERFACE - 1) > MAX_INTERFACES # error There are not enough available interfaces to support all functions. Please disable one or more of the following: Mouse Keys, Extra Keys, Raw HID, Console #endif +#if (defined(MOUSE_ENABLE) || defined(EXTRAKEY_ENABLE)) && CONSOLE_ENABLE +# error Mouse/Extra Keys share an endpoint with Console. Please disable one of the two. +#endif + static uint8_t keyboard_led_state = 0; static uint8_t vusb_idle_rate = 0; @@ -116,16 +120,16 @@ void raw_hid_send(uint8_t *data, uint8_t length) { uint8_t *temp = data; for (uint8_t i = 0; i < 4; i++) { - while (!usbInterruptIsReady3()) { + while (!usbInterruptIsReady4()) { usbPoll(); } - usbSetInterrupt3(temp, 8); + usbSetInterrupt4(temp, 8); temp += 8; } - while (!usbInterruptIsReady3()) { + while (!usbInterruptIsReady4()) { usbPoll(); } - usbSetInterrupt3(0, 0); + usbSetInterrupt4(0, 0); } __attribute__((weak)) void raw_hid_receive(uint8_t *data, uint8_t length) { @@ -683,7 +687,7 @@ const PROGMEM usbConfigurationDescriptor_t usbConfigurationDescriptor = { .bLength = sizeof(usbEndpointDescriptor_t), .bDescriptorType = USBDESCR_ENDPOINT }, - .bEndpointAddress = (USBRQ_DIR_DEVICE_TO_HOST | USB_CFG_EP3_NUMBER), + .bEndpointAddress = (USBRQ_DIR_DEVICE_TO_HOST | USB_CFG_EP4_NUMBER), .bmAttributes = 0x03, .wMaxPacketSize = RAW_EPSIZE, .bInterval = USB_POLLING_INTERVAL_MS @@ -693,7 +697,7 @@ const PROGMEM usbConfigurationDescriptor_t usbConfigurationDescriptor = { .bLength = sizeof(usbEndpointDescriptor_t), .bDescriptorType = USBDESCR_ENDPOINT }, - .bEndpointAddress = (USBRQ_DIR_HOST_TO_DEVICE | USB_CFG_EP3_NUMBER), + .bEndpointAddress = (USBRQ_DIR_HOST_TO_DEVICE | USB_CFG_EP4_NUMBER), .bmAttributes = 0x03, .wMaxPacketSize = RAW_EPSIZE, .bInterval = USB_POLLING_INTERVAL_MS -- cgit v1.3.1 From 3f392c09b60d46d9e4a4d3cc150a26294dea4da7 Mon Sep 17 00:00:00 2001 From: Ryan Date: Wed, 19 Aug 2020 22:46:15 +1000 Subject: More Bluetooth refactoring (#9905) --- tmk_core/common/progmem.h | 1 + tmk_core/protocol/lufa/adafruit_ble.h | 23 +++++++++++------------ tmk_core/protocol/lufa/outputselect.c | 14 ++++++++++++-- tmk_core/protocol/lufa/outputselect.h | 6 +++++- tmk_core/protocol/serial.h | 5 +---- 5 files changed, 30 insertions(+), 19 deletions(-) (limited to 'tmk_core') diff --git a/tmk_core/common/progmem.h b/tmk_core/common/progmem.h index 39a918fe9..41b5b537c 100644 --- a/tmk_core/common/progmem.h +++ b/tmk_core/common/progmem.h @@ -4,6 +4,7 @@ # include #else # define PROGMEM +# define PGM_P const char * # define memcpy_P(dest, src, n) memcpy(dest, src, n) # define pgm_read_byte(address_short) *((uint8_t*)(address_short)) # define pgm_read_word(address_short) *((uint16_t*)(address_short)) diff --git a/tmk_core/protocol/lufa/adafruit_ble.h b/tmk_core/protocol/lufa/adafruit_ble.h index cef46fe9f..aebded7b3 100644 --- a/tmk_core/protocol/lufa/adafruit_ble.h +++ b/tmk_core/protocol/lufa/adafruit_ble.h @@ -2,18 +2,19 @@ * Author: Wez Furlong, 2016 * Supports the Adafruit BLE board built around the nRF51822 chip. */ + #pragma once -#ifdef MODULE_ADAFRUIT_BLE -# include -# include -# include -# include "config_common.h" -# include "progmem.h" +#include +#include +#include + +#include "config_common.h" +#include "progmem.h" -# ifdef __cplusplus +#ifdef __cplusplus extern "C" { -# endif +#endif /* Instruct the module to enable HID keyboard support and reset */ extern bool adafruit_ble_enable_keyboard(void); @@ -54,8 +55,6 @@ extern uint32_t adafruit_ble_read_battery_voltage(void); extern bool adafruit_ble_set_mode_leds(bool on); extern bool adafruit_ble_set_power_level(int8_t level); -# ifdef __cplusplus +#ifdef __cplusplus } -# endif - -#endif // MODULE_ADAFRUIT_BLE +#endif diff --git a/tmk_core/protocol/lufa/outputselect.c b/tmk_core/protocol/lufa/outputselect.c index b115ea969..f758c6528 100644 --- a/tmk_core/protocol/lufa/outputselect.c +++ b/tmk_core/protocol/lufa/outputselect.c @@ -12,8 +12,12 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ -#include "lufa.h" #include "outputselect.h" + +#if defined(PROTOCOL_LUFA) +# include "lufa.h" +#endif + #ifdef MODULE_ADAFRUIT_BLE # include "adafruit_ble.h" #endif @@ -35,12 +39,18 @@ void set_output(uint8_t output) { */ __attribute__((weak)) void set_output_user(uint8_t output) {} +static bool is_usb_configured(void) { +#if defined(PROTOCOL_LUFA) + return USB_DeviceState == DEVICE_STATE_Configured; +#endif +} + /** \brief Auto Detect Output * * FIXME: Needs doc */ uint8_t auto_detect_output(void) { - if (USB_DeviceState == DEVICE_STATE_Configured) { + if (is_usb_configured()) { return OUTPUT_USB; } diff --git a/tmk_core/protocol/lufa/outputselect.h b/tmk_core/protocol/lufa/outputselect.h index 24fe4daa2..7f7ed00b9 100644 --- a/tmk_core/protocol/lufa/outputselect.h +++ b/tmk_core/protocol/lufa/outputselect.h @@ -12,6 +12,10 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ +#pragma once + +#include + enum outputs { OUTPUT_AUTO, @@ -37,4 +41,4 @@ enum outputs { void set_output(uint8_t output); void set_output_user(uint8_t output); uint8_t auto_detect_output(void); -uint8_t where_to_send(void); \ No newline at end of file +uint8_t where_to_send(void); diff --git a/tmk_core/protocol/serial.h b/tmk_core/protocol/serial.h index 93ac99898..b70d117d7 100644 --- a/tmk_core/protocol/serial.h +++ b/tmk_core/protocol/serial.h @@ -35,13 +35,10 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef SERIAL_H -#define SERIAL_H +#pragma once /* host role */ void serial_init(void); uint8_t serial_recv(void); int16_t serial_recv2(void); void serial_send(uint8_t data); - -#endif -- cgit v1.3.1 From 92385b3fb617326b129609726020453c8949c7f8 Mon Sep 17 00:00:00 2001 From: Drashna Jaelre Date: Sat, 22 Aug 2020 01:21:06 -0700 Subject: Better handle LTO_ENABLE (#9832) * Better handle LTO_ENABLE Especially when calling from command line * Replace LINK_TIME_OPTIMIZATION_ENABLE with LTO_ENABLE * Remove long for LTO from show_options.mk --- docs/config_options.md | 4 +--- docs/ja/config_options.md | 4 +--- keyboards/1upkeyboards/sweet16/v1/rules.mk | 2 +- keyboards/1upkeyboards/sweet16/v2/promicro/rules.mk | 2 +- keyboards/bm60rgb/rules.mk | 2 +- keyboards/clueboard/66/keymaps/via/rules.mk | 2 +- keyboards/clueboard/card/rules.mk | 2 +- keyboards/converter/usb_usb/keymaps/chriskopher/rules.mk | 2 +- keyboards/crkbd/keymaps/ninjonas/rules.mk | 2 +- keyboards/crkbd/keymaps/rpbaptist/rules.mk | 2 +- keyboards/dz60/keymaps/via/rules.mk | 2 +- keyboards/dztech/dz60rgb/keymaps/xunz/rules.mk | 3 +-- keyboards/dztech/dz65rgb/keymaps/chocol8/rules.mk | 3 +-- keyboards/dztech/dz65rgb/keymaps/matthewrobo/rules.mk | 3 +-- keyboards/ergodox_ez/keymaps/hacker_dvorak/rules.mk | 2 +- keyboards/ergodox_ez/keymaps/nathanvercaemert/rules.mk | 2 +- keyboards/flx/virgo/rules.mk | 3 +-- keyboards/gray_studio/think65/hotswap/rules.mk | 2 +- keyboards/gray_studio/think65/solder/rules.mk | 2 +- keyboards/handwired/promethium/rules.mk | 2 +- keyboards/helix/pico/keymaps/biacco/rules.mk | 2 +- keyboards/helix/pico/keymaps/default/rules.mk | 2 +- keyboards/helix/pico/keymaps/mtei/rules.mk | 2 +- keyboards/helix/pico/local_features.mk | 6 +++--- keyboards/helix/rev2/keymaps/default/rules.mk | 2 +- keyboards/helix/rev2/keymaps/edvorakjp/rules.mk | 2 +- keyboards/helix/rev2/keymaps/five_rows/rules.mk | 2 +- keyboards/helix/rev2/keymaps/five_rows_jis/rules.mk | 2 +- keyboards/helix/rev2/keymaps/froggy/rules.mk | 2 +- keyboards/helix/rev2/keymaps/froggy_106/rules.mk | 2 +- keyboards/helix/rev2/keymaps/led_test/rules.mk | 2 +- keyboards/helix/rev2/keymaps/yshrsmz/rules.mk | 2 +- keyboards/helix/rev2/local_features.mk | 2 +- keyboards/hineybush/h88/rules.mk | 2 +- keyboards/hotdox/keymaps/ninjonas/rules.mk | 2 +- keyboards/id80/keymaps/via/rules.mk | 2 +- keyboards/kc60/keymaps/noroadsleft/rules.mk | 2 +- keyboards/keebio/bdn9/keymaps/via/rules.mk | 2 +- keyboards/keebio/iris/keymaps/pvinis/rules.mk | 2 +- keyboards/keebio/iris/keymaps/via/rules.mk | 2 +- keyboards/keebio/quefrency/keymaps/drashna_ms/rules.mk | 2 +- keyboards/keebio/quefrency/keymaps/via/rules.mk | 2 +- keyboards/kyria/keymaps/ninjonas/rules.mk | 4 ++-- keyboards/kyria/rules.mk | 2 +- keyboards/launchpad/keymaps/via/rules.mk | 2 +- keyboards/lily58/keymaps/ninjonas/rules.mk | 2 +- keyboards/pinky/3/keymaps/ninjonas/rules.mk | 2 +- keyboards/planck/keymaps/oryx/rules.mk | 2 +- keyboards/planck/keymaps/sascha/rules.mk | 2 +- keyboards/planck/keymaps/tylerwince/rules.mk | 2 +- keyboards/preonic/rev1/rules.mk | 2 +- keyboards/preonic/rev2/rules.mk | 2 +- keyboards/rgbkb/sol/keymaps/kageurufu/rules.mk | 3 +-- keyboards/rgbkb/sol/rev2/rules.mk | 2 +- keyboards/rgbkb/zygomorph/keymaps/5x6pad/rules.mk | 2 +- keyboards/rgbkb/zygomorph/keymaps/default/rules.mk | 2 +- keyboards/rgbkb/zygomorph/keymaps/default_oled/rules.mk | 2 +- keyboards/rgbkb/zygomorph/keymaps/xulkal/rules.mk | 2 +- keyboards/tg4x/rules.mk | 2 +- keyboards/tkc/candybar/lefty/rules.mk | 2 +- keyboards/tkc/candybar/righty/rules.mk | 2 +- keyboards/v60_type_r/rules.mk | 2 +- keyboards/vitamins_included/rules.mk | 2 +- keyboards/xd004/v1/config.h | 2 +- keyboards/xd004/v1/rules.mk | 2 +- keyboards/xd84/rules.mk | 2 +- keyboards/xd96/rules.mk | 2 +- keyboards/yushakobo/quick7/config.h | 2 +- show_options.mk | 3 +-- tmk_core/common.mk | 9 +++------ tmk_core/common/action.h | 2 +- tmk_core/common/command.c | 2 +- users/bcat/rules.mk | 2 +- users/dshields/rules.mk | 3 +-- users/issmirnov/rules.mk | 2 +- users/kuchosauronad0/rules.mk | 4 ++-- users/pvinis/rules.mk | 2 +- users/yanfali/rules.mk | 2 +- users/yet-another-developer/rules.mk | 2 +- 79 files changed, 85 insertions(+), 99 deletions(-) (limited to 'tmk_core') diff --git a/docs/config_options.md b/docs/config_options.md index 81a3b4b61..a323741c2 100644 --- a/docs/config_options.md +++ b/docs/config_options.md @@ -324,11 +324,9 @@ This is a [make](https://www.gnu.org/software/make/manual/make.html) file that i ``` * `LAYOUTS` * A list of [layouts](feature_layouts.md) this keyboard supports. -* `LINK_TIME_OPTIMIZATION_ENABLE` +* `LTO_ENABLE` * Enables Link Time Optimization (LTO) when compiling the keyboard. This makes the process take longer, but it can significantly reduce the compiled size (and since the firmware is small, the added time is not noticeable). However, this will automatically disable the legacy TMK Macros and Functions features, as these break when LTO is enabled. It does this by automatically defining `NO_ACTION_MACRO` and `NO_ACTION_FUNCTION`. (Note: This does not affect QMK [Macros](feature_macros.md) and [Layers](feature_layers.md).) -* `LTO_ENABLE` - * Has the same meaning as `LINK_TIME_OPTIMIZATION_ENABLE`. You can use `LTO_ENABLE` instead of `LINK_TIME_OPTIMIZATION_ENABLE`. ## AVR MCU Options * `MCU = atmega32u4` diff --git a/docs/ja/config_options.md b/docs/ja/config_options.md index b4cf3c888..6ba7f6f1f 100644 --- a/docs/ja/config_options.md +++ b/docs/ja/config_options.md @@ -322,11 +322,9 @@ QMK での全ての利用可能な設定にはデフォルトがあります。 ``` * `LAYOUTS` * このキーボードがサポートする[レイアウト](ja/feature_layouts.md)のリスト -* `LINK_TIME_OPTIMIZATION_ENABLE` +* `LTO_ENABLE` * キーボードをコンパイルする時に、Link Time Optimization (LTO) を有効にします。これは処理に時間が掛かりますが、コンパイルされたサイズを大幅に減らします (そして、ファームウェアが小さいため、追加の時間は分からないくらいです)。 ただし、LTO が有効な場合、古い TMK のマクロと関数の機能が壊れるため、自動的にこれらの機能を無効にします。これは `NO_ACTION_MACRO` と `NO_ACTION_FUNCTION` を自動的に定義することで行われます。(メモ: これは QMK の [マクロ](ja/feature_macros.md) と [レイヤー](ja/feature_layers.md) には影響を与えません。) -* `LTO_ENABLE` - * LINK_TIME_OPTIMIZATION_ENABLE と同じ意味です。`LINK_TIME_OPTIMIZATION_ENABLE` の代わりに `LTO_ENABLE` を使うことができます。 ## AVR MCU オプション * `MCU = atmega32u4` diff --git a/keyboards/1upkeyboards/sweet16/v1/rules.mk b/keyboards/1upkeyboards/sweet16/v1/rules.mk index 09bd9e9e2..4c4280cdd 100644 --- a/keyboards/1upkeyboards/sweet16/v1/rules.mk +++ b/keyboards/1upkeyboards/sweet16/v1/rules.mk @@ -14,4 +14,4 @@ BOOTLOADER = caterina RGBLIGHT_ENABLE = yes BACKLIGHT_ENABLE = no # Enable keyboard backlight functionality -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes diff --git a/keyboards/1upkeyboards/sweet16/v2/promicro/rules.mk b/keyboards/1upkeyboards/sweet16/v2/promicro/rules.mk index 9f38504a8..16510f767 100644 --- a/keyboards/1upkeyboards/sweet16/v2/promicro/rules.mk +++ b/keyboards/1upkeyboards/sweet16/v2/promicro/rules.mk @@ -18,4 +18,4 @@ CONSOLE_ENABLE = yes RGBLIGHT_ENABLE = no ENCODER_ENABLE = yes -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes diff --git a/keyboards/bm60rgb/rules.mk b/keyboards/bm60rgb/rules.mk index 72bfd539d..d888399cf 100644 --- a/keyboards/bm60rgb/rules.mk +++ b/keyboards/bm60rgb/rules.mk @@ -31,7 +31,7 @@ BLUETOOTH_ENABLE = no # Enable Bluetooth with the Adafruit EZ-Key HID AUDIO_ENABLE = no # Audio output on port C6 FAUXCLICKY_ENABLE = no # Use buzzer to emulate clicky switches RGB_MATRIX_ENABLE = WS2812 -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes # partially generated by KBFirmware JSON to QMK Parser # https://noroadsleft.github.io/kbf_qmk_converter/ diff --git a/keyboards/clueboard/66/keymaps/via/rules.mk b/keyboards/clueboard/66/keymaps/via/rules.mk index e85bff468..7a4971950 100644 --- a/keyboards/clueboard/66/keymaps/via/rules.mk +++ b/keyboards/clueboard/66/keymaps/via/rules.mk @@ -1,4 +1,4 @@ # rules.mk overrides to enable VIA VIA_ENABLE = yes -LINK_TIME_OPTIMIZATION_ENABLE = yes \ No newline at end of file +LTO_ENABLE = yes diff --git a/keyboards/clueboard/card/rules.mk b/keyboards/clueboard/card/rules.mk index 37d1d866e..a1b003f29 100644 --- a/keyboards/clueboard/card/rules.mk +++ b/keyboards/clueboard/card/rules.mk @@ -26,4 +26,4 @@ UNICODE_ENABLE = no # Unicode BLUETOOTH_ENABLE = no # Enable Bluetooth with the Adafruit EZ-Key HID AUDIO_ENABLE = yes # Audio output on port C6 -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes diff --git a/keyboards/converter/usb_usb/keymaps/chriskopher/rules.mk b/keyboards/converter/usb_usb/keymaps/chriskopher/rules.mk index d80022853..643e1d013 100644 --- a/keyboards/converter/usb_usb/keymaps/chriskopher/rules.mk +++ b/keyboards/converter/usb_usb/keymaps/chriskopher/rules.mk @@ -19,6 +19,6 @@ EXTRAKEY_ENABLE = yes # Used for audio control and system control keys COMBO_ENABLE = yes # Used to allow chording of keys to trigger an action TAP_DANCE_ENABLE = yes # Used to allow multiple taps of a key to perform different actions -LINK_TIME_OPTIMIZATION_ENABLE = yes # Reduces the compiled firmware size +LTO_ENABLE = yes # Reduces the compiled firmware size SRC += combo.c tap_dance.c diff --git a/keyboards/crkbd/keymaps/ninjonas/rules.mk b/keyboards/crkbd/keymaps/ninjonas/rules.mk index 95cc3fed3..0c7fb3afc 100644 --- a/keyboards/crkbd/keymaps/ninjonas/rules.mk +++ b/keyboards/crkbd/keymaps/ninjonas/rules.mk @@ -1,7 +1,7 @@ RGB_MATRIX_ENABLE = WS2812 MOUSEKEY_ENABLE = no OLED_DRIVER_ENABLE = yes -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes # Do not enable SLEEP_LED_ENABLE. it uses the same timer as BACKLIGHT_ENABLE SLEEP_LED_ENABLE = no # Breathing sleep LED during USB suspend diff --git a/keyboards/crkbd/keymaps/rpbaptist/rules.mk b/keyboards/crkbd/keymaps/rpbaptist/rules.mk index d9e8b701e..dedd5753e 100644 --- a/keyboards/crkbd/keymaps/rpbaptist/rules.mk +++ b/keyboards/crkbd/keymaps/rpbaptist/rules.mk @@ -1,5 +1,5 @@ #This enables Link Time Optimization.This can save a good chunk of space(several KB for me), but the macro and function... functions cause it to error out. -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes #Build Options #change to "no" to disable the options, or define them in the Makefile in diff --git a/keyboards/dz60/keymaps/via/rules.mk b/keyboards/dz60/keymaps/via/rules.mk index ea9a831e1..ca9fed0e6 100644 --- a/keyboards/dz60/keymaps/via/rules.mk +++ b/keyboards/dz60/keymaps/via/rules.mk @@ -1,2 +1,2 @@ -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes VIA_ENABLE = yes diff --git a/keyboards/dztech/dz60rgb/keymaps/xunz/rules.mk b/keyboards/dztech/dz60rgb/keymaps/xunz/rules.mk index 7a77be493..d12c8dc44 100644 --- a/keyboards/dztech/dz60rgb/keymaps/xunz/rules.mk +++ b/keyboards/dztech/dz60rgb/keymaps/xunz/rules.mk @@ -1,5 +1,4 @@ NKRO_ENABLE = yes # USB Nkey Rollover # VELOCIKEY_ENABLE = yes -LINK_TIME_OPTIMIZATION_ENABLE = yes - +LTO_ENABLE = yes diff --git a/keyboards/dztech/dz65rgb/keymaps/chocol8/rules.mk b/keyboards/dztech/dz65rgb/keymaps/chocol8/rules.mk index 626329f81..1778a5e14 100644 --- a/keyboards/dztech/dz65rgb/keymaps/chocol8/rules.mk +++ b/keyboards/dztech/dz65rgb/keymaps/chocol8/rules.mk @@ -2,5 +2,4 @@ NKRO_ENABLE = yes # USB Nkey Rollover VELOCIKEY_ENABLE = yes # AUTO_SHIFT_ENABLE = yes # Auto Shift -LINK_TIME_OPTIMIZATION_ENABLE = yes - +LTO_ENABLE = yes diff --git a/keyboards/dztech/dz65rgb/keymaps/matthewrobo/rules.mk b/keyboards/dztech/dz65rgb/keymaps/matthewrobo/rules.mk index 9a75bb29d..29afe8cd0 100644 --- a/keyboards/dztech/dz65rgb/keymaps/matthewrobo/rules.mk +++ b/keyboards/dztech/dz65rgb/keymaps/matthewrobo/rules.mk @@ -2,5 +2,4 @@ NKRO_ENABLE = yes # USB Nkey Rollover AUTO_SHIFT_ENABLE = yes # Auto Shift # VELOCIKEY_ENABLE = yes -LINK_TIME_OPTIMIZATION_ENABLE = yes - +LTO_ENABLE = yes diff --git a/keyboards/ergodox_ez/keymaps/hacker_dvorak/rules.mk b/keyboards/ergodox_ez/keymaps/hacker_dvorak/rules.mk index aa13f98bd..2eda18ce4 100644 --- a/keyboards/ergodox_ez/keymaps/hacker_dvorak/rules.mk +++ b/keyboards/ergodox_ez/keymaps/hacker_dvorak/rules.mk @@ -1,7 +1,7 @@ # Set any rules.mk overrides for your specific keymap here. # See rules at https://docs.qmk.fm/#/config_options?id=the-rulesmk-file -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes NKRO_ENABLE = yes # USB Nkey Rollover - if this doesn't work, see here: https://github.com/tmk/tmk_keyboard/wiki/FAQ#nkro-doesnt-work TAP_DANCE_ENABLE = yes MOUSEKEY_ENABLE = yes # Mouse keys(+4700b). diff --git a/keyboards/ergodox_ez/keymaps/nathanvercaemert/rules.mk b/keyboards/ergodox_ez/keymaps/nathanvercaemert/rules.mk index b41c275dd..31c3fe3c7 100644 --- a/keyboards/ergodox_ez/keymaps/nathanvercaemert/rules.mk +++ b/keyboards/ergodox_ez/keymaps/nathanvercaemert/rules.mk @@ -1,6 +1,6 @@ # Set any rules.mk overrides for your specific keymap here. # See rules at https://docs.qmk.fm/#/config_options?id=the-rulesmk-file -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes COMMAND_ENABLE = no RGBLIGHT_ENABLE = no TAP_DANCE_ENABLE=yes diff --git a/keyboards/flx/virgo/rules.mk b/keyboards/flx/virgo/rules.mk index 529d365b5..cbf45a2b9 100644 --- a/keyboards/flx/virgo/rules.mk +++ b/keyboards/flx/virgo/rules.mk @@ -30,5 +30,4 @@ UNICODE_ENABLE = no # Unicode BLUETOOTH_ENABLE = no # Enable Bluetooth with the Adafruit EZ-Key HID AUDIO_ENABLE = no # Audio output on port C6 FAUXCLICKY_ENABLE = no # Use buzzer to emulate clicky switches -LINK_TIME_OPTIMIZATION_ENABLE = yes - +LTO_ENABLE = yes diff --git a/keyboards/gray_studio/think65/hotswap/rules.mk b/keyboards/gray_studio/think65/hotswap/rules.mk index 2d789ff59..5f85ff18a 100644 --- a/keyboards/gray_studio/think65/hotswap/rules.mk +++ b/keyboards/gray_studio/think65/hotswap/rules.mk @@ -32,7 +32,7 @@ AUDIO_ENABLE = no # Audio output on port C6 FAUXCLICKY_ENABLE = no # Use buzzer to emulate clicky switches HD44780_ENABLE = no # Enable support for HD44780 based LCDs -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes LAYOUTS = 65_ansi_blocker diff --git a/keyboards/gray_studio/think65/solder/rules.mk b/keyboards/gray_studio/think65/solder/rules.mk index 2d789ff59..5f85ff18a 100644 --- a/keyboards/gray_studio/think65/solder/rules.mk +++ b/keyboards/gray_studio/think65/solder/rules.mk @@ -32,7 +32,7 @@ AUDIO_ENABLE = no # Audio output on port C6 FAUXCLICKY_ENABLE = no # Use buzzer to emulate clicky switches HD44780_ENABLE = no # Enable support for HD44780 based LCDs -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes LAYOUTS = 65_ansi_blocker diff --git a/keyboards/handwired/promethium/rules.mk b/keyboards/handwired/promethium/rules.mk index 19d20ee03..4b96e2f69 100644 --- a/keyboards/handwired/promethium/rules.mk +++ b/keyboards/handwired/promethium/rules.mk @@ -45,4 +45,4 @@ SRC += rgbsps.c SRC += analog.c SRC += matrix.c -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes diff --git a/keyboards/helix/pico/keymaps/biacco/rules.mk b/keyboards/helix/pico/keymaps/biacco/rules.mk index 0c60c40f6..37e49977c 100644 --- a/keyboards/helix/pico/keymaps/biacco/rules.mk +++ b/keyboards/helix/pico/keymaps/biacco/rules.mk @@ -7,7 +7,7 @@ # EXTRAKEY_ENABLE = yes # Audio control and System control(+450) AUDIO_ENABLE = yes # Audio output on port B5 -LINK_TIME_OPTIMIZATION_ENABLE = no # if firmware size over limit, try this option +LTO_ENABLE = no # if firmware size over limit, try this option # Helix Spacific Build Options # you can uncomment and edit follows 6 Variables diff --git a/keyboards/helix/pico/keymaps/default/rules.mk b/keyboards/helix/pico/keymaps/default/rules.mk index c08445732..8f198e380 100644 --- a/keyboards/helix/pico/keymaps/default/rules.mk +++ b/keyboards/helix/pico/keymaps/default/rules.mk @@ -7,7 +7,7 @@ # EXTRAKEY_ENABLE = yes # Audio control and System control AUDIO_ENABLE = yes # Audio output on port B5 -LINK_TIME_OPTIMIZATION_ENABLE = no # if firmware size over limit, try this option +LTO_ENABLE = no # if firmware size over limit, try this option # Helix Spacific Build Options # you can uncomment and edit follows 6 Variables diff --git a/keyboards/helix/pico/keymaps/mtei/rules.mk b/keyboards/helix/pico/keymaps/mtei/rules.mk index 764b07300..165233f5f 100644 --- a/keyboards/helix/pico/keymaps/mtei/rules.mk +++ b/keyboards/helix/pico/keymaps/mtei/rules.mk @@ -7,7 +7,7 @@ # EXTRAKEY_ENABLE = yes # Audio control and System control(+450) AUDIO_ENABLE = yes # Audio output on port B5 -LINK_TIME_OPTIMIZATION_ENABLE = no # if firmware size over limit, try this option +LTO_ENABLE = no # if firmware size over limit, try this option # Helix Spacific Build Options # you can uncomment and edit follows 6 Variables diff --git a/keyboards/helix/pico/local_features.mk b/keyboards/helix/pico/local_features.mk index 0277a3d22..a98444686 100644 --- a/keyboards/helix/pico/local_features.mk +++ b/keyboards/helix/pico/local_features.mk @@ -106,10 +106,10 @@ endif ifeq ($(strip $(AUDIO_ENABLE)),yes) ifeq ($(strip $(RGBLIGHT_ENABLE)),yes) - LINK_TIME_OPTIMIZATION_ENABLE = yes + LTO_ENABLE = yes endif ifeq ($(strip $(OLED_ENABLE)),yes) - LINK_TIME_OPTIMIZATION_ENABLE = yes + LTO_ENABLE = yes endif endif @@ -120,7 +120,7 @@ ifneq ($(strip $(SHOW_HELIX_OPTIONS)),) $(info -- OLED_DRIVER_ENABLE = $(OLED_DRIVER_ENABLE)) $(info -- CONSOLE_ENABLE = $(CONSOLE_ENABLE)) $(info -- OPT_DEFS = $(OPT_DEFS)) - $(info -- LINK_TIME_OPTIMIZATION_ENABLE = $(LINK_TIME_OPTIMIZATION_ENABLE)) + $(info -- LTO_ENABLE = $(LTO_ENABLE)) $(info ) endif endif diff --git a/keyboards/helix/rev2/keymaps/default/rules.mk b/keyboards/helix/rev2/keymaps/default/rules.mk index 6a42fcf73..9801648de 100644 --- a/keyboards/helix/rev2/keymaps/default/rules.mk +++ b/keyboards/helix/rev2/keymaps/default/rules.mk @@ -5,7 +5,7 @@ # See TOP/keyboards/helix/rules.mk for a list of options that can be set. # See TOP/docs/config_options.md for more information. # -LINK_TIME_OPTIMIZATION_ENABLE = no # if firmware size over limit, try this option +LTO_ENABLE = no # if firmware size over limit, try this option # Helix Spacific Build Options # you can uncomment and edit follows 7 Variables diff --git a/keyboards/helix/rev2/keymaps/edvorakjp/rules.mk b/keyboards/helix/rev2/keymaps/edvorakjp/rules.mk index e30690029..18bef6bf7 100644 --- a/keyboards/helix/rev2/keymaps/edvorakjp/rules.mk +++ b/keyboards/helix/rev2/keymaps/edvorakjp/rules.mk @@ -5,7 +5,7 @@ # See TOP/keyboards/helix/rules.mk for a list of options that can be set. # See TOP/docs/config_options.md for more information. # -LINK_TIME_OPTIMIZATION_ENABLE = no # if firmware size over limit, try this option +LTO_ENABLE = no # if firmware size over limit, try this option TAP_DANCE_ENABLE = yes # Helix Spacific Build Options diff --git a/keyboards/helix/rev2/keymaps/five_rows/rules.mk b/keyboards/helix/rev2/keymaps/five_rows/rules.mk index fb564b6e0..8c4239deb 100644 --- a/keyboards/helix/rev2/keymaps/five_rows/rules.mk +++ b/keyboards/helix/rev2/keymaps/five_rows/rules.mk @@ -11,7 +11,7 @@ # yes, no +1500 # yes, yes +3200 # no, yes +400 -LINK_TIME_OPTIMIZATION_ENABLE = no # if firmware size over limit, try this option +LTO_ENABLE = no # if firmware size over limit, try this option # Helix Spacific Build Options # you can uncomment and edit follows 7 Variables diff --git a/keyboards/helix/rev2/keymaps/five_rows_jis/rules.mk b/keyboards/helix/rev2/keymaps/five_rows_jis/rules.mk index 6c2057cfd..d44382f86 100644 --- a/keyboards/helix/rev2/keymaps/five_rows_jis/rules.mk +++ b/keyboards/helix/rev2/keymaps/five_rows_jis/rules.mk @@ -5,7 +5,7 @@ # See TOP/keyboards/helix/rules.mk for a list of options that can be set. # See TOP/docs/config_options.md for more information. # -LINK_TIME_OPTIMIZATION_ENABLE = no # if firmware size over limit, try this option +LTO_ENABLE = no # if firmware size over limit, try this option # Helix Spacific Build Options # you can uncomment and edit follows 7 Variables diff --git a/keyboards/helix/rev2/keymaps/froggy/rules.mk b/keyboards/helix/rev2/keymaps/froggy/rules.mk index bea059ca1..5a0fd9a2b 100644 --- a/keyboards/helix/rev2/keymaps/froggy/rules.mk +++ b/keyboards/helix/rev2/keymaps/froggy/rules.mk @@ -5,7 +5,7 @@ # See TOP/keyboards/helix/rules.mk for a list of options that can be set. # See TOP/docs/config_options.md for more information. # -LINK_TIME_OPTIMIZATION_ENABLE = no # if firmware size over limit, try this option +LTO_ENABLE = no # if firmware size over limit, try this option # Helix Spacific Build Options # you can uncomment and edit follows 7 Variables diff --git a/keyboards/helix/rev2/keymaps/froggy_106/rules.mk b/keyboards/helix/rev2/keymaps/froggy_106/rules.mk index bea059ca1..5a0fd9a2b 100644 --- a/keyboards/helix/rev2/keymaps/froggy_106/rules.mk +++ b/keyboards/helix/rev2/keymaps/froggy_106/rules.mk @@ -5,7 +5,7 @@ # See TOP/keyboards/helix/rules.mk for a list of options that can be set. # See TOP/docs/config_options.md for more information. # -LINK_TIME_OPTIMIZATION_ENABLE = no # if firmware size over limit, try this option +LTO_ENABLE = no # if firmware size over limit, try this option # Helix Spacific Build Options # you can uncomment and edit follows 7 Variables diff --git a/keyboards/helix/rev2/keymaps/led_test/rules.mk b/keyboards/helix/rev2/keymaps/led_test/rules.mk index fb0b5a547..013ef1482 100644 --- a/keyboards/helix/rev2/keymaps/led_test/rules.mk +++ b/keyboards/helix/rev2/keymaps/led_test/rules.mk @@ -5,7 +5,7 @@ # See TOP/keyboards/helix/rules.mk for a list of options that can be set. # See TOP/docs/config_options.md for more information. # -LINK_TIME_OPTIMIZATION_ENABLE = no # if firmware size over limit, try this option +LTO_ENABLE = no # if firmware size over limit, try this option # Helix Spacific Build Options # you can uncomment and edit follows 7 Variables diff --git a/keyboards/helix/rev2/keymaps/yshrsmz/rules.mk b/keyboards/helix/rev2/keymaps/yshrsmz/rules.mk index 13d809931..83dcc9b3b 100644 --- a/keyboards/helix/rev2/keymaps/yshrsmz/rules.mk +++ b/keyboards/helix/rev2/keymaps/yshrsmz/rules.mk @@ -5,7 +5,7 @@ # See TOP/keyboards/helix/rules.mk for a list of options that can be set. # See TOP/docs/config_options.md for more information. # -LINK_TIME_OPTIMIZATION_ENABLE = no # if firmware size over limit, try this option +LTO_ENABLE = no # if firmware size over limit, try this option # Helix Spacific Build Options # you can uncomment and edit follows 7 Variables diff --git a/keyboards/helix/rev2/local_features.mk b/keyboards/helix/rev2/local_features.mk index 4b120936d..3f8a7216f 100644 --- a/keyboards/helix/rev2/local_features.mk +++ b/keyboards/helix/rev2/local_features.mk @@ -119,7 +119,7 @@ ifneq ($(strip $(SHOW_HELIX_OPTIONS)),) $(info -- OLED_DRIVER_ENABLE = $(OLED_DRIVER_ENABLE)) $(info -- CONSOLE_ENABLE = $(CONSOLE_ENABLE)) $(info -- OPT_DEFS = $(OPT_DEFS)) - $(info -- LINK_TIME_OPTIMIZATION_ENABLE = $(LINK_TIME_OPTIMIZATION_ENABLE)) + $(info -- LTO_ENABLE = $(LTO_ENABLE)) $(info ) endif endif diff --git a/keyboards/hineybush/h88/rules.mk b/keyboards/hineybush/h88/rules.mk index f39537546..3d7de2731 100644 --- a/keyboards/hineybush/h88/rules.mk +++ b/keyboards/hineybush/h88/rules.mk @@ -30,4 +30,4 @@ UNICODE_ENABLE = no # Unicode BLUETOOTH_ENABLE = no # Enable Bluetooth with the Adafruit EZ-Key HID AUDIO_ENABLE = no # Audio output on port C6 FAUXCLICKY_ENABLE = no # Use buzzer to emulate clicky switches -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes diff --git a/keyboards/hotdox/keymaps/ninjonas/rules.mk b/keyboards/hotdox/keymaps/ninjonas/rules.mk index 3ec5fb062..4da205a16 100644 --- a/keyboards/hotdox/keymaps/ninjonas/rules.mk +++ b/keyboards/hotdox/keymaps/ninjonas/rules.mk @@ -1 +1 @@ -LINK_TIME_OPTIMIZATION_ENABLE = yes \ No newline at end of file +LTO_ENABLE = yes diff --git a/keyboards/id80/keymaps/via/rules.mk b/keyboards/id80/keymaps/via/rules.mk index ea9a831e1..ca9fed0e6 100644 --- a/keyboards/id80/keymaps/via/rules.mk +++ b/keyboards/id80/keymaps/via/rules.mk @@ -1,2 +1,2 @@ -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes VIA_ENABLE = yes diff --git a/keyboards/kc60/keymaps/noroadsleft/rules.mk b/keyboards/kc60/keymaps/noroadsleft/rules.mk index c9805878d..2eab7943d 100644 --- a/keyboards/kc60/keymaps/noroadsleft/rules.mk +++ b/keyboards/kc60/keymaps/noroadsleft/rules.mk @@ -1,6 +1,6 @@ # https://github.com/qmk/qmk_firmware/issues/3448#issuecomment-406636125 # EXTRAFLAGS += -flto -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes MOUSEKEY_ENABLE = no # Mouse keys # COMMAND_ENABLE = no # Commands for debug and configuration diff --git a/keyboards/keebio/bdn9/keymaps/via/rules.mk b/keyboards/keebio/bdn9/keymaps/via/rules.mk index aa554ae29..d96967a60 100644 --- a/keyboards/keebio/bdn9/keymaps/via/rules.mk +++ b/keyboards/keebio/bdn9/keymaps/via/rules.mk @@ -1,5 +1,5 @@ VIA_ENABLE = yes -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes MOUSEKEY_ENABLE = yes CONSOLE_ENABLE = yes COMMAND_ENABLE = no diff --git a/keyboards/keebio/iris/keymaps/pvinis/rules.mk b/keyboards/keebio/iris/keymaps/pvinis/rules.mk index deeb31203..1e7e2d417 100644 --- a/keyboards/keebio/iris/keymaps/pvinis/rules.mk +++ b/keyboards/keebio/iris/keymaps/pvinis/rules.mk @@ -4,6 +4,6 @@ RGBLIGHT_ENABLE = yes # rgb leds underlight ENCODER_ENABLE = yes # rotary knob # Some extra stuff to make firmware smaller. -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes CONSOLE_ENABLE = no COMMAND_ENABLE = no diff --git a/keyboards/keebio/iris/keymaps/via/rules.mk b/keyboards/keebio/iris/keymaps/via/rules.mk index 92f9671ee..36b7ba9cb 100644 --- a/keyboards/keebio/iris/keymaps/via/rules.mk +++ b/keyboards/keebio/iris/keymaps/via/rules.mk @@ -1,2 +1,2 @@ VIA_ENABLE = yes -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes diff --git a/keyboards/keebio/quefrency/keymaps/drashna_ms/rules.mk b/keyboards/keebio/quefrency/keymaps/drashna_ms/rules.mk index 1b8b582ab..fb7f940c9 100644 --- a/keyboards/keebio/quefrency/keymaps/drashna_ms/rules.mk +++ b/keyboards/keebio/quefrency/keymaps/drashna_ms/rules.mk @@ -1,4 +1,4 @@ -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes RGBLIGHT_ENABLE = yes EXTRAKEY_ENABLE = yes AUDIO_ENABLE = yes diff --git a/keyboards/keebio/quefrency/keymaps/via/rules.mk b/keyboards/keebio/quefrency/keymaps/via/rules.mk index 540fc2ac3..4b1bcabda 100644 --- a/keyboards/keebio/quefrency/keymaps/via/rules.mk +++ b/keyboards/keebio/quefrency/keymaps/via/rules.mk @@ -1,3 +1,3 @@ VIA_ENABLE = yes CONSOLE_ENABLE = yes -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes diff --git a/keyboards/kyria/keymaps/ninjonas/rules.mk b/keyboards/kyria/keymaps/ninjonas/rules.mk index e7e4726ba..94c06b80e 100644 --- a/keyboards/kyria/keymaps/ninjonas/rules.mk +++ b/keyboards/kyria/keymaps/ninjonas/rules.mk @@ -1,6 +1,6 @@ OLED_DRIVER_ENABLE = yes # Enables the use of OLED displays ENCODER_ENABLE = yes # Enables the use of one or more encoders RGBLIGHT_ENABLE = yes # Enable keyboard RGB underglow -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes -SRC += oled.c \ No newline at end of file +SRC += oled.c diff --git a/keyboards/kyria/rules.mk b/keyboards/kyria/rules.mk index 57fbf76cf..96f76241d 100644 --- a/keyboards/kyria/rules.mk +++ b/keyboards/kyria/rules.mk @@ -31,6 +31,6 @@ AUDIO_ENABLE = no # Audio output on port C6 FAUXCLICKY_ENABLE = no # Use buzzer to emulate clicky switches HD44780_ENABLE = no # Enable support for HD44780 based LCDs SPLIT_KEYBOARD = yes # Split common -LINK_TIME_OPTIMIZATION_ENABLE =yes +LTO_ENABLE = yes DEFAULT_FOLDER = kyria/rev1 diff --git a/keyboards/launchpad/keymaps/via/rules.mk b/keyboards/launchpad/keymaps/via/rules.mk index 87843cb0d..37484844f 100644 --- a/keyboards/launchpad/keymaps/via/rules.mk +++ b/keyboards/launchpad/keymaps/via/rules.mk @@ -1,3 +1,3 @@ VIA_ENABLE = yes -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes RGBLIGHT_ENABLE = yes diff --git a/keyboards/lily58/keymaps/ninjonas/rules.mk b/keyboards/lily58/keymaps/ninjonas/rules.mk index dc3fe55bc..2cccbd077 100644 --- a/keyboards/lily58/keymaps/ninjonas/rules.mk +++ b/keyboards/lily58/keymaps/ninjonas/rules.mk @@ -1,2 +1,2 @@ OLED_DRIVER_ENABLE = yes -LINK_TIME_OPTIMIZATION_ENABLE = yes \ No newline at end of file +LTO_ENABLE = yes diff --git a/keyboards/pinky/3/keymaps/ninjonas/rules.mk b/keyboards/pinky/3/keymaps/ninjonas/rules.mk index 155f56ef9..8d32e2248 100644 --- a/keyboards/pinky/3/keymaps/ninjonas/rules.mk +++ b/keyboards/pinky/3/keymaps/ninjonas/rules.mk @@ -1,2 +1,2 @@ MOUSEKEY_ENABLE = no -LINK_TIME_OPTIMIZATION_ENABLE = yes \ No newline at end of file +LTO_ENABLE = yes diff --git a/keyboards/planck/keymaps/oryx/rules.mk b/keyboards/planck/keymaps/oryx/rules.mk index fb44d6b95..7657a3043 100644 --- a/keyboards/planck/keymaps/oryx/rules.mk +++ b/keyboards/planck/keymaps/oryx/rules.mk @@ -1,6 +1,6 @@ SRC += muse.c # Set any rules.mk overrides for your specific keymap here. # See rules at https://docs.qmk.fm/#/config_options?id=the-rulesmk-file -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes COMMAND_ENABLE = no MOUSEKEY_ENABLE = no diff --git a/keyboards/planck/keymaps/sascha/rules.mk b/keyboards/planck/keymaps/sascha/rules.mk index 57e5e2643..ac69f9dbc 100644 --- a/keyboards/planck/keymaps/sascha/rules.mk +++ b/keyboards/planck/keymaps/sascha/rules.mk @@ -1,7 +1,7 @@ AUTO_SHIFT_ENABLE = yes AUTO_SHIFT_MODIFIERS = yes UNICODE_ENABLE = yes -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes ifeq ($(strip $(KEYBOARD)), planck/rev5) BACKLIGHT_ENABLE = yes diff --git a/keyboards/planck/keymaps/tylerwince/rules.mk b/keyboards/planck/keymaps/tylerwince/rules.mk index a4f1a0b84..2c1585883 100644 --- a/keyboards/planck/keymaps/tylerwince/rules.mk +++ b/keyboards/planck/keymaps/tylerwince/rules.mk @@ -1,7 +1,7 @@ SRC += muse.c # Set any rules.mk overrides for your specific keymap here. # See rules at https://docs.qmk.fm/#/config_options?id=the-rulesmk-file -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes COMMAND_ENABLE = no MOUSEKEY_ENABLE = no TAP_DANCE_ENABLE=yes diff --git a/keyboards/preonic/rev1/rules.mk b/keyboards/preonic/rev1/rules.mk index 45edfa0b0..dea2bbbca 100644 --- a/keyboards/preonic/rev1/rules.mk +++ b/keyboards/preonic/rev1/rules.mk @@ -34,4 +34,4 @@ SLEEP_LED_ENABLE = no # Breathing sleep LED during USB suspend LAYOUTS = ortho_5x12 -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes diff --git a/keyboards/preonic/rev2/rules.mk b/keyboards/preonic/rev2/rules.mk index f24c6a49b..1b72a622a 100644 --- a/keyboards/preonic/rev2/rules.mk +++ b/keyboards/preonic/rev2/rules.mk @@ -34,4 +34,4 @@ SLEEP_LED_ENABLE = no # Breathing sleep LED during USB suspend LAYOUTS = ortho_5x12 -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes diff --git a/keyboards/rgbkb/sol/keymaps/kageurufu/rules.mk b/keyboards/rgbkb/sol/keymaps/kageurufu/rules.mk index 056959a55..f60fa5d4c 100644 --- a/keyboards/rgbkb/sol/keymaps/kageurufu/rules.mk +++ b/keyboards/rgbkb/sol/keymaps/kageurufu/rules.mk @@ -11,11 +11,10 @@ LED_MIRRORED = no # Mirror LEDs across halves (enable DIP 1 on RGB_MATRIX_ENABLE = WS2812 # Enable per-key coordinate based RGB effects. Do not enable with RGBlight # Userspace implements their own LTO -LINK_TIME_OPTIMIZATION_ENABLE = no +LTO_ENABLE = no # Do not edit past here include keyboards/$(KEYBOARD)/post_rules.mk - diff --git a/keyboards/rgbkb/sol/rev2/rules.mk b/keyboards/rgbkb/sol/rev2/rules.mk index debe8fe6b..201a7b47b 100644 --- a/keyboards/rgbkb/sol/rev2/rules.mk +++ b/keyboards/rgbkb/sol/rev2/rules.mk @@ -29,7 +29,7 @@ IOS_DEVICE_ENABLE = no # Limit max brightness to connect to IOS dev OLED_DRIVER_ENABLE = no # Enable the OLED Driver EXTRA_ENCODERS_ENABLE = no # Enables 3 encoders per side (up from 1, not compatible with OLED_DRIVER_ENABLE) SWAP_HANDS_ENABLE = no # Enable one-hand typing -LINK_TIME_OPTIMIZATION_ENABLE = yes # Enable Link Time Optimizations greatly reducing firmware size by disabling the old Macros and Functions features +LTO_ENABLE = yes # Enable Link Time Optimizations greatly reducing firmware size by disabling the old Macros and Functions features # Special RGB Matrix, OLED, & Encoder Control Menu! RGB_OLED_MENU = no # Enabled by setting this to the encoder index (0-5) you wish to use to control the menu. diff --git a/keyboards/rgbkb/zygomorph/keymaps/5x6pad/rules.mk b/keyboards/rgbkb/zygomorph/keymaps/5x6pad/rules.mk index 55d52d58e..c223cb9eb 100644 --- a/keyboards/rgbkb/zygomorph/keymaps/5x6pad/rules.mk +++ b/keyboards/rgbkb/zygomorph/keymaps/5x6pad/rules.mk @@ -19,7 +19,7 @@ SWAP_HANDS_ENABLE = no # Enable one-hand typing ENCODER_ENABLE = yes # Enable rotary encoder OLED_DRIVER_ENABLE = no # Enable the OLED Driver IOS_DEVICE_ENABLE = no # Limit max brightness to connect to IOS device (iPad,iPhone) -LINK_TIME_OPTIMIZATION_ENABLE = no # Enable optimizations to reduce firmware size. Also disables action macros and functions. +LTO_ENABLE = no # Enable optimizations to reduce firmware size. Also disables action macros and functions. # Do not edit past here diff --git a/keyboards/rgbkb/zygomorph/keymaps/default/rules.mk b/keyboards/rgbkb/zygomorph/keymaps/default/rules.mk index 55d52d58e..c223cb9eb 100644 --- a/keyboards/rgbkb/zygomorph/keymaps/default/rules.mk +++ b/keyboards/rgbkb/zygomorph/keymaps/default/rules.mk @@ -19,7 +19,7 @@ SWAP_HANDS_ENABLE = no # Enable one-hand typing ENCODER_ENABLE = yes # Enable rotary encoder OLED_DRIVER_ENABLE = no # Enable the OLED Driver IOS_DEVICE_ENABLE = no # Limit max brightness to connect to IOS device (iPad,iPhone) -LINK_TIME_OPTIMIZATION_ENABLE = no # Enable optimizations to reduce firmware size. Also disables action macros and functions. +LTO_ENABLE = no # Enable optimizations to reduce firmware size. Also disables action macros and functions. # Do not edit past here diff --git a/keyboards/rgbkb/zygomorph/keymaps/default_oled/rules.mk b/keyboards/rgbkb/zygomorph/keymaps/default_oled/rules.mk index 961edb6e2..f2c194f0d 100644 --- a/keyboards/rgbkb/zygomorph/keymaps/default_oled/rules.mk +++ b/keyboards/rgbkb/zygomorph/keymaps/default_oled/rules.mk @@ -19,7 +19,7 @@ SWAP_HANDS_ENABLE = no # Enable one-hand typing ENCODER_ENABLE = yes # Enable rotary encoder OLED_DRIVER_ENABLE = yes # Enable the OLED Driver IOS_DEVICE_ENABLE = no # Limit max brightness to connect to IOS device (iPad,iPhone) -LINK_TIME_OPTIMIZATION_ENABLE = yes # Enable optimizations to reduce firmware size. Also disables action macros and functions. +LTO_ENABLE = yes # Enable optimizations to reduce firmware size. Also disables action macros and functions. # Do not edit past here diff --git a/keyboards/rgbkb/zygomorph/keymaps/xulkal/rules.mk b/keyboards/rgbkb/zygomorph/keymaps/xulkal/rules.mk index dc687cbbd..78969ad7a 100644 --- a/keyboards/rgbkb/zygomorph/keymaps/xulkal/rules.mk +++ b/keyboards/rgbkb/zygomorph/keymaps/xulkal/rules.mk @@ -19,7 +19,7 @@ SWAP_HANDS_ENABLE = no # Enable one-hand typing ENCODER_ENABLE = no # Enable rotary encoder OLED_DRIVER_ENABLE = no # Enable the OLED Driver IOS_DEVICE_ENABLE = no # Limit max brightness to connect to IOS device (iPad,iPhone) -LINK_TIME_OPTIMIZATION_ENABLE = no # Enable optimizations to reduce firmware size. Also disables action macros and functions. +LTO_ENABLE = no # Enable optimizations to reduce firmware size. Also disables action macros and functions. # Do not edit past here diff --git a/keyboards/tg4x/rules.mk b/keyboards/tg4x/rules.mk index 41988177d..4a86998cb 100644 --- a/keyboards/tg4x/rules.mk +++ b/keyboards/tg4x/rules.mk @@ -31,4 +31,4 @@ AUDIO_ENABLE = no # Audio output on port C6 FAUXCLICKY_ENABLE = no # Use buzzer to emulate clicky switches HD44780_ENABLE = no # Enable support for HD44780 based LCDs -LINK_TIME_OPTIMIZATION_ENABLE = yes \ No newline at end of file +LTO_ENABLE = yes diff --git a/keyboards/tkc/candybar/lefty/rules.mk b/keyboards/tkc/candybar/lefty/rules.mk index 52ef91c47..1edad0835 100644 --- a/keyboards/tkc/candybar/lefty/rules.mk +++ b/keyboards/tkc/candybar/lefty/rules.mk @@ -5,7 +5,7 @@ MCU = STM32F072 # comment out to disable the options. # # EXTRAFLAGS+=-flto -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes BACKLIGHT_ENABLE = no BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration ## (Note that for BOOTMAGIC on Teensy LC you have to use a custom .ld script.) diff --git a/keyboards/tkc/candybar/righty/rules.mk b/keyboards/tkc/candybar/righty/rules.mk index 52ef91c47..1edad0835 100644 --- a/keyboards/tkc/candybar/righty/rules.mk +++ b/keyboards/tkc/candybar/righty/rules.mk @@ -5,7 +5,7 @@ MCU = STM32F072 # comment out to disable the options. # # EXTRAFLAGS+=-flto -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes BACKLIGHT_ENABLE = no BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration ## (Note that for BOOTMAGIC on Teensy LC you have to use a custom .ld script.) diff --git a/keyboards/v60_type_r/rules.mk b/keyboards/v60_type_r/rules.mk index 94205df11..16ecb7df4 100644 --- a/keyboards/v60_type_r/rules.mk +++ b/keyboards/v60_type_r/rules.mk @@ -32,6 +32,6 @@ BLUETOOTH_ENABLE = no # Enable Bluetooth with the Adafruit EZ-Key HID AUDIO_ENABLE = no # Audio output on port C6 FAUXCLICKY_ENABLE = no # Use buzzer to emulate clicky switches -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes LAYOUTS = 60_ansi 60_iso diff --git a/keyboards/vitamins_included/rules.mk b/keyboards/vitamins_included/rules.mk index 3eb3a1c30..c95ae27ec 100644 --- a/keyboards/vitamins_included/rules.mk +++ b/keyboards/vitamins_included/rules.mk @@ -25,4 +25,4 @@ LAYOUTS = ortho_4x12 DEFAULT_FOLDER = vitamins_included/rev2 -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes diff --git a/keyboards/xd004/v1/config.h b/keyboards/xd004/v1/config.h index f7a262d4c..b90e10b89 100644 --- a/keyboards/xd004/v1/config.h +++ b/keyboards/xd004/v1/config.h @@ -75,6 +75,6 @@ further optimizations can be done on that side. /* disable action features */ // #define NO_ACTION_ONESHOT // 462 bytes <- this needs to be un-commented out if Link Time Optimization is disabled, otherwise file is too large -// The two below are implicit since we use LINK_TIME_OPTIMIZATION_ENABLE (in rules.mk) +// The two below are implicit since we use LTO_ENABLE (in rules.mk) // #define NO_ACTION_MACRO // #define NO_ACTION_FUNCTION diff --git a/keyboards/xd004/v1/rules.mk b/keyboards/xd004/v1/rules.mk index 18f7d8041..e9afff93c 100644 --- a/keyboards/xd004/v1/rules.mk +++ b/keyboards/xd004/v1/rules.mk @@ -27,6 +27,6 @@ RGBLIGHT_ENABLE = no # Enable WS2812 RGB underlight. SLEEP_LED_ENABLE = no # Breathing sleep LED during USB suspend SPACE_CADET_ENABLE = no # Saves about 5% of space: -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes #LAYOUTS = ortho_1x4 diff --git a/keyboards/xd84/rules.mk b/keyboards/xd84/rules.mk index cf4e64361..590038622 100644 --- a/keyboards/xd84/rules.mk +++ b/keyboards/xd84/rules.mk @@ -31,7 +31,7 @@ BLUETOOTH_ENABLE = no # Enable Bluetooth with the Adafruit EZ-Key HID AUDIO_ENABLE = no # Audio output on port C6 FAUXCLICKY_ENABLE = no # Use buzzer to emulate clicky switches HD44780_ENABLE = no # Enable support for HD44780 based LCDs -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes # custom matrix setup CUSTOM_MATRIX = lite diff --git a/keyboards/xd96/rules.mk b/keyboards/xd96/rules.mk index 0c56a5ac0..3ede910c3 100644 --- a/keyboards/xd96/rules.mk +++ b/keyboards/xd96/rules.mk @@ -31,7 +31,7 @@ BLUETOOTH_ENABLE = no # Enable Bluetooth with the Adafruit EZ-Key HID AUDIO_ENABLE = no # Audio output on port C6 FAUXCLICKY_ENABLE = no # Use buzzer to emulate clicky switches HD44780_ENABLE = no # Enable support for HD44780 based LCDs -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes # custom matrix setup CUSTOM_MATRIX = lite diff --git a/keyboards/yushakobo/quick7/config.h b/keyboards/yushakobo/quick7/config.h index 4fb8ba6d9..b9abd137b 100644 --- a/keyboards/yushakobo/quick7/config.h +++ b/keyboards/yushakobo/quick7/config.h @@ -192,7 +192,7 @@ along with this program. If not, see . //#define NO_ACTION_ONESHOT /* disable these deprecated features by default */ -#ifndef LINK_TIME_OPTIMIZATION_ENABLE +#ifndef LTO_ENABLE #define NO_ACTION_MACRO #define NO_ACTION_FUNCTION #endif diff --git a/show_options.mk b/show_options.mk index 3f3243fbd..2a5781773 100644 --- a/show_options.mk +++ b/show_options.mk @@ -82,8 +82,7 @@ OTHER_OPTION_NAMES = \ RGB_MATRIX_KEYPRESSES \ LED_MIRRORED \ RGBLIGHT_FULL_POWER \ - Link_Time_Optimization \ - LINK_TIME_OPTIMIZATION_ENABLE + LTO_ENABLE define NAME_ECHO @echo " $1 = $($1) # $(origin $1)" diff --git a/tmk_core/common.mk b/tmk_core/common.mk index 56ed4a857..a6c439f5c 100644 --- a/tmk_core/common.mk +++ b/tmk_core/common.mk @@ -160,16 +160,13 @@ ifeq ($(strip $(SHARED_EP_ENABLE)), yes) endif ifeq ($(strip $(LTO_ENABLE)), yes) - LINK_TIME_OPTIMIZATION_ENABLE = yes -endif - -ifeq ($(strip $(LINK_TIME_OPTIMIZATION_ENABLE)), yes) ifeq ($(PLATFORM),CHIBIOS) $(info Enabling LTO on ChibiOS-targeting boards is known to have a high likelihood of failure.) - $(info If unsure, set LINK_TIME_OPTIMIZATION_ENABLE = no.) + $(info If unsure, set LTO_ENABLE = no.) endif EXTRAFLAGS += -flto - TMK_COMMON_DEFS += -DLINK_TIME_OPTIMIZATION_ENABLE + TMK_COMMON_DEFS += -DLTO_ENABLE + TMK_COMMON_DEFS += -DLINK_TIME_OPTIMIZATON_ENABLE endif # Search Path diff --git a/tmk_core/common/action.h b/tmk_core/common/action.h index c82c9c81b..345c030c9 100644 --- a/tmk_core/common/action.h +++ b/tmk_core/common/action.h @@ -29,7 +29,7 @@ extern "C" { #endif /* Disable macro and function features when LTO is enabled, since they break */ -#ifdef LINK_TIME_OPTIMIZATION_ENABLE +#ifdef LTO_ENABLE # ifndef NO_ACTION_MACRO # define NO_ACTION_MACRO # endif diff --git a/tmk_core/common/command.c b/tmk_core/common/command.c index ef6a39c0f..feeb2202e 100644 --- a/tmk_core/common/command.c +++ b/tmk_core/common/command.c @@ -180,7 +180,7 @@ static void print_version(void) { #ifdef NKRO_ENABLE " NKRO" #endif -#ifdef LINK_TIME_OPTIMIZATION_ENABLE +#ifdef LTO_ENABLE " LTO" #endif diff --git a/users/bcat/rules.mk b/users/bcat/rules.mk index a595d1f58..f87974ed9 100644 --- a/users/bcat/rules.mk +++ b/users/bcat/rules.mk @@ -14,7 +14,7 @@ EXTRAKEY_ENABLE = yes NKRO_ENABLE = yes # Enable link-time optimization to reduce binary size. -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes # Disable unused build options on all keyboards. COMMAND_ENABLE = no diff --git a/users/dshields/rules.mk b/users/dshields/rules.mk index abfbe5e40..462649289 100644 --- a/users/dshields/rules.mk +++ b/users/dshields/rules.mk @@ -10,7 +10,7 @@ SPACE_CADET_ENABLE = no LEADER_ENABLE = no DYNAMIC_MACRO_ENABLE = yes -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes ifeq ($(strip $(KEYBOARD)), planck/rev3) AUDIO_ENABLE = no @@ -29,4 +29,3 @@ ifeq ($(strip $(KEYBOARD)), planck/light) BACKLIGHT_ENABLE = no RGB_MATRIX_ENABLE = yes endif - diff --git a/users/issmirnov/rules.mk b/users/issmirnov/rules.mk index 096d7b4c0..93ec21b01 100644 --- a/users/issmirnov/rules.mk +++ b/users/issmirnov/rules.mk @@ -4,7 +4,7 @@ SRC += issmirnov.c # https://www.reddit.com/r/olkb/comments/bmpgjm/programming_help/ # Should shave 2000 bytes -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes # Enable debugging only when needed. CONSOLE_ENABLE = yes # +400 bytes (hid_listen support) diff --git a/users/kuchosauronad0/rules.mk b/users/kuchosauronad0/rules.mk index b844d12c9..dfab85703 100644 --- a/users/kuchosauronad0/rules.mk +++ b/users/kuchosauronad0/rules.mk @@ -1,7 +1,7 @@ SRC += kuchosauronad0.c \ process_records.c -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes SPACE_CADET_ENABLE = no ifneq ($(strip $(RGBLIGHT_ENABLE)),yes ) @@ -24,7 +24,7 @@ ifeq ($(strip $(LEADER_ENABLE)), yes) SRC += leader.c endif -ifneq ("$(wildcard $(USER_PATH)/secrets.c)","") +ifneq ("$(wildcard $(USER_PATH)/secrets.c)","") SRC += secrets.c endif ifeq ($(strip $(NO_SECRETS)), yes) diff --git a/users/pvinis/rules.mk b/users/pvinis/rules.mk index f6f09e54d..6c7b47399 100644 --- a/users/pvinis/rules.mk +++ b/users/pvinis/rules.mk @@ -14,6 +14,6 @@ SRC += pvinis.c # add userspace file ## Some extra stuff to make firmware smaller. -# LINK_TIME_OPTIMIZATION_ENABLE = yes +# LTO_ENABLE = yes # CONSOLE_ENABLE = no # COMMAND_ENABLE = no diff --git a/users/yanfali/rules.mk b/users/yanfali/rules.mk index 456d3bf32..a7208daa2 100644 --- a/users/yanfali/rules.mk +++ b/users/yanfali/rules.mk @@ -2,7 +2,7 @@ BOOTMAGIC = lite DYNAMIC_KEYMAP_ENABLE = no CONSOLE_ENABLE = yes COMMAND_ENABLE = yes -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes AUDIO_ENABLE = no # only enable audio on specific boards diff --git a/users/yet-another-developer/rules.mk b/users/yet-another-developer/rules.mk index 597df6d0b..64cf1f2fc 100644 --- a/users/yet-another-developer/rules.mk +++ b/users/yet-another-developer/rules.mk @@ -1,7 +1,7 @@ SRC += yet-another-developer.c \ process_records.c -LINK_TIME_OPTIMIZATION_ENABLE = yes +LTO_ENABLE = yes SPACE_CADET_ENABLE = no ifeq ($(strip $(TAP_DANCE_ENABLE)), yes) -- cgit v1.3.1 From b89b2030af655132e2708cbdffd7fb1b8e1aaeb4 Mon Sep 17 00:00:00 2001 From: Ryan Date: Tue, 25 Aug 2020 18:58:00 +1000 Subject: Kiibohd bootloader, take 2 (#10129) --- bootloader.mk | 15 ++++++++++++++- keyboards/ergodox_infinity/bootloader_defs.h | 1 - keyboards/ergodox_infinity/rules.mk | 19 ++----------------- keyboards/infinity60/bootloader_defs.h | 1 - keyboards/infinity60/rules.mk | 18 ++---------------- keyboards/k_type/bootloader_defs.h | 1 - keyboards/k_type/rules.mk | 18 ++---------------- keyboards/whitefox/bootloader_defs.h | 1 - keyboards/whitefox/rules.mk | 18 ++---------------- quantum/mcu_selection.mk | 2 ++ tmk_core/chibios.mk | 2 +- tmk_core/common/chibios/bootloader.c | 6 +++--- 12 files changed, 28 insertions(+), 74 deletions(-) delete mode 100644 keyboards/ergodox_infinity/bootloader_defs.h delete mode 100644 keyboards/infinity60/bootloader_defs.h delete mode 100644 keyboards/k_type/bootloader_defs.h delete mode 100644 keyboards/whitefox/bootloader_defs.h (limited to 'tmk_core') diff --git a/bootloader.mk b/bootloader.mk index e516e9ff9..d5f803f89 100644 --- a/bootloader.mk +++ b/bootloader.mk @@ -27,6 +27,7 @@ # qmk-dfu QMK DFU (LUFA + blinkenlight) # bootloadHID HIDBootFlash compatible (ATmega32A) # USBasp USBaspLoader (ATmega328P) +# kiibohd Input:Club Kiibohd bootloader (only used on their boards) # # BOOTLOADER_SIZE can still be defined manually, but it's recommended # you add any possible configuration to this list @@ -89,7 +90,19 @@ ifeq ($(strip $(BOOTLOADER)), lufa-ms) BOOTLOADER_SIZE = 6144 FIRMWARE_FORMAT = bin endif - ifdef BOOTLOADER_SIZE OPT_DEFS += -DBOOTLOADER_SIZE=$(strip $(BOOTLOADER_SIZE)) endif + +ifeq ($(strip $(BOOTLOADER)), kiibohd) + OPT_DEFS += -DBOOTLOADER_KIIBOHD + ifeq ($(strip $(MCU_ORIG)), MK20DX128) + MCU_LDSCRIPT = MK20DX128BLDR4 + endif + ifeq ($(strip $(MCU_ORIG)), MK20DX256) + MCU_LDSCRIPT = MK20DX256BLDR8 + endif + + DFU_ARGS = -d 1C11:B007 + DFU_SUFFIX_ARGS = -v 1C11 -p B007 +endif diff --git a/keyboards/ergodox_infinity/bootloader_defs.h b/keyboards/ergodox_infinity/bootloader_defs.h deleted file mode 100644 index c67153be6..000000000 --- a/keyboards/ergodox_infinity/bootloader_defs.h +++ /dev/null @@ -1 +0,0 @@ -#define KIIBOHD_BOOTLOADER diff --git a/keyboards/ergodox_infinity/rules.mk b/keyboards/ergodox_infinity/rules.mk index 29e5c6dd7..b9ead9e87 100644 --- a/keyboards/ergodox_infinity/rules.mk +++ b/keyboards/ergodox_infinity/rules.mk @@ -1,27 +1,12 @@ # MCU name MCU = MK20DX256 -# Linker script to use -# - it should exist either in /os/common/ports/ARMCMx/compilers/GCC/ld/ -# or /ld/ -# - NOTE: a custom ld script is needed for EEPROM on Teensy LC -# - LDSCRIPT = -# - MKL26Z64 for Teensy LC -# - MK20DX128 for Teensy 3.0 -# - MK20DX256 for Teensy 3.1 and 3.2 -# - MK20DX128BLDR4 for Infinity 60% with Kiibohd bootloader -# - MK20DX256BLDR8 for Infinity ErgoDox with Kiibohd bootloader -MCU_LDSCRIPT = MK20DX256BLDR8 - -BOOTLOADER = dfu +# Bootloader selection +BOOTLOADER = kiibohd # Build Options # comment out to disable the options. # - -DFU_ARGS = -d 1c11:b007 -DFU_SUFFIX_ARGS = -p b007 -v 1c11 - BOOTMAGIC_ENABLE = no # Virtual DIP switch configuration MOUSEKEY_ENABLE = yes # Mouse keys EXTRAKEY_ENABLE = yes # Audio control and System control diff --git a/keyboards/infinity60/bootloader_defs.h b/keyboards/infinity60/bootloader_defs.h deleted file mode 100644 index c67153be6..000000000 --- a/keyboards/infinity60/bootloader_defs.h +++ /dev/null @@ -1 +0,0 @@ -#define KIIBOHD_BOOTLOADER diff --git a/keyboards/infinity60/rules.mk b/keyboards/infinity60/rules.mk index e6b234d82..dce10b571 100644 --- a/keyboards/infinity60/rules.mk +++ b/keyboards/infinity60/rules.mk @@ -1,16 +1,8 @@ # MCU name MCU = MK20DX128 -# Linker script to use -# - it should exist either in /os/common/ports/ARMCMx/compilers/GCC/ld/ -# or /ld/ -# - NOTE: a custom ld script is needed for EEPROM on Teensy LC -# - LDSCRIPT = -# - MKL26Z64 for Teensy LC -# - MK20DX128 for Teensy 3.0 -# - MK20DX256 for Teensy 3.1 and 3.2 -# - MK20DX128BLDR4 for Infinity with Kiibohd bootloader -MCU_LDSCRIPT = MK20DX128BLDR4 +# Bootloader selection +BOOTLOADER = kiibohd # Board: it should exist either in /os/hal/boards/ # or /boards @@ -21,15 +13,9 @@ MCU_LDSCRIPT = MK20DX128BLDR4 # - MCHCK_K20 for Infinity KB BOARD = MCHCK_K20 -BOOTLOADER = dfu - # Build Options # comment out to disable the options. # - -DFU_ARGS = -d 1c11:b007 -DFU_SUFFIX_ARGS = -p b007 -v 1c11 - BOOTMAGIC_ENABLE = no # Virtual DIP switch configuration ## (Note that for BOOTMAGIC on Teensy LC you have to use a custom .ld script.) MOUSEKEY_ENABLE = yes # Mouse keys diff --git a/keyboards/k_type/bootloader_defs.h b/keyboards/k_type/bootloader_defs.h deleted file mode 100644 index c67153be6..000000000 --- a/keyboards/k_type/bootloader_defs.h +++ /dev/null @@ -1 +0,0 @@ -#define KIIBOHD_BOOTLOADER diff --git a/keyboards/k_type/rules.mk b/keyboards/k_type/rules.mk index 56c4c606e..52a9b8ee6 100644 --- a/keyboards/k_type/rules.mk +++ b/keyboards/k_type/rules.mk @@ -1,17 +1,8 @@ # MCU name MCU = MK20DX256 -# Linker script to use -# - it should exist either in /os/common/ports/ARMCMx/compilers/GCC/ld/ -# or /ld/ -# - NOTE: a custom ld script is needed for EEPROM on Teensy LC -# - LDSCRIPT = -# - MKL26Z64 for Teensy LC -# - MK20DX128 for Teensy 3.0 -# - MK20DX256 for Teensy 3.1 and 3.2 -# - MK20DX128BLDR4 for Infinity with Kiibohd bootloader -# - MK20DX256BLDR8 for Infinity ErgoDox with Kiibohd bootloader -MCU_LDSCRIPT = MK20DX256BLDR8 +# Bootloader selection +BOOTLOADER = kiibohd # Board: it should exist either in /os/hal/boards/ # or /boards @@ -19,11 +10,6 @@ MCU_LDSCRIPT = MK20DX256BLDR8 # hack to ensure the watchdog has started before trying to disable it. BOARD = IC_TEENSY_3_1 -DFU_ARGS = -d 1c11:b007 -DFU_SUFFIX_ARGS = -p b007 -v 1c11 - -BOOTLOADER = dfu - # Build Options # comment out to disable the options. # diff --git a/keyboards/whitefox/bootloader_defs.h b/keyboards/whitefox/bootloader_defs.h deleted file mode 100644 index c67153be6..000000000 --- a/keyboards/whitefox/bootloader_defs.h +++ /dev/null @@ -1 +0,0 @@ -#define KIIBOHD_BOOTLOADER diff --git a/keyboards/whitefox/rules.mk b/keyboards/whitefox/rules.mk index 14507e9dd..c3621ebd1 100644 --- a/keyboards/whitefox/rules.mk +++ b/keyboards/whitefox/rules.mk @@ -1,17 +1,8 @@ # MCU name MCU = MK20DX256 -# Linker script to use -# - it should exist either in /os/common/ports/ARMCMx/compilers/GCC/ld/ -# or /ld/ -# - NOTE: a custom ld script is needed for EEPROM on Teensy LC -# - LDSCRIPT = -# - MKL26Z64 for Teensy LC -# - MK20DX128 for Teensy 3.0 -# - MK20DX256 for Teensy 3.1 and 3.2 -# - MK20DX128BLDR4 for Infinity with Kiibohd bootloader -# - MK20DX256BLDR8 for Infinity ErgoDox with Kiibohd bootloader -MCU_LDSCRIPT = MK20DX256BLDR8 +# Bootloader selection +BOOTLOADER = kiibohd # Board: it should exist either in /os/hal/boards/ # or /boards @@ -22,11 +13,6 @@ MCU_LDSCRIPT = MK20DX256BLDR8 # - MCHCK_K20 for Infinity KB BOARD = IC_TEENSY_3_1 -DFU_ARGS = -d 1c11:b007 -DFU_SUFFIX_ARGS = -p b007 -v 1c11 - -BOOTLOADER = dfu - # Build Options # comment out to disable the options. # diff --git a/quantum/mcu_selection.mk b/quantum/mcu_selection.mk index 61fd7b6e4..33a0cabc8 100644 --- a/quantum/mcu_selection.mk +++ b/quantum/mcu_selection.mk @@ -1,3 +1,5 @@ +MCU_ORIG := $(MCU) + ifneq ($(findstring MKL26Z64, $(MCU)),) # Cortex version MCU = cortex-m0plus diff --git a/tmk_core/chibios.mk b/tmk_core/chibios.mk index a218488a1..2bd53f0dc 100644 --- a/tmk_core/chibios.mk +++ b/tmk_core/chibios.mk @@ -386,7 +386,7 @@ bin: $(BUILD_DIR)/$(TARGET).bin sizeafter flash: $(BUILD_DIR)/$(TARGET).bin cpfirmware sizeafter ifneq ($(strip $(PROGRAM_CMD)),) $(PROGRAM_CMD) -else ifeq ($(strip $(BOOTLOADER)),dfu) +else ifeq ($(strip $(BOOTLOADER)),kiibohd) $(call EXEC_DFU_UTIL) else ifeq ($(strip $(MCU_FAMILY)),KINETIS) $(call EXEC_TEENSY) diff --git a/tmk_core/common/chibios/bootloader.c b/tmk_core/common/chibios/bootloader.c index 743448ee1..7b2cf5c43 100644 --- a/tmk_core/common/chibios/bootloader.c +++ b/tmk_core/common/chibios/bootloader.c @@ -82,7 +82,7 @@ void enter_bootloader_mode_if_requested(void) { #elif defined(KL2x) || defined(K20x) // STM32_BOOTLOADER_DUAL_BANK // STM32_BOOTLOADER_ADDRESS /* Kinetis */ -# if defined(KIIBOHD_BOOTLOADER) +# if defined(BOOTLOADER_KIIBOHD) /* Kiibohd Bootloader (MCHCK and Infinity KB) */ # define SCB_AIRCR_VECTKEY_WRITEMAGIC 0x05FA0000 const uint8_t sys_reset_to_loader_magic[] = "\xff\x00\x7fRESET TO LOADER\x7f\x00\xff"; @@ -92,14 +92,14 @@ void bootloader_jump(void) { SCB->AIRCR = SCB_AIRCR_VECTKEY_WRITEMAGIC | SCB_AIRCR_SYSRESETREQ_Msk; } -# else /* defined(KIIBOHD_BOOTLOADER) */ +# else /* defined(BOOTLOADER_KIIBOHD) */ /* Default for Kinetis - expecting an ARM Teensy */ # include "wait.h" void bootloader_jump(void) { wait_ms(100); __BKPT(0); } -# endif /* defined(KIIBOHD_BOOTLOADER) */ +# endif /* defined(BOOTLOADER_KIIBOHD) */ #else /* neither STM32 nor KINETIS */ __attribute__((weak)) void bootloader_jump(void) {} -- cgit v1.3.1 From 0f596881b36587a298568192078f9b467c51c109 Mon Sep 17 00:00:00 2001 From: Ryan Date: Tue, 25 Aug 2020 19:03:45 +1000 Subject: Remove support for Adafruit EZ-Key (#10103) * Remove support for Adafruit EZ-Key * Update docs/ja/feature_bluetooth.md Co-authored-by: Takeshi ISHII <2170248+mtei@users.noreply.github.com> Co-authored-by: Takeshi ISHII <2170248+mtei@users.noreply.github.com> --- docs/config_options.md | 4 +- docs/feature_bluetooth.md | 7 +-- docs/getting_started_make_guide.md | 4 -- docs/ja/config_options.md | 4 +- docs/ja/feature_bluetooth.md | 8 +-- docs/ja/getting_started_make_guide.md | 4 -- tmk_core/common.mk | 6 -- tmk_core/protocol/lufa.mk | 12 +--- tmk_core/protocol/lufa/bluetooth.c | 38 ------------ tmk_core/protocol/lufa/bluetooth.h | 96 ------------------------------- tmk_core/protocol/lufa/lufa.c | 105 ++++++++++++++++++++-------------- 11 files changed, 68 insertions(+), 220 deletions(-) delete mode 100644 tmk_core/protocol/lufa/bluetooth.c delete mode 100644 tmk_core/protocol/lufa/bluetooth.h (limited to 'tmk_core') diff --git a/docs/config_options.md b/docs/config_options.md index a323741c2..f9b1cc657 100644 --- a/docs/config_options.md +++ b/docs/config_options.md @@ -371,10 +371,8 @@ Use these to enable or disable building certain features. The more you have enab * MIDI controls * `UNICODE_ENABLE` * Unicode -* `BLUETOOTH_ENABLE` - * Legacy option to Enable Bluetooth with the Adafruit EZ-Key HID. See BLUETOOTH * `BLUETOOTH` - * Current options are AdafruitEzKey, AdafruitBLE, RN42 + * Current options are AdafruitBLE, RN42 * `SPLIT_KEYBOARD` * Enables split keyboard support (dual MCU like the let's split and bakingpy's boards) and includes all necessary files located at quantum/split_common * `CUSTOM_MATRIX` diff --git a/docs/feature_bluetooth.md b/docs/feature_bluetooth.md index 6cd5c3c6c..7b450b1ac 100644 --- a/docs/feature_bluetooth.md +++ b/docs/feature_bluetooth.md @@ -2,11 +2,10 @@ ## Bluetooth Known Supported Hardware -Currently Bluetooth support is limited to AVR based chips. For Bluetooth 2.1, QMK has support for RN-42 modules and the Bluefruit EZ-Key, the latter of which is not produced anymore. For more recent BLE protocols, currently only the Adafruit Bluefruit SPI Friend is directly supported. BLE is needed to connect to iOS devices. Note iOS does not support mouse input. +Currently Bluetooth support is limited to AVR based chips. For Bluetooth 2.1, QMK has support for RN-42 modules. For more recent BLE protocols, currently only the Adafruit Bluefruit SPI Friend is directly supported. BLE is needed to connect to iOS devices. Note iOS does not support mouse input. |Board |Bluetooth Protocol |Connection Type |rules.mk |Bluetooth Chip| |----------------------------------------------------------------|----------------------------|----------------|---------------------------|--------------| -|[Adafruit EZ-Key HID](https://www.adafruit.com/product/1535) |Bluetooth Classic | UART |`BLUETOOTH = AdafruitEZKey` | | |Roving Networks RN-42 (Sparkfun Bluesmirf) |Bluetooth Classic | UART |`BLUETOOTH = RN42` | RN-42 | |[Bluefruit LE SPI Friend](https://www.adafruit.com/product/2633)|Bluetooth Low Energy | SPI |`BLUETOOTH = AdafruitBLE` | nRF51822 | @@ -24,16 +23,12 @@ Currently The only bluetooth chipset supported by QMK is the Adafruit Bluefruit A Bluefruit UART friend can be converted to an SPI friend, however this [requires](https://github.com/qmk/qmk_firmware/issues/2274) some reflashing and soldering directly to the MDBT40 chip. -## Adafruit EZ-Key hid -This requires [some hardware changes](https://www.reddit.com/r/MechanicalKeyboards/comments/3psx0q/the_planck_keyboard_with_bluetooth_guide_and/?ref=search_posts), but can be enabled via the Makefile. The firmware will still output characters via USB, so be aware of this when charging via a computer. It would make sense to have a switch on the Bluefruit to turn it off at will. - ## Bluetooth Rules.mk Options Use only one of these * BLUETOOTH_ENABLE = yes (Legacy Option) * BLUETOOTH = RN42 -* BLUETOOTH = AdafruitEZKey * BLUETOOTH = AdafruitBLE ## Bluetooth Keycodes diff --git a/docs/getting_started_make_guide.md b/docs/getting_started_make_guide.md index df82a001f..a89dc73d0 100644 --- a/docs/getting_started_make_guide.md +++ b/docs/getting_started_make_guide.md @@ -101,10 +101,6 @@ This allows you to send Unicode characters by inputting a mnemonic corresponding For further details, as well as limitations, see the [Unicode page](feature_unicode.md). -`BLUETOOTH_ENABLE` - -This allows you to interface with a Bluefruit EZ-key to send keycodes wirelessly. It uses the D2 and D3 pins. - `AUDIO_ENABLE` This allows you output audio on the C6 pin (needs abstracting). See the [audio page](feature_audio.md) for more information. diff --git a/docs/ja/config_options.md b/docs/ja/config_options.md index 6ba7f6f1f..2a64f2ba2 100644 --- a/docs/ja/config_options.md +++ b/docs/ja/config_options.md @@ -369,10 +369,8 @@ QMK での全ての利用可能な設定にはデフォルトがあります。 * MIDI 制御 * `UNICODE_ENABLE` * Unicode -* `BLUETOOTH_ENABLE` - * Adafruit EZ-Key HID で Bluetooth を有効にするレガシーオプション。BLUETOOTH を見てください * `BLUETOOTH` - * 現在のオプションは、AdafruitEzKey、AdafruitBLE、RN42 + * 現在のオプションは、AdafruitBLE、RN42 * `SPLIT_KEYBOARD` * 分割キーボード (let's split や bakingpy のキーボードのようなデュアル MCU) のサポートを有効にし、quantum/split_common にある全ての必要なファイルをインクルードします * `CUSTOM_MATRIX` diff --git a/docs/ja/feature_bluetooth.md b/docs/ja/feature_bluetooth.md index 4443a4e3e..f7835dd54 100644 --- a/docs/ja/feature_bluetooth.md +++ b/docs/ja/feature_bluetooth.md @@ -7,11 +7,10 @@ ## Bluetooth の既知のサポートハードウェア -現在のところ Bluetooth のサポートは AVR ベースのチップに限られます。Bluetooth 2.1 については、QMK は RN-42 モジュールと、Bluefruit EZ-Key をサポートしますが、後者はもう生産されていません。より最近の BLE プロトコルについては、現在のところ Adafruit Bluefruit SPI Friend のみが直接サポートされています。iOS デバイスに接続するには、BLE が必要です。iOS はマウス入力をサポートしないことに注意してください。 +現在のところ Bluetooth のサポートは AVR ベースのチップに限られます。Bluetooth 2.1 については、QMK は RN-42 モジュールをサポートします。より最近の BLE プロトコルについては、現在のところ Adafruit Bluefruit SPI Friend のみが直接サポートされています。iOS デバイスに接続するには、BLE が必要です。iOS はマウス入力をサポートしないことに注意してください。 | ボード | Bluetooth プロトコル | 接続タイプ | rules.mk | Bluetooth チップ | |----------------------------------------------------------------|----------------------------|----------------|---------------------------|--------------| -| [Adafruit EZ-Key HID](https://www.adafruit.com/product/1535) | Bluetooth Classic | UART | `BLUETOOTH = AdafruitEZKey` | | | Roving Networks RN-42 (Sparkfun Bluesmirf) | Bluetooth Classic | UART | `BLUETOOTH = RN42` | RN-42 | | [Bluefruit LE SPI Friend](https://www.adafruit.com/product/2633) | Bluetooth Low Energy | SPI | `BLUETOOTH = AdafruitBLE` | nRF51822 | @@ -29,16 +28,11 @@ Bluefruit UART friend は SPI friend に変換することができますが、これにはMDBT40 チップへの直接の再書き込みとはんだ付けが[必要です](https://github.com/qmk/qmk_firmware/issues/2274)。 -## Adafruit EZ-Key hid -これには[ハードウェアの変更](https://www.reddit.com/r/MechanicalKeyboards/comments/3psx0q/the_planck_keyboard_with_bluetooth_guide_and/?ref=search_posts)が必要ですが、Makefile を使って有効にすることができます。ファームウェアは引き続き USB 経由で文字を出力するため、コンピュータ経由で充電する場合は注意してください。任意にオフにするために Bluefruit 上にスイッチを持つことは理にかなっています。 - - ## Bluetooth の Rules.mk オプション これらのうちの1つだけを使ってください * BLUETOOTH_ENABLE = yes (レガシーオプション) * BLUETOOTH = RN42 -* BLUETOOTH = AdafruitEZKey * BLUETOOTH = AdafruitBLE ## Bluetooth キーコード diff --git a/docs/ja/getting_started_make_guide.md b/docs/ja/getting_started_make_guide.md index 0d39583a1..cbc824de8 100644 --- a/docs/ja/getting_started_make_guide.md +++ b/docs/ja/getting_started_make_guide.md @@ -106,10 +106,6 @@ make コマンド自体にもいくつかの追加オプションがあります 詳細と制限については、[Unicode ページ](ja/feature_unicode.md) を見てください。 -`BLUETOOTH_ENABLE` - -これによりキーコードをワイヤレスで送信するために Bluefruit EZ-key と連動することができます。D2 と D3 ピンを使います。 - `AUDIO_ENABLE` C6 ピン(抽象化が必要)でオーディオ出力できます。詳細は[オーディオページ](ja/feature_audio.md)を見てください。 diff --git a/tmk_core/common.mk b/tmk_core/common.mk index a6c439f5c..3c9de33c9 100644 --- a/tmk_core/common.mk +++ b/tmk_core/common.mk @@ -132,12 +132,6 @@ ifeq ($(strip $(BLUETOOTH)), AdafruitBLE) TMK_COMMON_DEFS += -DNO_USB_STARTUP_CHECK endif -ifeq ($(strip $(BLUETOOTH)), AdafruitEZKey) - TMK_COMMON_DEFS += -DBLUETOOTH_ENABLE - TMK_COMMON_DEFS += -DMODULE_ADAFRUIT_EZKEY - TMK_COMMON_DEFS += -DNO_USB_STARTUP_CHECK -endif - ifeq ($(strip $(BLUETOOTH)), RN42) TMK_COMMON_DEFS += -DBLUETOOTH_ENABLE TMK_COMMON_DEFS += -DMODULE_RN42 diff --git a/tmk_core/protocol/lufa.mk b/tmk_core/protocol/lufa.mk index 9bc972c26..1cc1fa04e 100644 --- a/tmk_core/protocol/lufa.mk +++ b/tmk_core/protocol/lufa.mk @@ -23,8 +23,7 @@ ifeq ($(strip $(MIDI_ENABLE)), yes) endif ifeq ($(strip $(BLUETOOTH_ENABLE)), yes) - LUFA_SRC += $(LUFA_DIR)/bluetooth.c \ - outputselect.c \ + LUFA_SRC += outputselect.c \ $(TMK_DIR)/protocol/serial_uart.c endif @@ -35,15 +34,8 @@ ifeq ($(strip $(BLUETOOTH)), AdafruitBLE) $(LUFA_DIR)/adafruit_ble.cpp endif -ifeq ($(strip $(BLUETOOTH)), AdafruitEZKey) - LUFA_SRC += $(LUFA_DIR)/bluetooth.c \ - outputselect.c \ - $(TMK_DIR)/protocol/serial_uart.c -endif - ifeq ($(strip $(BLUETOOTH)), RN42) - LUFA_SRC += $(LUFA_DIR)/bluetooth.c \ - outputselect.c \ + LUFA_SRC += outputselect.c \ $(TMK_DIR)/protocol/serial_uart.c endif diff --git a/tmk_core/protocol/lufa/bluetooth.c b/tmk_core/protocol/lufa/bluetooth.c deleted file mode 100644 index 5eb52860b..000000000 --- a/tmk_core/protocol/lufa/bluetooth.c +++ /dev/null @@ -1,38 +0,0 @@ -/* -Bluefruit Protocol for TMK firmware -Author: Benjamin Gould, 2013 - Jack Humbert, 2015 -Based on code Copyright 2011 Jun Wako -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 2 of the License, or -(at your option) any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. -You should have received a copy of the GNU General Public License -along with this program. If not, see . -*/ - -#include -#include "report.h" -#include "print.h" -#include "debug.h" -#include "bluetooth.h" - -void bluefruit_keyboard_print_report(report_keyboard_t *report) { - if (!debug_keyboard) return; - dprintf("keys: "); - for (int i = 0; i < KEYBOARD_REPORT_KEYS; i++) { - debug_hex8(report->keys[i]); - dprintf(" "); - } - dprintf(" mods: "); - debug_hex8(report->mods); - dprintf(" reserved: "); - debug_hex8(report->reserved); - dprintf("\n"); -} - -void bluefruit_serial_send(uint8_t data) { serial_send(data); } \ No newline at end of file diff --git a/tmk_core/protocol/lufa/bluetooth.h b/tmk_core/protocol/lufa/bluetooth.h deleted file mode 100644 index 67f031439..000000000 --- a/tmk_core/protocol/lufa/bluetooth.h +++ /dev/null @@ -1,96 +0,0 @@ -/* -Bluefruit Protocol for TMK firmware -Author: Benjamin Gould, 2013 - Jack Humbert, 2015 -Based on code Copyright 2011 Jun Wako -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 2 of the License, or -(at your option) any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. -You should have received a copy of the GNU General Public License -along with this program. If not, see . -*/ - -#pragma once - -#include "../serial.h" - -void bluefruit_serial_send(uint8_t data); - -// https://learn.adafruit.com/introducing-bluefruit-ez-key-diy-bluetooth-hid-keyboard/sending-keys-via-serial#raw-hid-consumer-reports-8-14 -static inline uint16_t CONSUMER2BLUEFRUIT(uint16_t usage) { - switch (usage) { - case AC_HOME: - return 0x0001; - case AL_KEYBOARD_LAYOUT: - return 0x0002; - case AC_SEARCH: - return 0x0004; - case SNAPSHOT: - return 0x0008; - case AUDIO_VOL_UP: - return 0x0010; - case AUDIO_VOL_DOWN: - return 0x0020; - case TRANSPORT_PLAY_PAUSE: - return 0x0040; - case TRANSPORT_FAST_FORWARD: - return 0x0080; - case TRANSPORT_REWIND: - return 0x0100; - case TRANSPORT_NEXT_TRACK: - return 0x0200; - case TRANSPORT_PREV_TRACK: - return 0x0400; - case TRANSPORT_RANDOM_PLAY: - return 0x0800; - case TRANSPORT_STOP: - return 0x1000; - default: - return 0; - } -} - -// https://cdn.sparkfun.com/datasheets/Wireless/Bluetooth/bluetooth_cr_UG-v1.0r.pdf#G7.663734 -static inline uint16_t CONSUMER2RN42(uint16_t usage) { - switch (usage) { - case AC_HOME: - return 0x0001; - case AL_EMAIL: - return 0x0002; - case AC_SEARCH: - return 0x0004; - case AL_KEYBOARD_LAYOUT: - return 0x0008; - case AUDIO_VOL_UP: - return 0x0010; - case AUDIO_VOL_DOWN: - return 0x0020; - case AUDIO_MUTE: - return 0x0040; - case TRANSPORT_PLAY_PAUSE: - return 0x0080; - case TRANSPORT_NEXT_TRACK: - return 0x0100; - case TRANSPORT_PREV_TRACK: - return 0x0200; - case TRANSPORT_STOP: - return 0x0400; - case TRANSPORT_EJECT: - return 0x0800; - case TRANSPORT_FAST_FORWARD: - return 0x1000; - case TRANSPORT_REWIND: - return 0x2000; - case TRANSPORT_STOP_EJECT: - return 0x4000; - case AL_LOCAL_BROWSER: - return 0x8000; - default: - return 0; - } -} diff --git a/tmk_core/protocol/lufa/lufa.c b/tmk_core/protocol/lufa/lufa.c index 8410eb483..09ba0bacf 100644 --- a/tmk_core/protocol/lufa/lufa.c +++ b/tmk_core/protocol/lufa/lufa.c @@ -69,7 +69,7 @@ extern keymap_config_t keymap_config; # ifdef MODULE_ADAFRUIT_BLE # include "adafruit_ble.h" # else -# include "bluetooth.h" +# include "../serial.h" # endif #endif @@ -89,6 +89,46 @@ extern keymap_config_t keymap_config; # include "joystick.h" #endif +// https://cdn.sparkfun.com/datasheets/Wireless/Bluetooth/bluetooth_cr_UG-v1.0r.pdf#G7.663734 +static inline uint16_t CONSUMER2RN42(uint16_t usage) { + switch (usage) { + case AC_HOME: + return 0x0001; + case AL_EMAIL: + return 0x0002; + case AC_SEARCH: + return 0x0004; + case AL_KEYBOARD_LAYOUT: + return 0x0008; + case AUDIO_VOL_UP: + return 0x0010; + case AUDIO_VOL_DOWN: + return 0x0020; + case AUDIO_MUTE: + return 0x0040; + case TRANSPORT_PLAY_PAUSE: + return 0x0080; + case TRANSPORT_NEXT_TRACK: + return 0x0100; + case TRANSPORT_PREV_TRACK: + return 0x0200; + case TRANSPORT_STOP: + return 0x0400; + case TRANSPORT_EJECT: + return 0x0800; + case TRANSPORT_FAST_FORWARD: + return 0x1000; + case TRANSPORT_REWIND: + return 0x2000; + case TRANSPORT_STOP_EJECT: + return 0x4000; + case AL_LOCAL_BROWSER: + return 0x8000; + default: + return 0; + } +} + uint8_t keyboard_idle = 0; /* 0: Boot Protocol, 1: Report Protocol(default) */ uint8_t keyboard_protocol = 1; @@ -631,20 +671,13 @@ static void send_keyboard(report_keyboard_t *report) { # ifdef MODULE_ADAFRUIT_BLE adafruit_ble_send_keys(report->mods, report->keys, sizeof(report->keys)); # elif MODULE_RN42 - bluefruit_serial_send(0xFD); - bluefruit_serial_send(0x09); - bluefruit_serial_send(0x01); - bluefruit_serial_send(report->mods); - bluefruit_serial_send(report->reserved); - for (uint8_t i = 0; i < KEYBOARD_REPORT_KEYS; i++) { - bluefruit_serial_send(report->keys[i]); - } -# else - bluefruit_serial_send(0xFD); - bluefruit_serial_send(report->mods); - bluefruit_serial_send(report->reserved); + serial_send(0xFD); + serial_send(0x09); + serial_send(0x01); + serial_send(report->mods); + serial_send(report->reserved); for (uint8_t i = 0; i < KEYBOARD_REPORT_KEYS; i++) { - bluefruit_serial_send(report->keys[i]); + serial_send(report->keys[i]); } # endif } @@ -697,15 +730,15 @@ static void send_mouse(report_mouse_t *report) { // FIXME: mouse buttons adafruit_ble_send_mouse_move(report->x, report->y, report->v, report->h, report->buttons); # else - bluefruit_serial_send(0xFD); - bluefruit_serial_send(0x00); - bluefruit_serial_send(0x03); - bluefruit_serial_send(report->buttons); - bluefruit_serial_send(report->x); - bluefruit_serial_send(report->y); - bluefruit_serial_send(report->v); // should try sending the wheel v here - bluefruit_serial_send(report->h); // should try sending the wheel h here - bluefruit_serial_send(0x00); + serial_send(0xFD); + serial_send(0x00); + serial_send(0x03); + serial_send(report->buttons); + serial_send(report->x); + serial_send(report->y); + serial_send(report->v); // should try sending the wheel v here + serial_send(report->h); // should try sending the wheel h here + serial_send(0x00); # endif } @@ -778,25 +811,11 @@ static void send_consumer(uint16_t data) { if (data == last_data) return; last_data = data; uint16_t bitmap = CONSUMER2RN42(data); - bluefruit_serial_send(0xFD); - bluefruit_serial_send(0x03); - bluefruit_serial_send(0x03); - bluefruit_serial_send(bitmap & 0xFF); - bluefruit_serial_send((bitmap >> 8) & 0xFF); -# else - static uint16_t last_data = 0; - if (data == last_data) return; - last_data = data; - uint16_t bitmap = CONSUMER2BLUEFRUIT(data); - bluefruit_serial_send(0xFD); - bluefruit_serial_send(0x00); - bluefruit_serial_send(0x02); - bluefruit_serial_send(bitmap & 0xFF); - bluefruit_serial_send((bitmap >> 8) & 0xFF); - bluefruit_serial_send(0x00); - bluefruit_serial_send(0x00); - bluefruit_serial_send(0x00); - bluefruit_serial_send(0x00); + serial_send(0xFD); + serial_send(0x03); + serial_send(0x03); + serial_send(bitmap & 0xFF); + serial_send((bitmap >> 8) & 0xFF); # endif } @@ -1018,7 +1037,7 @@ int main(void) { setup_usb(); sei(); -#if defined(MODULE_ADAFRUIT_EZKEY) || defined(MODULE_RN42) +#if defined(MODULE_RN42) serial_init(); #endif -- cgit v1.3.1 From a3db72df7299140e52f57d082a3742a8b480a226 Mon Sep 17 00:00:00 2001 From: QMK Bot Date: Sat, 29 Aug 2020 22:57:48 +0000 Subject: format code according to conventions [skip ci] --- drivers/oled/oled_driver.c | 2 +- drivers/oled/oled_driver.h | 2 +- .../handwired/onekey/keymaps/joystick/config.h | 2 +- .../handwired/onekey/keymaps/joystick/rules.mk | 2 +- quantum/process_keycode/process_auto_shift.c | 35 +++++++++--------- quantum/process_keycode/process_combo.c | 4 +-- quantum/process_keycode/process_joystick.c | 42 ++++++++++------------ quantum/rgblight.c | 12 +++---- tmk_core/common/action_layer.h | 7 ++-- tmk_core/common/mousekey.c | 19 +++++----- tmk_core/common/progmem.h | 2 +- tmk_core/protocol/chibios/usb_main.c | 28 ++++++++------- tmk_core/protocol/lufa/adafruit_ble.h | 4 +-- tmk_core/protocol/lufa/lufa.c | 28 ++++++++------- 14 files changed, 93 insertions(+), 96 deletions(-) (limited to 'tmk_core') diff --git a/drivers/oled/oled_driver.c b/drivers/oled/oled_driver.c index bbf010a09..9ae737ca2 100644 --- a/drivers/oled/oled_driver.c +++ b/drivers/oled/oled_driver.c @@ -447,7 +447,7 @@ void oled_pan(bool left) { oled_buffer_reader_t oled_read_raw(uint16_t start_index) { if (start_index > OLED_MATRIX_SIZE) start_index = OLED_MATRIX_SIZE; oled_buffer_reader_t ret_reader; - ret_reader.current_element = &oled_buffer[start_index]; + ret_reader.current_element = &oled_buffer[start_index]; ret_reader.remaining_element_count = OLED_MATRIX_SIZE - start_index; return ret_reader; } diff --git a/drivers/oled/oled_driver.h b/drivers/oled/oled_driver.h index 7ec00d66a..9a4b98d2f 100644 --- a/drivers/oled/oled_driver.h +++ b/drivers/oled/oled_driver.h @@ -155,7 +155,7 @@ along with this program. If not, see . #endif typedef struct __attribute__((__packed__)) { - uint8_t *current_element; + uint8_t *current_element; uint16_t remaining_element_count; } oled_buffer_reader_t; diff --git a/keyboards/handwired/onekey/keymaps/joystick/config.h b/keyboards/handwired/onekey/keymaps/joystick/config.h index ac09aa7cf..a3b5858ad 100644 --- a/keyboards/handwired/onekey/keymaps/joystick/config.h +++ b/keyboards/handwired/onekey/keymaps/joystick/config.h @@ -1,4 +1,4 @@ -#pragma once +#pragma once #define JOYSTICK_AXES_COUNT 2 #define JOYSTICK_BUTTON_COUNT 1 diff --git a/keyboards/handwired/onekey/keymaps/joystick/rules.mk b/keyboards/handwired/onekey/keymaps/joystick/rules.mk index cf0348173..b910bdbe6 100644 --- a/keyboards/handwired/onekey/keymaps/joystick/rules.mk +++ b/keyboards/handwired/onekey/keymaps/joystick/rules.mk @@ -1 +1 @@ -JOYSTICK_ENABLE = analog +JOYSTICK_ENABLE = analog diff --git a/quantum/process_keycode/process_auto_shift.c b/quantum/process_keycode/process_auto_shift.c index 330037cef..b1267922c 100644 --- a/quantum/process_keycode/process_auto_shift.c +++ b/quantum/process_keycode/process_auto_shift.c @@ -41,34 +41,34 @@ void autoshift_flush(void) { } void autoshift_on(uint16_t keycode) { - autoshift_time = timer_read(); - autoshift_lastkey = keycode; + autoshift_time = timer_read(); + autoshift_lastkey = keycode; } void autoshift_toggle(void) { - if (autoshift_enabled) { - autoshift_enabled = false; - autoshift_flush(); - } else { - autoshift_enabled = true; - } + if (autoshift_enabled) { + autoshift_enabled = false; + autoshift_flush(); + } else { + autoshift_enabled = true; + } } void autoshift_enable(void) { autoshift_enabled = true; } void autoshift_disable(void) { - autoshift_enabled = false; - autoshift_flush(); + autoshift_enabled = false; + autoshift_flush(); } -#ifndef AUTO_SHIFT_NO_SETUP +# ifndef AUTO_SHIFT_NO_SETUP void autoshift_timer_report(void) { - char display[8]; + char display[8]; - snprintf(display, 8, "\n%d\n", autoshift_timeout); + snprintf(display, 8, "\n%d\n", autoshift_timeout); - send_string((const char *)display); + send_string((const char *)display); } -#endif +# endif bool get_autoshift_state(void) { return autoshift_enabled; } @@ -79,7 +79,6 @@ void set_autoshift_timeout(uint16_t timeout) { autoshift_timeout = timeout; } bool process_auto_shift(uint16_t keycode, keyrecord_t *record) { if (record->event.pressed) { switch (keycode) { - case KC_ASTG: autoshift_toggle(); return true; @@ -92,10 +91,10 @@ bool process_auto_shift(uint16_t keycode, keyrecord_t *record) { return true; # ifndef AUTO_SHIFT_NO_SETUP - case KC_ASUP: + case KC_ASUP: autoshift_timeout += 5; return true; - case KC_ASDN: + case KC_ASDN: autoshift_timeout -= 5; return true; diff --git a/quantum/process_keycode/process_combo.c b/quantum/process_keycode/process_combo.c index 1f715f43b..f38d7d47a 100644 --- a/quantum/process_keycode/process_combo.c +++ b/quantum/process_keycode/process_combo.c @@ -27,7 +27,7 @@ extern int COMBO_LEN; __attribute__((weak)) void process_combo_event(uint16_t combo_index, bool pressed) {} static uint16_t timer = 0; -static uint16_t current_combo_index = 0; +static uint16_t current_combo_index = 0; static bool drop_buffer = false; static bool is_active = false; static bool b_combo_enable = true; // defaults to enabled @@ -82,7 +82,7 @@ static inline void dump_key_buffer(bool emit) { } while (0) static bool process_single_combo(combo_t *combo, uint16_t keycode, keyrecord_t *record) { - uint8_t count = 0; + uint8_t count = 0; uint16_t index = -1; /* Find index of keycode and number of combo keys */ for (const uint16_t *keys = combo->keys;; ++count) { diff --git a/quantum/process_keycode/process_joystick.c b/quantum/process_keycode/process_joystick.c index c12f75685..5778a7434 100644 --- a/quantum/process_keycode/process_joystick.c +++ b/quantum/process_keycode/process_joystick.c @@ -17,8 +17,7 @@ bool process_joystick(uint16_t keycode, keyrecord_t *record) { return true; } -__attribute__((weak)) -void joystick_task(void) { +__attribute__((weak)) void joystick_task(void) { if (process_joystick_analogread() && (joystick_status.status & JS_UPDATED)) { send_joystick_packet(&joystick_status); joystick_status.status &= ~JS_UPDATED; @@ -47,16 +46,11 @@ uint16_t savePinState(pin_t pin) { return ((PORTx_ADDRESS(pin) >> pinNumber) & 0x1) << 1 | ((DDRx_ADDRESS(pin) >> pinNumber) & 0x1); #elif defined(PROTOCOL_CHIBIOS) /* - The pin configuration is backed up in the following format : + The pin configuration is backed up in the following format : bit 15 9 8 7 6 5 4 3 2 1 0 |unused|ODR|IDR|PUPDR|OSPEEDR|OTYPER|MODER| */ - return (( PAL_PORT(pin)->MODER >> (2*PAL_PAD(pin))) & 0x3) - | (((PAL_PORT(pin)->OTYPER >> (1*PAL_PAD(pin))) & 0x1) << 2) - | (((PAL_PORT(pin)->OSPEEDR >> (2*PAL_PAD(pin))) & 0x3) << 3) - | (((PAL_PORT(pin)->PUPDR >> (2*PAL_PAD(pin))) & 0x3) << 5) - | (((PAL_PORT(pin)->IDR >> (1*PAL_PAD(pin))) & 0x1) << 7) - | (((PAL_PORT(pin)->ODR >> (1*PAL_PAD(pin))) & 0x1) << 8); + return ((PAL_PORT(pin)->MODER >> (2 * PAL_PAD(pin))) & 0x3) | (((PAL_PORT(pin)->OTYPER >> (1 * PAL_PAD(pin))) & 0x1) << 2) | (((PAL_PORT(pin)->OSPEEDR >> (2 * PAL_PAD(pin))) & 0x3) << 3) | (((PAL_PORT(pin)->PUPDR >> (2 * PAL_PAD(pin))) & 0x3) << 5) | (((PAL_PORT(pin)->IDR >> (1 * PAL_PAD(pin))) & 0x1) << 7) | (((PAL_PORT(pin)->ODR >> (1 * PAL_PAD(pin))) & 0x1) << 8); #else return 0; #endif @@ -68,12 +62,12 @@ void restorePinState(pin_t pin, uint16_t restoreState) { PORTx_ADDRESS(pin) = (PORTx_ADDRESS(pin) & ~_BV(pinNumber)) | (((restoreState >> 1) & 0x1) << pinNumber); DDRx_ADDRESS(pin) = (DDRx_ADDRESS(pin) & ~_BV(pinNumber)) | ((restoreState & 0x1) << pinNumber); #elif defined(PROTOCOL_CHIBIOS) - PAL_PORT(pin)->MODER = (PAL_PORT(pin)->MODER & ~(0x3<< (2*PAL_PAD(pin)))) | (restoreState & 0x3) << (2*PAL_PAD(pin)); - PAL_PORT(pin)->OTYPER = (PAL_PORT(pin)->OTYPER & ~(0x1<< (1*PAL_PAD(pin)))) | ((restoreState>>2) & 0x1) << (1*PAL_PAD(pin)); - PAL_PORT(pin)->OSPEEDR= (PAL_PORT(pin)->OSPEEDR & ~(0x3<< (2*PAL_PAD(pin)))) | ((restoreState>>3) & 0x3) << (2*PAL_PAD(pin)); - PAL_PORT(pin)->PUPDR = (PAL_PORT(pin)->PUPDR & ~(0x3<< (2*PAL_PAD(pin)))) | ((restoreState>>5) & 0x3) << (2*PAL_PAD(pin)); - PAL_PORT(pin)->IDR = (PAL_PORT(pin)->IDR & ~(0x1<< (1*PAL_PAD(pin)))) | ((restoreState>>7) & 0x1) << (1*PAL_PAD(pin)); - PAL_PORT(pin)->ODR = (PAL_PORT(pin)->ODR & ~(0x1<< (1*PAL_PAD(pin)))) | ((restoreState>>8) & 0x1) << (1*PAL_PAD(pin)); + PAL_PORT(pin)->MODER = (PAL_PORT(pin)->MODER & ~(0x3 << (2 * PAL_PAD(pin)))) | (restoreState & 0x3) << (2 * PAL_PAD(pin)); + PAL_PORT(pin)->OTYPER = (PAL_PORT(pin)->OTYPER & ~(0x1 << (1 * PAL_PAD(pin)))) | ((restoreState >> 2) & 0x1) << (1 * PAL_PAD(pin)); + PAL_PORT(pin)->OSPEEDR = (PAL_PORT(pin)->OSPEEDR & ~(0x3 << (2 * PAL_PAD(pin)))) | ((restoreState >> 3) & 0x3) << (2 * PAL_PAD(pin)); + PAL_PORT(pin)->PUPDR = (PAL_PORT(pin)->PUPDR & ~(0x3 << (2 * PAL_PAD(pin)))) | ((restoreState >> 5) & 0x3) << (2 * PAL_PAD(pin)); + PAL_PORT(pin)->IDR = (PAL_PORT(pin)->IDR & ~(0x1 << (1 * PAL_PAD(pin)))) | ((restoreState >> 7) & 0x1) << (1 * PAL_PAD(pin)); + PAL_PORT(pin)->ODR = (PAL_PORT(pin)->ODR & ~(0x1 << (1 * PAL_PAD(pin)))) | ((restoreState >> 8) & 0x1) << (1 * PAL_PAD(pin)); #else return; #endif @@ -132,21 +126,21 @@ bool process_joystick_analogread_quantum() { int16_t axis_val = joystick_axes[axis_index].mid_digit; # endif - //test the converted value against the lower range - int32_t ref = joystick_axes[axis_index].mid_digit; - int32_t range = joystick_axes[axis_index].min_digit; - int32_t ranged_val = ((axis_val - ref) * -127) / (range - ref) ; + // test the converted value against the lower range + int32_t ref = joystick_axes[axis_index].mid_digit; + int32_t range = joystick_axes[axis_index].min_digit; + int32_t ranged_val = ((axis_val - ref) * -127) / (range - ref); if (ranged_val > 0) { - //the value is in the higher range - range = joystick_axes[axis_index].max_digit; + // the value is in the higher range + range = joystick_axes[axis_index].max_digit; ranged_val = ((axis_val - ref) * 127) / (range - ref); } - - //clamp the result in the valid range + + // clamp the result in the valid range ranged_val = ranged_val < -127 ? -127 : ranged_val; ranged_val = ranged_val > 127 ? 127 : ranged_val; - + if (ranged_val != joystick_status.axes[axis_index]) { joystick_status.axes[axis_index] = ranged_val; joystick_status.status |= JS_UPDATED; diff --git a/quantum/rgblight.c b/quantum/rgblight.c index 52d8da181..211ec975a 100644 --- a/quantum/rgblight.c +++ b/quantum/rgblight.c @@ -407,7 +407,6 @@ void rgblight_decrease_val_helper(bool write_to_eeprom) { void rgblight_decrease_val_noeeprom(void) { rgblight_decrease_val_helper(false); } void rgblight_decrease_val(void) { rgblight_decrease_val_helper(true); } - void rgblight_increase_speed_helper(bool write_to_eeprom) { if (rgblight_config.speed < 3) rgblight_config.speed++; // RGBLIGHT_SPLIT_SET_CHANGE_HSVS; // NEED? @@ -428,7 +427,6 @@ void rgblight_decrease_speed_helper(bool write_to_eeprom) { void rgblight_decrease_speed(void) { rgblight_decrease_speed_helper(true); } void rgblight_decrease_speed_noeeprom(void) { rgblight_decrease_speed_helper(false); } - void rgblight_sethsv_noeeprom_old(uint8_t hue, uint8_t sat, uint8_t val) { if (rgblight_config.enable) { LED_TYPE tmp_led; @@ -1170,17 +1168,17 @@ void rgblight_effect_knight(animation_status_t *anim) { */ void rgblight_effect_christmas(animation_status_t *anim) { static int8_t increment = 1; - const uint8_t max_pos = 32; + const uint8_t max_pos = 32; const uint8_t hue_green = 85; uint32_t xa; - uint8_t hue, val; - uint8_t i; + uint8_t hue, val; + uint8_t i; // The effect works by animating anim->pos from 0 to 32 and back to 0. // The pos is used in a cubic bezier formula to ease-in-out between red and green, leaving the interpolated colors visible as short as possible. - xa = CUBED((uint32_t) anim->pos); - hue = ((uint32_t) hue_green) * xa / (xa + CUBED((uint32_t) (max_pos - anim->pos))); + xa = CUBED((uint32_t)anim->pos); + hue = ((uint32_t)hue_green) * xa / (xa + CUBED((uint32_t)(max_pos - anim->pos))); // Additionally, these interpolated colors get shown with a slightly darker value, to make them less prominent than the main colors. val = 255 - (3 * (hue < hue_green / 2 ? hue : hue_green - hue) / 2); diff --git a/tmk_core/common/action_layer.h b/tmk_core/common/action_layer.h index 9b9173c33..f9f686112 100644 --- a/tmk_core/common/action_layer.h +++ b/tmk_core/common/action_layer.h @@ -82,9 +82,9 @@ void layer_on(uint8_t layer); void layer_off(uint8_t layer); void layer_invert(uint8_t layer); /* bitwise operation */ -void layer_or(layer_state_t state); -void layer_and(layer_state_t state); -void layer_xor(layer_state_t state); +void layer_or(layer_state_t state); +void layer_and(layer_state_t state); +void layer_xor(layer_state_t state); layer_state_t layer_state_set_user(layer_state_t state); layer_state_t layer_state_set_kb(layer_state_t state); #else @@ -107,7 +107,6 @@ layer_state_t layer_state_set_kb(layer_state_t state); # define layer_state_set_user(state) (void)state #endif - /* pressed actions cache */ #if !defined(NO_ACTION_LAYER) && !defined(STRICT_LAYER_RELEASE) diff --git a/tmk_core/common/mousekey.c b/tmk_core/common/mousekey.c index 390c74e0f..ef18bcf1a 100644 --- a/tmk_core/common/mousekey.c +++ b/tmk_core/common/mousekey.c @@ -33,8 +33,8 @@ inline int8_t times_inv_sqrt2(int8_t x) { static report_mouse_t mouse_report = {0}; static void mousekey_debug(void); -static uint8_t mousekey_accel = 0; -static uint8_t mousekey_repeat = 0; +static uint8_t mousekey_accel = 0; +static uint8_t mousekey_repeat = 0; static uint8_t mousekey_wheel_repeat = 0; #ifndef MK_3_SPEED @@ -225,7 +225,6 @@ void mousekey_on(uint8_t code) { mousekey_accel |= (1 << 1); else if (code == KC_MS_ACCEL2) mousekey_accel |= (1 << 2); - } void mousekey_off(uint8_t code) { @@ -284,10 +283,10 @@ uint16_t w_intervals[mkspd_COUNT] = {MK_W_INTERVAL_UNMOD, MK_W_INTERVAL_0 void mousekey_task(void) { // report cursor and scroll movement independently report_mouse_t const tmpmr = mouse_report; - mouse_report.x = 0; - mouse_report.y = 0; - mouse_report.v = 0; - mouse_report.h = 0; + mouse_report.x = 0; + mouse_report.y = 0; + mouse_report.v = 0; + mouse_report.h = 0; if ((tmpmr.x || tmpmr.y) && timer_elapsed(last_timer_c) > c_intervals[mk_speed]) { mouse_report.x = tmpmr.x; @@ -421,10 +420,10 @@ void mousekey_send(void) { } void mousekey_clear(void) { - mouse_report = (report_mouse_t){}; - mousekey_repeat = 0; + mouse_report = (report_mouse_t){}; + mousekey_repeat = 0; mousekey_wheel_repeat = 0; - mousekey_accel = 0; + mousekey_accel = 0; } static void mousekey_debug(void) { diff --git a/tmk_core/common/progmem.h b/tmk_core/common/progmem.h index 41b5b537c..c8863d3ad 100644 --- a/tmk_core/common/progmem.h +++ b/tmk_core/common/progmem.h @@ -4,7 +4,7 @@ # include #else # define PROGMEM -# define PGM_P const char * +# define PGM_P const char* # define memcpy_P(dest, src, n) memcpy(dest, src, n) # define pgm_read_byte(address_short) *((uint8_t*)(address_short)) # define pgm_read_word(address_short) *((uint16_t*)(address_short)) diff --git a/tmk_core/protocol/chibios/usb_main.c b/tmk_core/protocol/chibios/usb_main.c index 68c61cf55..ae33e86a7 100644 --- a/tmk_core/protocol/chibios/usb_main.c +++ b/tmk_core/protocol/chibios/usb_main.c @@ -888,39 +888,43 @@ void virtser_task(void) { void send_joystick_packet(joystick_t *joystick) { joystick_report_t rep = { # if JOYSTICK_AXES_COUNT > 0 - .axes = {joystick->axes[0], + .axes = + { + joystick->axes[0], # if JOYSTICK_AXES_COUNT >= 2 - joystick->axes[1], + joystick->axes[1], # endif # if JOYSTICK_AXES_COUNT >= 3 - joystick->axes[2], + joystick->axes[2], # endif # if JOYSTICK_AXES_COUNT >= 4 - joystick->axes[3], + joystick->axes[3], # endif # if JOYSTICK_AXES_COUNT >= 5 - joystick->axes[4], + joystick->axes[4], # endif # if JOYSTICK_AXES_COUNT >= 6 - joystick->axes[5], + joystick->axes[5], # endif - }, + }, # endif // JOYSTICK_AXES_COUNT>0 # if JOYSTICK_BUTTON_COUNT > 0 - .buttons = {joystick->buttons[0], + .buttons = + { + joystick->buttons[0], # if JOYSTICK_BUTTON_COUNT > 8 - joystick->buttons[1], + joystick->buttons[1], # endif # if JOYSTICK_BUTTON_COUNT > 16 - joystick->buttons[2], + joystick->buttons[2], # endif # if JOYSTICK_BUTTON_COUNT > 24 - joystick->buttons[3], + joystick->buttons[3], # endif - } + } # endif // JOYSTICK_BUTTON_COUNT>0 }; diff --git a/tmk_core/protocol/lufa/adafruit_ble.h b/tmk_core/protocol/lufa/adafruit_ble.h index aebded7b3..9dfc9b435 100644 --- a/tmk_core/protocol/lufa/adafruit_ble.h +++ b/tmk_core/protocol/lufa/adafruit_ble.h @@ -41,12 +41,12 @@ extern bool adafruit_ble_send_keys(uint8_t hid_modifier_mask, uint8_t *keys, uin * (milliseconds) */ extern bool adafruit_ble_send_consumer_key(uint16_t keycode, int hold_duration); -# ifdef MOUSE_ENABLE +#ifdef MOUSE_ENABLE /* Send a mouse/wheel movement report. * The parameters are signed and indicate positive of negative direction * change. */ extern bool adafruit_ble_send_mouse_move(int8_t x, int8_t y, int8_t scroll, int8_t pan, uint8_t buttons); -# endif +#endif /* Compute battery voltage by reading an analog pin. * Returns the integer number of millivolts */ diff --git a/tmk_core/protocol/lufa/lufa.c b/tmk_core/protocol/lufa/lufa.c index 09ba0bacf..cec004402 100644 --- a/tmk_core/protocol/lufa/lufa.c +++ b/tmk_core/protocol/lufa/lufa.c @@ -316,39 +316,43 @@ void send_joystick_packet(joystick_t *joystick) { joystick_report_t r = { # if JOYSTICK_AXES_COUNT > 0 - .axes = {joystick->axes[0], + .axes = + { + joystick->axes[0], # if JOYSTICK_AXES_COUNT >= 2 - joystick->axes[1], + joystick->axes[1], # endif # if JOYSTICK_AXES_COUNT >= 3 - joystick->axes[2], + joystick->axes[2], # endif # if JOYSTICK_AXES_COUNT >= 4 - joystick->axes[3], + joystick->axes[3], # endif # if JOYSTICK_AXES_COUNT >= 5 - joystick->axes[4], + joystick->axes[4], # endif # if JOYSTICK_AXES_COUNT >= 6 - joystick->axes[5], + joystick->axes[5], # endif - }, + }, # endif // JOYSTICK_AXES_COUNT>0 # if JOYSTICK_BUTTON_COUNT > 0 - .buttons = {joystick->buttons[0], + .buttons = + { + joystick->buttons[0], # if JOYSTICK_BUTTON_COUNT > 8 - joystick->buttons[1], + joystick->buttons[1], # endif # if JOYSTICK_BUTTON_COUNT > 16 - joystick->buttons[2], + joystick->buttons[2], # endif # if JOYSTICK_BUTTON_COUNT > 24 - joystick->buttons[3], + joystick->buttons[3], # endif - } + } # endif // JOYSTICK_BUTTON_COUNT>0 }; -- cgit v1.3.1 From 6e948feb6a33bcd1da45c5a590d0e6c241e1d879 Mon Sep 17 00:00:00 2001 From: Ryan Date: Thu, 10 Sep 2020 00:00:27 +1000 Subject: Use the force when flashing with dfu-programmer (#10070) --- tmk_core/avr.mk | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'tmk_core') diff --git a/tmk_core/avr.mk b/tmk_core/avr.mk index 04ae16224..3cb34dc66 100644 --- a/tmk_core/avr.mk +++ b/tmk_core/avr.mk @@ -120,7 +120,7 @@ define EXEC_DFU if $(DFU_PROGRAMMER) --version 2>&1 | $(GREP) -q 0.7 ; then\ $(DFU_PROGRAMMER) $(MCU) erase --force; \ if [ "$(1)" ]; then \ - $(DFU_PROGRAMMER) $(MCU) flash --eeprom $(QUANTUM_PATH)/split_common/$(1);\ + $(DFU_PROGRAMMER) $(MCU) flash --force --eeprom $(QUANTUM_PATH)/split_common/$(1);\ fi; \ else \ $(DFU_PROGRAMMER) $(MCU) erase; \ @@ -128,7 +128,7 @@ define EXEC_DFU $(DFU_PROGRAMMER) $(MCU) flash-eeprom $(QUANTUM_PATH)/split_common/$(1);\ fi; \ fi; \ - $(DFU_PROGRAMMER) $(MCU) flash $(BUILD_DIR)/$(TARGET).hex;\ + $(DFU_PROGRAMMER) $(MCU) flash --force $(BUILD_DIR)/$(TARGET).hex;\ $(DFU_PROGRAMMER) $(MCU) reset endef @@ -141,7 +141,7 @@ dfu-start: dfu-ee: $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).eep if $(DFU_PROGRAMMER) --version 2>&1 | $(GREP) -q 0.7 ; then\ - $(DFU_PROGRAMMER) $(MCU) flash --eeprom $(BUILD_DIR)/$(TARGET).eep;\ + $(DFU_PROGRAMMER) $(MCU) flash --force --eeprom $(BUILD_DIR)/$(TARGET).eep;\ else\ $(DFU_PROGRAMMER) $(MCU) flash-eeprom $(BUILD_DIR)/$(TARGET).eep;\ fi -- cgit v1.3.1 From 2b9f200a2a0f0430e80df75b8a4d5757e6ca0374 Mon Sep 17 00:00:00 2001 From: Frans de Jonge Date: Sun, 13 Sep 2020 03:17:47 +0200 Subject: [fix] dfu-programmer <0.7 doesn't support --force flag (#10292) Fixes . --- tmk_core/avr.mk | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'tmk_core') diff --git a/tmk_core/avr.mk b/tmk_core/avr.mk index 3cb34dc66..336a83e9d 100644 --- a/tmk_core/avr.mk +++ b/tmk_core/avr.mk @@ -122,13 +122,14 @@ define EXEC_DFU if [ "$(1)" ]; then \ $(DFU_PROGRAMMER) $(MCU) flash --force --eeprom $(QUANTUM_PATH)/split_common/$(1);\ fi; \ + $(DFU_PROGRAMMER) $(MCU) flash --force $(BUILD_DIR)/$(TARGET).hex;\ else \ $(DFU_PROGRAMMER) $(MCU) erase; \ if [ "$(1)" ]; then \ $(DFU_PROGRAMMER) $(MCU) flash-eeprom $(QUANTUM_PATH)/split_common/$(1);\ fi; \ + $(DFU_PROGRAMMER) $(MCU) flash $(BUILD_DIR)/$(TARGET).hex;\ fi; \ - $(DFU_PROGRAMMER) $(MCU) flash --force $(BUILD_DIR)/$(TARGET).hex;\ $(DFU_PROGRAMMER) $(MCU) reset endef -- cgit v1.3.1 From b846480d5a83171e85dba48422b42aa95e29d31a Mon Sep 17 00:00:00 2001 From: David Cuthbert Date: Thu, 17 Sep 2020 15:14:39 -0700 Subject: Output an error message if LINK_TIME_OPTIMIZATION_ENABLE is set but LTO_ENABLE is not (#10217) * Output an error message if LINK_TIME_OPTIMIZATION_ENABLE is set but LTO_ENABLE is not. * Update common.mk Specify that LINK_TIME_OPTIMZATION_ENABLE has been renamed, not deprecated. --- tmk_core/common.mk | 2 ++ 1 file changed, 2 insertions(+) (limited to 'tmk_core') diff --git a/tmk_core/common.mk b/tmk_core/common.mk index 3c9de33c9..c60a1c405 100644 --- a/tmk_core/common.mk +++ b/tmk_core/common.mk @@ -161,6 +161,8 @@ ifeq ($(strip $(LTO_ENABLE)), yes) EXTRAFLAGS += -flto TMK_COMMON_DEFS += -DLTO_ENABLE TMK_COMMON_DEFS += -DLINK_TIME_OPTIMIZATON_ENABLE +else ifdef LINK_TIME_OPTIMIZATION_ENABLE + $(error The LINK_TIME_OPTIMIZATION_ENABLE flag has been renamed to LTO_ENABLE.) endif # Search Path -- cgit v1.3.1 From 0fbb1e550a1c65fcc07b206aec449811e71642ff Mon Sep 17 00:00:00 2001 From: Peter Landoll Date: Tue, 22 Sep 2020 08:31:37 -0400 Subject: Add description in Bluetooth docs for requiring NKRO to be disabled (#10359) --- docs/feature_bluetooth.md | 5 ++++- tmk_core/common.mk | 10 +++++++--- 2 files changed, 11 insertions(+), 4 deletions(-) (limited to 'tmk_core') diff --git a/docs/feature_bluetooth.md b/docs/feature_bluetooth.md index 7b450b1ac..08e5f24ac 100644 --- a/docs/feature_bluetooth.md +++ b/docs/feature_bluetooth.md @@ -26,7 +26,10 @@ A Bluefruit UART friend can be converted to an SPI friend, however this [require ## Bluetooth Rules.mk Options -Use only one of these + +The currently supported Bluetooth chipsets do not support [N-Key Rollover (NKRO)](reference_glossary.md#n-key-rollover-nkro), so `rules.mk` must contain `NKRO_ENABLE = no`. + +Use only one of these to enable Bluetooth: * BLUETOOTH_ENABLE = yes (Legacy Option) * BLUETOOTH = RN42 * BLUETOOTH = AdafruitBLE diff --git a/tmk_core/common.mk b/tmk_core/common.mk index c60a1c405..fdf2aa097 100644 --- a/tmk_core/common.mk +++ b/tmk_core/common.mk @@ -99,11 +99,15 @@ ifeq ($(strip $(COMMAND_ENABLE)), yes) endif ifeq ($(strip $(NKRO_ENABLE)), yes) - ifneq ($(PROTOCOL),VUSB) + ifeq ($(PROTOCOL), VUSB) + $(info NKRO is not currently supported on V-USB, and has been disabled.) + else ifeq ($(strip $(BLUETOOTH_ENABLE)), yes) + $(info NKRO is not currently supported with Bluetooth, and has been disabled.) + else ifneq ($(BLUETOOTH),) + $(info NKRO is not currently supported with Bluetooth, and has been disabled.) + else TMK_COMMON_DEFS += -DNKRO_ENABLE SHARED_EP_ENABLE = yes - else - $(info NKRO is not currently supported on V-USB, and has been disabled.) endif endif -- cgit v1.3.1