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authorGravatar Joel Challis <git@zvecr.com>2019-12-21 18:22:49 +0000
committerGravatar GitHub <noreply@github.com>2019-12-21 18:22:49 +0000
commit376419a4f7e0489111a9ac24acc847342fe9d64d (patch)
tree7956534e51eb87d62af3c4ba81f19118a7a04ef9 /drivers/arm/i2c_master.h
parent05b479d349aafb8298b43fcbfcddc4440336de9c (diff)
downloadqmk_firmware-376419a4f7e0489111a9ac24acc847342fe9d64d.tar.gz
Add central location for ChibiOS defines (#7542)
* Add central location for chibios defines * Add central location for chibios defines - actually add files this time.... * Add Copyright header * Update include order to resolve i2cv1 build errors
Diffstat (limited to 'drivers/arm/i2c_master.h')
-rw-r--r--drivers/arm/i2c_master.h28
1 files changed, 10 insertions, 18 deletions
diff --git a/drivers/arm/i2c_master.h b/drivers/arm/i2c_master.h
index 31cbfb977..346513ad8 100644
--- a/drivers/arm/i2c_master.h
+++ b/drivers/arm/i2c_master.h
@@ -27,10 +27,6 @@
#include "ch.h"
#include <hal.h>
-#if defined(STM32F1XX) || defined(STM32F1xx) || defined(STM32F2xx) || defined(STM32F4xx) || defined(STM32F4XX) || defined(STM32L0xx) || defined(STM32L1xx)
-# define USE_I2CV1
-#endif
-
#ifdef I2C1_BANK
# define I2C1_SCL_BANK I2C1_BANK
# define I2C1_SDA_BANK I2C1_BANK
@@ -51,20 +47,6 @@
# define I2C1_SDA 7
#endif
-#if defined(STM32F1XX) || defined(STM32F1xx)
-# define USE_GPIOV1
-#endif
-
-#ifndef USE_GPIOV1
-// The default PAL alternate modes are used to signal that the pins are used for I2C
-# ifndef I2C1_SCL_PAL_MODE
-# define I2C1_SCL_PAL_MODE 4
-# endif
-# ifndef I2C1_SDA_PAL_MODE
-# define I2C1_SDA_PAL_MODE 4
-# endif
-#endif
-
#ifdef USE_I2CV1
# ifndef I2C1_OPMODE
# define I2C1_OPMODE OPMODE_I2C
@@ -99,6 +81,16 @@
# define I2C_DRIVER I2CD1
#endif
+#ifndef USE_GPIOV1
+// The default PAL alternate modes are used to signal that the pins are used for I2C
+# ifndef I2C1_SCL_PAL_MODE
+# define I2C1_SCL_PAL_MODE 4
+# endif
+# ifndef I2C1_SDA_PAL_MODE
+# define I2C1_SDA_PAL_MODE 4
+# endif
+#endif
+
typedef int16_t i2c_status_t;
#define I2C_STATUS_SUCCESS (0)