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authorGravatar Andrew Kannan <andrew.kannan@klaviyo.com>2019-02-13 11:03:26 -0500
committerGravatar MechMerlin <30334081+mechmerlin@users.noreply.github.com>2019-02-13 08:03:26 -0800
commit6b4549da8ceed736c85195f3bd16ded40131a29c (patch)
tree4b66446d6e223f9b49cd7890e2e6666128afe67b /keyboards/cannonkeys/satisfaction75/boards/ST_STM32F072B_DISCOVERY/board.c
parent824aa06c3cecf518cfea9cddd97446c869757c02 (diff)
downloadqmk_firmware-6b4549da8ceed736c85195f3bd16ded40131a29c.tar.gz
Add Satisfaction75 to QMK, Enable EEPROM on stm32f072 (#5094)
* Add stm32f072 base ck4x4 to handwired * add prints * Save these tries * Save changes again * Working hadron oled * OLEd working but ws2812b still iffy: * save another try * Encoder feature + OLED * RTC code * Implement clock setting mode * Whitespace * Encoder hooked up to working LED PWM code * Add missing files * eeprom changes * Save changes * Move i2c master * Move satisfaction75 under cannonkeys * Set proper default folder * Revert some core changes * Undo paved iris changes * Reorganize code for maintainability and prep for new features * Add starting code for clock OLED mode * Clock set mode finished * Add custom encoder modes * Actually add VIA keymap * Gate to only 072 * fix gate for only 072 * Update header guards and includes * Update i2c selection strategy * Update board.c to handle software reset to DFU
Diffstat (limited to 'keyboards/cannonkeys/satisfaction75/boards/ST_STM32F072B_DISCOVERY/board.c')
-rw-r--r--keyboards/cannonkeys/satisfaction75/boards/ST_STM32F072B_DISCOVERY/board.c111
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diff --git a/keyboards/cannonkeys/satisfaction75/boards/ST_STM32F072B_DISCOVERY/board.c b/keyboards/cannonkeys/satisfaction75/boards/ST_STM32F072B_DISCOVERY/board.c
new file mode 100644
index 000000000..d9f7bc329
--- /dev/null
+++ b/keyboards/cannonkeys/satisfaction75/boards/ST_STM32F072B_DISCOVERY/board.c
@@ -0,0 +1,111 @@
+/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/*
+ * This file has been automatically generated using ChibiStudio board
+ * generator plugin. Do not edit manually.
+ */
+
+#include "hal.h"
+
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config = {
+#if STM32_HAS_GPIOA
+ {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
+ VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
+#endif
+#if STM32_HAS_GPIOB
+ {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
+ VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
+#endif
+#if STM32_HAS_GPIOC
+ {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
+ VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
+#endif
+#if STM32_HAS_GPIOD
+ {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
+ VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
+#endif
+#if STM32_HAS_GPIOE
+ {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
+ VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
+#endif
+#if STM32_HAS_GPIOF
+ {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
+ VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
+#endif
+#if STM32_HAS_GPIOG
+ {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
+ VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
+#endif
+#if STM32_HAS_GPIOH
+ {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
+ VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
+#endif
+#if STM32_HAS_GPIOI
+ {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
+ VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
+#endif
+};
+#endif
+
+void enter_bootloader_mode_if_requested(void);
+
+/**
+ * @brief Early initialization code.
+ * @details This initialization must be performed just after stack setup
+ * and before any other initialization.
+ */
+void __early_init(void) {
+ enter_bootloader_mode_if_requested();
+ stm32_clock_init();
+}
+
+#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
+/**
+ * @brief MMC_SPI card detection.
+ */
+bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
+
+ (void)mmcp;
+ /* TODO: Fill the implementation.*/
+ return true;
+}
+
+/**
+ * @brief MMC_SPI card write protection detection.
+ */
+bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
+
+ (void)mmcp;
+ /* TODO: Fill the implementation.*/
+ return false;
+}
+#endif
+
+/**
+ * @brief Board-specific initialization code.
+ * @todo Add your board-specific code, if any.
+ */
+void boardInit(void) {
+ SYSCFG->CFGR1 |= SYSCFG_CFGR1_I2C1_DMA_RMP;
+ SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_SPI2_DMA_RMP);
+}