Merge branch 'master' of https://github.com/jackhumbert/qmk_firmware

2 files changed, 36 insertions, 9 deletions

diff --git a/tmk_core/common/avr/bootloader.c b/tmk_core/common/avr/bootloader.c
index ad547b985..34db8d0b0 100644
--- a/tmk_core/common/avr/bootloader.c
+++ b/tmk_core/common/avr/bootloader.c
@@ -1,6 +1,7 @@
 #include <stdint.h>
 #include <stdbool.h>
 #include <avr/io.h>
+#include <avr/eeprom.h>
 #include <avr/interrupt.h>
 #include <avr/wdt.h>
 #include <util/delay.h>
@@ -89,6 +90,12 @@ void bootloader_jump(void) {
             _delay_ms(5);
         #endif
 
+        #ifdef BOOTLOADHID_BOOTLOADER
+            // force bootloadHID to stay in bootloader mode, so that it waits
+            // for a new firmware to be flashed
+            eeprom_write_byte((uint8_t *)1, 0x00);
+        #endif
+
         // watchdog reset
         reset_key = BOOTLOADER_RESET_KEY;
         wdt_enable(WDTO_250MS);
@@ -114,6 +121,11 @@ void bootloader_jump(void) {
     #endif
 }
 
+#ifdef __AVR_ATmega32A__
+// MCUSR is actually called MCUCSR in ATmega32A
+#define MCUSR MCUCSR
+#endif
+
 /* this runs before main() */
 void bootloader_jump_after_watchdog_reset(void) __attribute__ ((used, naked, section (".init3")));
 void bootloader_jump_after_watchdog_reset(void)
diff --git a/tmk_core/common/avr/timer.c b/tmk_core/common/avr/timer.c
index 84af44488..369015200 100644
--- a/tmk_core/common/avr/timer.c
+++ b/tmk_core/common/avr/timer.c
@@ -29,25 +29,35 @@ volatile uint32_t timer_count;
 
 void timer_init(void)
 {
-    // Timer0 CTC mode
-    TCCR0A = 0x02;
-
 #if TIMER_PRESCALER == 1
-    TCCR0B = 0x01;
+    uint8_t prescaler = 0x01;
 #elif TIMER_PRESCALER == 8
-    TCCR0B = 0x02;
+    uint8_t prescaler = 0x02;
 #elif TIMER_PRESCALER == 64
-    TCCR0B = 0x03;
+    uint8_t prescaler = 0x03;
 #elif TIMER_PRESCALER == 256
-    TCCR0B = 0x04;
+    uint8_t prescaler = 0x04;
 #elif TIMER_PRESCALER == 1024
-    TCCR0B = 0x05;
+    uint8_t prescaler = 0x05;
 #else
 #   error "Timer prescaler value is NOT vaild."
 #endif
 
+#ifndef __AVR_ATmega32A__
+    // Timer0 CTC mode
+    TCCR0A = 0x02;
+
+    TCCR0B = prescaler;
+
     OCR0A = TIMER_RAW_TOP;
     TIMSK0 = (1<<OCIE0A);
+#else
+    // Timer0 CTC mode
+    TCCR0 = (1 << WGM01) | prescaler;
+
+    OCR0 = TIMER_RAW_TOP;
+    TIMSK = (1 << OCIE0);
+#endif
 }
 
 inline
@@ -107,7 +117,12 @@ uint32_t timer_elapsed32(uint32_t last)
 }
 
 // excecuted once per 1ms.(excess for just timer count?)
-ISR(TIMER0_COMPA_vect)
+#ifndef __AVR_ATmega32A__
+#define TIMER_INTERRUPT_VECTOR TIMER0_COMPA_vect
+#else
+#define TIMER_INTERRUPT_VECTOR TIMER0_COMP_vect
+#endif
+ISR(TIMER_INTERRUPT_VECTOR, ISR_NOBLOCK)
 {
     timer_count++;
 }